Map em(4) descriptor rings coherent. This doesn't make a difference on x86,

but on selected ARM64 machines with non-cache-coherent PCIe controllers this
makes em(4) work reliably.  Without it the network controller's view of the
head and tail get out of sync.  The reason remains unclear.  It could be an
issue in our arm64 bus dma code, it could be an issue in the em(4) code, or
maybe the hardware itself just doesn't cope well with non-coherent memory.
Linux maps them coherent as well, and it might actually be better to map
them that way, since otherwise we might spend a lot of time flushing our
caches.

ok kettenis@ deraadt@

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