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authorMiod Vallat <miod@cvs.openbsd.org>2004-03-02 18:17:52 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2004-03-02 18:17:52 +0000
commit3b13e9e9d7ca17ef8364f007ff0dff08208a311a (patch)
tree5ff605c5c0843eed5986605cb6c1cc024351934a /usr.sbin
parent180320e46cdbf122a7994b4b1ed39b191a9281f0 (diff)
Arla lwp support for m88k systems. Slightly abuses the framework to
enforce 8-byte stack alignment.
Diffstat (limited to 'usr.sbin')
-rw-r--r--usr.sbin/afs/lib/libarla/Makefile.lwp.inc1
-rw-r--r--usr.sbin/afs/src/lwp/lwp_asm.c4
-rw-r--r--usr.sbin/afs/src/lwp/lwp_asm.h2
-rw-r--r--usr.sbin/afs/src/lwp/make-process.o.sh.in1
-rw-r--r--usr.sbin/afs/src/lwp/process.m88k.S114
5 files changed, 120 insertions, 2 deletions
diff --git a/usr.sbin/afs/lib/libarla/Makefile.lwp.inc b/usr.sbin/afs/lib/libarla/Makefile.lwp.inc
index 46f3beb5858..bb3d59f2d29 100644
--- a/usr.sbin/afs/lib/libarla/Makefile.lwp.inc
+++ b/usr.sbin/afs/lib/libarla/Makefile.lwp.inc
@@ -25,6 +25,7 @@ process.S:
sparc) PROCESS_S="process.sparc.S" ;; \
i*86*) PROCESS_S="process.i386.S" ;; \
m68k) PROCESS_S="process.m68k.S" ;; \
+ m88k) PROCESS_S="process.m88k.S" ;; \
mips*) PROCESS_S="process.mips.S" ;; \
alpha*) PROCESS_S="process.alpha.S" ;; \
hppa*) PROCESS_S="process.hpux.S" ;; \
diff --git a/usr.sbin/afs/src/lwp/lwp_asm.c b/usr.sbin/afs/src/lwp/lwp_asm.c
index de0058b3e8d..835a2a4994d 100644
--- a/usr.sbin/afs/src/lwp/lwp_asm.c
+++ b/usr.sbin/afs/src/lwp/lwp_asm.c
@@ -80,7 +80,7 @@ RCSID("$arla: lwp_asm.c,v 1.27 2002/07/16 19:35:40 lha Exp $");
* Make sure that alignment and saving of data is right
*/
-#if defined(__alpha) || defined(__uxpv__) || defined(__sparcv9) || defined(__x86_64__)
+#if defined(__alpha) || defined(__uxpv__) || defined(__sparcv9) || defined(__x86_64__) || defined(__m88k__)
#define REGSIZE 8
#else
#define REGSIZE 4
@@ -96,6 +96,8 @@ RCSID("$arla: lwp_asm.c,v 1.27 2002/07/16 19:35:40 lha Exp $");
#define STACK_HEADROOM 16
#elif defined(__s390__)
#define STACK_HEADROOM 24
+#elif defined(__m88k__)
+#define STACK_HEADROOM 4
#else
#define STACK_HEADROOM 5
#endif
diff --git a/usr.sbin/afs/src/lwp/lwp_asm.h b/usr.sbin/afs/src/lwp/lwp_asm.h
index 4ccb9053695..4167f9ad14a 100644
--- a/usr.sbin/afs/src/lwp/lwp_asm.h
+++ b/usr.sbin/afs/src/lwp/lwp_asm.h
@@ -157,7 +157,7 @@ struct lwp_ctl { /* LWP control structure */
char *outersp; /* outermost stack pointer */
struct lwp_pcb *outerpid; /* process carved by Initialize */
struct lwp_pcb *first, last; /* ptrs to first and last pcbs */
-#ifdef __hp9000s800
+#if defined(__hp9000s800) || defined(__m88k__)
double dsptchstack[100]; /* stack for dispatcher use only */
/* force 8 byte alignment */
#else
diff --git a/usr.sbin/afs/src/lwp/make-process.o.sh.in b/usr.sbin/afs/src/lwp/make-process.o.sh.in
index e0e7a9e7190..f2ee4aec94e 100644
--- a/usr.sbin/afs/src/lwp/make-process.o.sh.in
+++ b/usr.sbin/afs/src/lwp/make-process.o.sh.in
@@ -48,6 +48,7 @@ case "$HOST_CPU" in
sparc*) PROCESS_S="process.sparc.S" ;;
i*86*) PROCESS_S="process.i386.S" ;;
m68k) PROCESS_S="process.m68k.S" ;;
+ m88k) PROCESS_S="process.m88k.S" ;;
mips*) PROCESS_S="process.mips.S" ;;
alpha*) PROCESS_S="process.alpha.S" ;;
hppa*) PROCESS_S="process.hpux.S" ;;
diff --git a/usr.sbin/afs/src/lwp/process.m88k.S b/usr.sbin/afs/src/lwp/process.m88k.S
new file mode 100644
index 00000000000..eebfda1ab7c
--- /dev/null
+++ b/usr.sbin/afs/src/lwp/process.m88k.S
@@ -0,0 +1,114 @@
+/* $OpenBSD: process.m88k.S,v 1.1 2004/03/02 18:17:51 miod Exp $ */
+
+/*
+ * Copyright (c) 2004, Miodrag Vallat.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+
+#include <config.h>
+
+.globl _C_LABEL(PRE_Block)
+
+/*
+ * savecontext(int (*f)(), struct savearea *a1, char *newsp)
+ */
+ENTRY(savecontext)
+ /* save all registers but r0, r2, r3 and r4 on stack */
+ sub r31, r31, 4 * 30
+ st.d r4, r31, 4 * 0
+ st.d r6, r31, 4 * 2
+ st.d r8, r31, 4 * 4
+ st.d r10, r31, 4 * 6
+ st.d r12, r31, 4 * 8
+ st.d r14, r31, 4 * 10
+ st.d r16, r31, 4 * 12
+ st.d r18, r31, 4 * 14
+ st.d r20, r31, 4 * 16
+ st.d r22, r31, 4 * 18
+ st.d r24, r31, 4 * 20
+ st.d r26, r31, 4 * 22
+ st.d r28, r31, 4 * 24
+ st r30, r31, 4 * 26
+ st r1, r31, 4 * 27
+ fldcr r4, fcr62
+ fldcr r5, fcr63
+ st.d r4, r31, 4 * 28
+
+ /* set preemption lock */
+ or.u r4, r0, hi16(_C_LABEL(PRE_Block))
+ or r4, r4, lo16(_C_LABEL(PRE_Block))
+ add r1, r0, 1 /* use ext or mak */
+ st.b r1, r4, 0
+ ld.d r4, r31, 4 * 0
+
+
+ /* save stack pointer, and fetch the new one if non NULL */
+ bcnd.n eq0, r4, 1f
+ st r31, r3, 0
+ or r31, r4, r0
+1:
+
+ /* invoke function */
+ jsr.n r2
+ sub r31, r31, 32
+
+ /* should not return. Arla invokes abort() if this happens */
+ bsr _C_LABEL(abort)
+ /* NOTREACHED */
+ add r31, r31, 32
+
+/*
+ * returnto(struct savearea *a2)
+*/
+ENTRY(returnto)
+ /* pick stack */
+ ld r31, r2, 0
+
+ /* restore registers */
+ ld.d r4, r31, 4 * 28
+ fstcr r4, fcr62
+ fstcr r5, fcr63
+ ld.d r4, r31, 4 * 0
+ ld.d r6, r31, 4 * 2
+ ld.d r8, r31, 4 * 4
+ ld.d r10, r31, 4 * 6
+ ld.d r12, r31, 4 * 8
+ ld.d r14, r31, 4 * 10
+ ld.d r16, r31, 4 * 12
+ ld.d r18, r31, 4 * 14
+ ld.d r20, r31, 4 * 16
+ ld.d r22, r31, 4 * 18
+ ld.d r24, r31, 4 * 20
+ ld.d r26, r31, 4 * 22
+ ld.d r28, r31, 4 * 24
+ ld r30, r31, 4 * 26
+ ld r1, r31, 4 * 27
+ add r31, r31, 4 * 30
+
+ /* clear preemption lock and return */
+ or.u r2, r0, hi16(_C_LABEL(PRE_Block))
+ or r2, r2, lo16(_C_LABEL(PRE_Block))
+ jmp.n r1
+ st.b r0, r2, 0