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-rw-r--r--sys/arch/armish/armish/armish_machdep.c887
-rw-r--r--sys/arch/armish/armish/armish_start.S150
-rw-r--r--sys/arch/armish/armish/autoconf.c477
-rw-r--r--sys/arch/armish/compile/.cvsignore2
-rw-r--r--sys/arch/armish/conf/GENERIC168
-rw-r--r--sys/arch/armish/conf/Makefile.armish223
-rw-r--r--sys/arch/armish/conf/RAMDISK190
-rw-r--r--sys/arch/armish/conf/files.armish72
-rw-r--r--sys/arch/armish/dev/com_obio.c166
-rw-r--r--sys/arch/armish/dev/i80321_mainbus.c375
-rw-r--r--sys/arch/armish/dev/iq80321_pci.c216
-rw-r--r--sys/arch/armish/dev/iq80321reg.h107
-rw-r--r--sys/arch/armish/dev/iq80321var.h52
-rw-r--r--sys/arch/armish/dev/obio.c142
-rw-r--r--sys/arch/armish/dev/obio_space.c230
-rw-r--r--sys/arch/armish/dev/obiovar.h51
-rw-r--r--sys/arch/armish/dev/pci_addr_fixup.c466
-rw-r--r--sys/arch/armish/dev/pciide_machdep.c65
-rw-r--r--sys/arch/armish/include/_types.h10
-rw-r--r--sys/arch/armish/include/apmvar.h2
-rw-r--r--sys/arch/armish/include/armish_intr.h103
-rw-r--r--sys/arch/armish/include/asm.h4
-rw-r--r--sys/arch/armish/include/atomic.h2
-rw-r--r--sys/arch/armish/include/bootconfig.h76
-rw-r--r--sys/arch/armish/include/bus.h4
-rw-r--r--sys/arch/armish/include/cdefs.h3
-rw-r--r--sys/arch/armish/include/conf.h18
-rw-r--r--sys/arch/armish/include/cpu.h4
-rw-r--r--sys/arch/armish/include/db_machdep.h4
-rw-r--r--sys/arch/armish/include/disklabel.h4
-rw-r--r--sys/arch/armish/include/elf_abi.h3
-rw-r--r--sys/arch/armish/include/endian.h4
-rw-r--r--sys/arch/armish/include/exec.h48
-rw-r--r--sys/arch/armish/include/float.h4
-rw-r--r--sys/arch/armish/include/fp.h4
-rw-r--r--sys/arch/armish/include/frame.h4
-rw-r--r--sys/arch/armish/include/ieee.h4
-rw-r--r--sys/arch/armish/include/ieeefp.h4
-rw-r--r--sys/arch/armish/include/internal_types.h7
-rw-r--r--sys/arch/armish/include/intr.h157
-rw-r--r--sys/arch/armish/include/irqhandler.h4
-rw-r--r--sys/arch/armish/include/isa_machdep.h13
-rw-r--r--sys/arch/armish/include/limits.h4
-rw-r--r--sys/arch/armish/include/loadfile_machdep.h59
-rw-r--r--sys/arch/armish/include/lock.h4
-rw-r--r--sys/arch/armish/include/math.h4
-rw-r--r--sys/arch/armish/include/param.h51
-rw-r--r--sys/arch/armish/include/pcb.h4
-rw-r--r--sys/arch/armish/include/pci_machdep.h2
-rw-r--r--sys/arch/armish/include/pio.h4
-rw-r--r--sys/arch/armish/include/pmap.h4
-rw-r--r--sys/arch/armish/include/proc.h4
-rw-r--r--sys/arch/armish/include/profile.h4
-rw-r--r--sys/arch/armish/include/psl.h1
-rw-r--r--sys/arch/armish/include/ptrace.h4
-rw-r--r--sys/arch/armish/include/reg.h4
-rw-r--r--sys/arch/armish/include/reloc.h2
-rw-r--r--sys/arch/armish/include/rtc.h4
-rw-r--r--sys/arch/armish/include/setjmp.h4
-rw-r--r--sys/arch/armish/include/signal.h4
-rw-r--r--sys/arch/armish/include/spinlock.h7
-rw-r--r--sys/arch/armish/include/stdarg.h4
-rw-r--r--sys/arch/armish/include/sysarch.h4
-rw-r--r--sys/arch/armish/include/trap.h4
-rw-r--r--sys/arch/armish/include/vmparam.h100
65 files changed, 4815 insertions, 0 deletions
diff --git a/sys/arch/armish/armish/armish_machdep.c b/sys/arch/armish/armish/armish_machdep.c
new file mode 100644
index 00000000000..2402c71a040
--- /dev/null
+++ b/sys/arch/armish/armish/armish_machdep.c
@@ -0,0 +1,887 @@
+/* $OpenBSD: armish_machdep.c,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: lubbock_machdep.c,v 1.2 2003/07/15 00:25:06 lukem Exp $ */
+
+/*
+ * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1997,1998 Mark Brinicombe.
+ * Copyright (c) 1997,1998 Causality Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Mark Brinicombe
+ * for the NetBSD Project.
+ * 4. The name of the company nor the name of the author may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Machine dependant functions for kernel setup for Intel IQ80321 evaluation
+ * boards using RedBoot firmware.
+ */
+
+/*
+ * DIP switches:
+ *
+ * S19: no-dot: set RB_KDB. enter kgdb session.
+ * S20: no-dot: set RB_SINGLE. don't go multi user mode.
+ */
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/exec.h>
+#include <sys/proc.h>
+#include <sys/msgbuf.h>
+#include <sys/reboot.h>
+#include <sys/termios.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <sys/conf.h>
+#include <sys/queue.h>
+#include <sys/device.h>
+#include <dev/cons.h>
+#include <dev/ic/smc91cxxreg.h>
+
+#include <machine/db_machdep.h>
+#include <ddb/db_sym.h>
+#include <ddb/db_extern.h>
+
+#include <machine/bootconfig.h>
+#include <machine/bus.h>
+#include <machine/cpu.h>
+#include <machine/frame.h>
+#include <arm/undefined.h>
+#include <arm/machdep.h>
+
+#include <arm/xscale/i80321reg.h>
+#include <arm/xscale/i80321var.h>
+
+#include <armish/dev/iq80321reg.h>
+#include <armish/dev/iq80321var.h>
+#include <armish/dev/obiovar.h>
+
+
+
+/* Kernel text starts 2MB in from the bottom of the kernel address space. */
+#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
+#define KERNEL_VM_BASE (KERNEL_BASE + 0x10000000)
+
+/*
+ * The range 0xc1000000 - 0xcfffffff is available for kernel VM space
+ * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
+ */
+#define KERNEL_VM_SIZE 0x0c000000
+
+
+/*
+ * Address to call from cpu_reset() to reset the machine.
+ * This is machine architecture dependant as it varies depending
+ * on where the ROM appears when you turn the MMU off.
+ */
+
+u_int cpu_reset_address = 0;
+
+/* Define various stack sizes in pages */
+#define IRQ_STACK_SIZE 1
+#define ABT_STACK_SIZE 1
+#ifdef IPKDB
+#define UND_STACK_SIZE 2
+#else
+#define UND_STACK_SIZE 1
+#endif
+
+BootConfig bootconfig; /* Boot config storage */
+char *boot_args = NULL;
+char *boot_file = NULL;
+
+paddr_t physical_start;
+paddr_t physical_freestart;
+paddr_t physical_freeend;
+paddr_t physical_end;
+u_int free_pages;
+paddr_t pagetables_start;
+int physmem = 0;
+
+/*int debug_flags;*/
+#ifndef PMAP_STATIC_L1S
+int max_processes = 64; /* Default number */
+#endif /* !PMAP_STATIC_L1S */
+
+/* Physical and virtual addresses for some global pages */
+pv_addr_t systempage;
+pv_addr_t irqstack;
+pv_addr_t undstack;
+pv_addr_t abtstack;
+extern pv_addr_t kernelstack;
+pv_addr_t minidataclean;
+
+paddr_t msgbufphys;
+
+extern u_int data_abort_handler_address;
+extern u_int prefetch_abort_handler_address;
+extern u_int undefined_handler_address;
+
+#ifdef PMAP_DEBUG
+extern int pmap_debug_level;
+#endif
+
+#define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
+
+#define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
+#define KERNEL_PT_KERNEL_NUM 16
+
+ /* L2 table for mapping i80312 */
+//#define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
+
+ /* L2 tables for mapping kernel VM */
+//#define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
+#define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
+#define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
+#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
+
+pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
+
+extern struct user *proc0paddr;
+
+/* Prototypes */
+
+#define BOOT_STRING_MAGIC 0x4f425344
+
+char bootargs[MAX_BOOT_STRING];
+void process_kernel_args(char *);
+
+void consinit(void);
+
+#include "com.h"
+#if NCOM > 0
+#include <dev/ic/comreg.h>
+#include <dev/ic/comvar.h>
+#endif
+
+#ifndef CONSPEED
+#define CONSPEED B115200 /* What RedBoot uses */
+#endif
+#ifndef CONMODE
+#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8 | CLOCAL) /* 8N1 */
+#endif
+
+int comcnspeed = CONSPEED;
+int comcnmode = CONMODE;
+
+
+/*
+ * void boot(int howto, char *bootstr)
+ *
+ * Reboots the system
+ *
+ * Deal with any syncing, unmounting, dumping and shutdown hooks,
+ * then reset the CPU.
+ */
+void board_reset(void);
+void
+boot(int howto)
+{
+ /*
+ * If we are still cold then hit the air brakes
+ * and crash to earth fast
+ */
+ if (cold) {
+ doshutdownhooks();
+ if ((howto & (RB_HALT | RB_USERREQ)) != RB_USERREQ) {
+ printf("The operating system has halted.\n");
+ printf("Please press any key to reboot.\n\n");
+ cngetc();
+ }
+ printf("rebooting...\n");
+ delay(60000);
+ cpu_reset();
+ printf("reboot failed; spinning\n");
+ while(1);
+ /*NOTREACHED*/
+ }
+
+ /* Disable console buffering */
+/* cnpollc(1);*/
+
+ /*
+ * If RB_NOSYNC was not specified sync the discs.
+ * Note: Unless cold is set to 1 here, syslogd will die during the
+ * unmount. It looks like syslogd is getting woken up only to find
+ * that it cannot page part of the binary in as the filesystem has
+ * been unmounted.
+ */
+ if (!(howto & RB_NOSYNC))
+ bootsync(howto);
+
+ /* Say NO to interrupts */
+ splhigh();
+
+ /* Do a dump if requested. */
+ if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
+ dumpsys();
+
+ /* Run any shutdown hooks */
+ doshutdownhooks();
+
+ /* Make sure IRQ's are disabled */
+ IRQdisable;
+
+ if (howto & RB_HALT) {
+ printf("The operating system has halted.\n");
+ printf("Please press any key to reboot.\n\n");
+ cngetc();
+ }
+
+ printf("rebooting...\n");
+
+ board_reset();
+ cpu_reset();
+ printf("reboot failed; spinning\n");
+ while(1);
+ /*NOTREACHED*/
+}
+
+/*
+ * Mapping table for core kernel memory. These areas are mapped in
+ * init time at fixed virtual address with section mappings.
+ */
+const struct pmap_devmap iq80321_devmap[] = {
+ /*
+ * Map the on-board devices VA == PA so that we can access them
+ * with the MMU on or off.
+ */
+ {
+ IQ80321_OBIO_BASE,
+ IQ80321_OBIO_BASE,
+ 0x00100000 /* IQ80321_OBIO_SIZE, */,
+ VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE,
+ },
+ {0, 0, 0, 0, 0}
+};
+
+
+/*
+ * u_int initarm(...)
+ *
+ * Initial entry point on startup. This gets called before main() is
+ * entered.
+ * It should be responsible for setting up everything that must be
+ * in place when main is called.
+ * This includes
+ * Taking a copy of the boot configuration structure.
+ * Initialising the physical console so characters can be printed.
+ * Setting up page tables for the kernel
+ * Relocating the kernel to the bottom of physical memory
+ */
+u_int
+initarm(void *arg)
+{
+ extern vaddr_t xscale_cache_clean_addr;
+ int loop;
+ int loop1;
+ u_int l1pagetable;
+ pv_addr_t kernel_l1pt;
+ paddr_t memstart;
+ psize_t memsize;
+ extern u_int32_t esym; /* &_end if no symbols are loaded */
+
+#ifdef DIAGNOSTIC
+ extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */
+#endif
+
+ /* setup a serial console for very early boot */
+ consinit();
+
+ /*
+ * Heads up ... Setup the CPU / MMU / TLB functions
+ */
+ if (set_cpufuncs())
+ panic("cpu not recognized!");
+
+ /*
+ * Examine the boot args string for options we need to know about
+ * now.
+ */
+ /* XXX should really be done after setting up the console, but we
+ * XXX need to parse the console selection flags right now. */
+// process_kernel_args((char *)0xa0200000 - MAX_BOOT_STRING - 1);
+#ifdef RAMDISK_HOOKS
+ boothowto |= RB_DFLTROOT;
+#endif /* RAMDISK_HOOKS */
+
+
+ /* Calibrate the delay loop. */
+#if 1
+ i80321_calibrate_delay();
+#endif
+
+ /* Talk to the user */
+ printf("\nOpenBSD/armish booting ...\n");
+
+ /*
+ * Reset the secondary PCI bus. RedBoot doesn't stop devices
+ * on the PCI bus before handing us control, so we have to
+ * do this.
+ *
+ * XXX This is arguably a bug in RedBoot, and doing this reset
+ * XXX could be problematic in the future if we encounter an
+ * XXX application where the PPB in the i80312 is used as a
+ * XXX PPB.
+ */
+//#define VERBOSE_INIT_ARM
+
+ /*
+ * Fetch the SDRAM start/size from the i80312 SDRAM configuration
+ * registers.
+ */
+ i80321_sdram_bounds(&obio_bs_tag, VERDE_PMMR_BASE + VERDE_MCU_BASE,
+ &memstart, &memsize);
+#if 1
+ memsize = 128* 1024 * 1024;
+#endif
+
+#define DEBUG
+#ifdef DEBUG
+ printf("initarm: Configuring system ...\n");
+#endif
+
+ /* Fake bootconfig structure for the benefit of pmap.c */
+ /* XXX must make the memory description h/w independant */
+ bootconfig.dramblocks = 1;
+ bootconfig.dram[0].address = memstart;
+ bootconfig.dram[0].pages = memsize / PAGE_SIZE;
+
+ /*
+ * Set up the variables that define the availablilty of
+ * physical memory. For now, we're going to set
+ * physical_freestart to 0xa0200000 (where the kernel
+ * was loaded), and allocate the memory we need downwards.
+ * If we get too close to the page tables that RedBoot
+ * set up, we will panic. We will update physical_freestart
+ * and physical_freeend later to reflect what pmap_bootstrap()
+ * wants to see.
+ *
+ * XXX pmap_bootstrap() needs an enema.
+ */
+ physical_start = bootconfig.dram[0].address;
+ physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
+
+ physical_freestart = 0xa0009000UL;
+ physical_freeend = 0xa0200000UL;
+
+ physmem = (physical_end - physical_start) / PAGE_SIZE;
+
+#ifdef DEBUG
+ /* Tell the user about the memory */
+ printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
+ physical_start, physical_end - 1);
+#endif
+
+ /*
+ * Okay, the kernel starts 2MB in from the bottom of physical
+ * memory. We are going to allocate our bootstrap pages downwards
+ * from there.
+ *
+ * We need to allocate some fixed page tables to get the kernel
+ * going. We allocate one page directory and a number of page
+ * tables and store the physical addresses in the kernel_pt_table
+ * array.
+ *
+ * The kernel page directory must be on a 16K boundary. The page
+ * tables must be on 4K bounaries. What we do is allocate the
+ * page directory on the first 16K boundary that we encounter, and
+ * the page tables on 4K boundaries otherwise. Since we allocate
+ * at least 3 L2 page tables, we are guaranteed to encounter at
+ * least one 16K aligned region.
+ */
+
+#ifdef VERBOSE_INIT_ARM
+ printf("Allocating page tables\n");
+#endif
+
+ free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
+
+#ifdef VERBOSE_INIT_ARM
+ printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
+ physical_freestart, free_pages, free_pages);
+#endif
+
+ /* Define a macro to simplify memory allocation */
+#define valloc_pages(var, np) \
+ alloc_pages((var).pv_pa, (np)); \
+ (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
+
+#define alloc_pages(var, np) \
+ physical_freeend -= ((np) * PAGE_SIZE); \
+ if (physical_freeend < physical_freestart) \
+ panic("initarm: out of memory"); \
+ (var) = physical_freeend; \
+ free_pages -= (np); \
+ memset((char *)(var), 0, ((np) * PAGE_SIZE));
+
+ loop1 = 0;
+ kernel_l1pt.pv_pa = 0;
+ for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
+ /* Are we 16KB aligned for an L1 ? */
+ if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
+ && kernel_l1pt.pv_pa == 0) {
+ valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
+ } else {
+ valloc_pages(kernel_pt_table[loop1],
+ L2_TABLE_SIZE / PAGE_SIZE);
+ ++loop1;
+ }
+ }
+
+ /* This should never be able to happen but better confirm that. */
+ if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
+ panic("initarm: Failed to align the kernel page directory");
+
+ /*
+ * Allocate a page for the system page mapped to V0x00000000
+ * This page will just contain the system vectors and can be
+ * shared by all processes.
+ */
+ alloc_pages(systempage.pv_pa, 1);
+
+ /* Allocate stacks for all modes */
+ valloc_pages(irqstack, IRQ_STACK_SIZE);
+ valloc_pages(abtstack, ABT_STACK_SIZE);
+ valloc_pages(undstack, UND_STACK_SIZE);
+ valloc_pages(kernelstack, UPAGES);
+
+ /* Allocate enough pages for cleaning the Mini-Data cache. */
+ KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
+ valloc_pages(minidataclean, 1);
+
+#ifdef VERBOSE_INIT_ARM
+ printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
+ irqstack.pv_va);
+ printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
+ abtstack.pv_va);
+ printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
+ undstack.pv_va);
+ printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
+ kernelstack.pv_va);
+#endif
+
+ /*
+ * XXX Defer this to later so that we can reclaim the memory
+ * XXX used by the RedBoot page tables.
+ */
+ alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
+
+ /*
+ * Ok we have allocated physical pages for the primary kernel
+ * page tables
+ */
+
+#ifdef VERBOSE_INIT_ARM
+ printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
+#endif
+
+ /*
+ * Now we start construction of the L1 page table
+ * We start by mapping the L2 page tables into the L1.
+ * This means that we can replace L1 mappings later on if necessary
+ */
+ l1pagetable = kernel_l1pt.pv_pa;
+
+#ifdef HIGH_VECT
+ /* Map the L2 pages tables in the L1 page table */
+ pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
+ &kernel_pt_table[KERNEL_PT_SYS]);
+#else
+ /* Map the L2 pages tables in the L1 page table */
+ pmap_link_l2pt(l1pagetable, 0x00000000,
+ &kernel_pt_table[KERNEL_PT_SYS]);
+#endif
+ for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
+ pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
+ &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
+ for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
+ pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
+ &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
+// pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
+// &kernel_pt_table[KERNEL_PT_IOPXS]);
+
+ /* update the top of the kernel VM */
+ pmap_curmaxkvaddr =
+ KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
+
+#ifdef VERBOSE_INIT_ARM
+ printf("Mapping kernel\n");
+#endif
+
+ /* Now we fill in the L2 pagetable for the kernel static code/data
+ * and the symbol table. */
+ {
+ extern char etext[], _end[];
+ size_t textsize = (u_int32_t) etext - KERNEL_TEXT_BASE;
+ size_t totalsize = esym - KERNEL_TEXT_BASE;
+ u_int logical;
+printf("kernelsize text %x total %x end %xesym %x\n", textsize, totalsize,
+ _end, esym);
+
+ textsize = round_page(textsize);
+ totalsize = round_page(totalsize);
+
+ logical = 0x00200000; /* offset of kernel in RAM */
+
+ logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
+ physical_start + logical, textsize,
+ VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+ pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
+ physical_start + logical, totalsize - textsize,
+ VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+ }
+
+#ifdef VERBOSE_INIT_ARM
+ printf("Constructing L2 page tables\n");
+#endif
+
+ /* Map the stack pages */
+ pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
+ IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+ pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
+ ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+ pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
+ UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+ pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
+ UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
+
+ pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
+ L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
+
+ for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
+ pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
+ kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
+ VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
+ }
+
+ /* Map the Mini-Data cache clean area. */
+ xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
+ minidataclean.pv_pa);
+
+ /* Map the vector page. */
+#ifdef HIGH_VECT
+ pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
+ VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+#else
+ pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
+ VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+#endif
+
+ pmap_devmap_bootstrap(l1pagetable, iq80321_devmap);
+
+ /*
+ * Give the XScale global cache clean code an appropriately
+ * sized chunk of unmapped VA space starting at 0xff000000
+ * (our device mappings end before this address).
+ */
+ xscale_cache_clean_addr = 0xff000000U;
+
+ /*
+ * Now we have the real page tables in place so we can switch to them.
+ * Once this is done we will be running with the REAL kernel page
+ * tables.
+ */
+
+ /*
+ * Update the physical_freestart/physical_freeend/free_pages
+ * variables.
+ */
+ {
+ physical_freestart = physical_start - KERNEL_BASE +
+ round_page(esym);
+ physical_freeend = physical_end;
+ free_pages =
+ (physical_freeend - physical_freestart) / PAGE_SIZE;
+ }
+ printf("physical_freestart %x end %x\n", physical_freestart,
+ physical_freeend);
+
+ /* be a client to all domains */
+ cpu_domains(0x55555555);
+ /* Switch tables */
+#ifdef VERBOSE_INIT_ARM
+ printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
+ physical_freestart, free_pages, free_pages);
+ printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
+#endif
+
+
+ cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
+ setttb(kernel_l1pt.pv_pa);
+ cpu_tlb_flushID();
+ cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
+
+ /*
+ * Moved from cpu_startup() as data_abort_handler() references
+ * this during uvm init
+ */
+ proc0paddr = (struct user *)kernelstack.pv_va;
+ proc0.p_addr = proc0paddr;
+
+#ifdef VERBOSE_INIT_ARM
+ printf("bootstrap done.\n");
+#endif
+
+#ifdef HIGH_VECT
+ arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
+#else
+ arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
+#endif
+
+ /*
+ * Pages were allocated during the secondary bootstrap for the
+ * stacks for different CPU modes.
+ * We must now set the r13 registers in the different CPU modes to
+ * point to these stacks.
+ * Since the ARM stacks use STMFD etc. we must set r13 to the top end
+ * of the stack memory.
+ */
+#ifdef VERBOSE_INIT_ARM
+ printf("init subsystems: stacks ");
+#endif
+
+ set_stackptr(PSR_IRQ32_MODE,
+ irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
+ set_stackptr(PSR_ABT32_MODE,
+ abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
+ set_stackptr(PSR_UND32_MODE,
+ undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
+
+ /*
+ * Well we should set a data abort handler.
+ * Once things get going this will change as we will need a proper
+ * handler.
+ * Until then we will use a handler that just panics but tells us
+ * why.
+ * Initialisation of the vectors will just panic on a data abort.
+ * This just fills in a slightly better one.
+ */
+#ifdef VERBOSE_INIT_ARM
+ printf("vectors ");
+#endif
+ data_abort_handler_address = (u_int)data_abort_handler;
+ prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
+ undefined_handler_address = (u_int)undefinedinstruction_bounce;
+
+ /* Initialise the undefined instruction handlers */
+#ifdef VERBOSE_INIT_ARM
+ printf("undefined ");
+#endif
+ undefined_init();
+
+ /* Load memory into UVM. */
+#ifdef VERBOSE_INIT_ARM
+ printf("page ");
+#endif
+ uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
+ uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
+ atop(physical_freestart), atop(physical_freeend),
+ VM_FREELIST_DEFAULT);
+
+ /* Boot strap pmap telling it where the kernel page table is */
+#ifdef VERBOSE_INIT_ARM
+ printf("pmap ");
+#endif
+ pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
+ KERNEL_VM_BASE + KERNEL_VM_SIZE);
+
+ /* Setup the IRQ system */
+#ifdef VERBOSE_INIT_ARM
+ printf("irq ");
+#endif
+ i80321_intr_init();
+
+#ifdef VERBOSE_INIT_ARM
+ printf("done.\n");
+#endif
+
+#ifdef DDB
+ db_machine_init();
+
+ /* Firmware doesn't load symbols. */
+ ddb_init();
+
+ if (boothowto & RB_KDB)
+ Debugger();
+#endif
+
+ /* We return the new stack pointer address */
+ return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
+}
+
+void
+process_kernel_args(char *args)
+{
+ char *cp = args;
+
+ if (cp == NULL || *(int *)cp != BOOT_STRING_MAGIC) {
+ boothowto = RB_AUTOBOOT;
+ return;
+ }
+
+ /* Eat the cookie */
+ *(int *)cp = 0;
+ cp += sizeof(int);
+
+ boothowto = 0;
+
+ /* Make a local copy of the bootargs */
+ strncpy(bootargs, cp, MAX_BOOT_STRING - sizeof(int));
+
+ cp = bootargs;
+ boot_file = bootargs;
+
+ /* Skip the kernel image filename */
+ while (*cp != ' ' && *cp != 0)
+ ++cp;
+
+ if (*cp != 0)
+ *cp++ = 0;
+
+ while (*cp == ' ')
+ ++cp;
+
+ boot_args = cp;
+
+ printf("bootfile: %s\n", boot_file);
+ printf("bootargs: %s\n", boot_args);
+
+ /* Setup pointer to boot flags */
+ while (*cp != '-')
+ if (*cp++ == '\0')
+ return;
+
+ for (;*++cp;) {
+ int fl;
+
+ fl = 0;
+ switch(*cp) {
+ case 'a':
+ fl |= RB_ASKNAME;
+ break;
+ case 'c':
+ fl |= RB_CONFIG;
+ break;
+ case 'd':
+ fl |= RB_KDB;
+ break;
+ case 's':
+ fl |= RB_SINGLE;
+ break;
+ default:
+ printf("unknown option `%c'\n", *cp);
+ break;
+ }
+ boothowto |= fl;
+ }
+}
+
+
+void
+consinit(void)
+{
+ static const bus_addr_t comcnaddrs[] = {
+ IQ80321_UART1 /* com0 */
+ };
+ static int consinit_called;
+ uint32_t *p, old;
+
+ p = (void *)0xc0445000;
+ old = *p;
+
+ if (consinit_called != 0)
+ return;
+
+ consinit_called = 1;
+
+ /*
+ * Console devices are mapped VA==PA. Our devmap reflects
+ * this, so register it now so drivers can map the console
+ * device.
+ */
+ pmap_devmap_register(iq80321_devmap);
+
+#if NCOM > 0
+ if (comcnattach(&obio_bs_tag, comcnaddrs[0], comcnspeed,
+ COM_FREQ, comcnmode))
+ panic("can't init serial console @%lx", comcnaddrs[0]);
+ comdefaultrate = comcnspeed;
+#else
+ panic("serial console @%lx not configured", comcnaddrs[0]);
+#endif
+ printf("memory value %x@%p %x\n", 0xc0445000, *(uint32_t*)0xc0445000, old);
+}
+
+void
+board_startup(void)
+{
+ if (boothowto & RB_CONFIG) {
+#ifdef BOOT_CONFIG
+ user_config();
+#else
+ printf("kernel does not support -c; continuing..\n");
+#endif
+ }
+}
diff --git a/sys/arch/armish/armish/armish_start.S b/sys/arch/armish/armish/armish_start.S
new file mode 100644
index 00000000000..aa04db6ad74
--- /dev/null
+++ b/sys/arch/armish/armish/armish_start.S
@@ -0,0 +1,150 @@
+/* $NetBSD: iq80321_start.S,v 1.4 2002/10/14 22:32:54 bjh21 Exp $ */
+
+/*
+ * Copyright (c) 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+#include <arm/armreg.h>
+#include <arm/pte.h>
+
+ .section .start,"ax",%progbits
+
+ .global _C_LABEL(iq80321_start)
+_C_LABEL(iq80321_start):
+ /*
+ * We will go ahead and disable the MMU here so that we don't
+ * have to worry about flushing caches, etc.
+ *
+ * Note that we may not currently be running VA==PA, which means
+ * we'll need to leap to the next insn after disabing the MMU.
+ */
+ adr r8, Lunmapped
+ bic r8, r8, #0xff000000 /* clear upper 8 bits */
+ orr r8, r8, #0xa0000000 /* OR in physical base address */
+
+ mrc p15, 0, r2, c1, c0, 0
+ bic r2, r2, #CPU_CONTROL_MMU_ENABLE
+ mcr p15, 0, r2, c1, c0, 0
+
+ nop
+ nop
+ nop
+
+ mov pc, r8 /* Heave-ho! */
+
+Lunmapped:
+ /*
+ * We want to construct a memory map that maps us
+ * VA==PA (SDRAM at 0xa0000000) and also double-maps
+ * that space at 0xc0000000 (where the kernel address
+ * space starts). We create these mappings uncached
+ * and unbuffered to be safe.
+ *
+ * We also want to map the various devices we want to
+ * talk to VA==PA during bootstrap.
+ *
+ * We just use section mappings for all of this to make it easy.
+ *
+ * We will put the L1 table to do all this at 0xa0004000, which
+ * is also where RedBoot puts it.
+ */
+
+ /*
+ * Step 1: Map the entire address space VA==PA.
+ */
+ adr r0, Ltable
+ ldr r0, [r0] /* r0 = &l1table */
+
+ mov r3, #(L1_S_AP(AP_KRW))
+ orr r3, r3, #(L1_TYPE_S)
+ mov r2, #0x100000 /* advance by 1MB */
+ mov r1, #0x1000 /* 4096MB */
+1:
+ str r3, [r0], #0x04
+ add r3, r3, r2
+ subs r1, r1, #1
+ bgt 1b
+
+ /*
+ * Step 2: Map VA 0xc0000000->0xc3ffffff to PA 0xa0000000->0xa3ffffff.
+ */
+ adr r0, Ltable /* r0 = &l1table */
+ ldr r0, [r0]
+
+ mov r3, #(L1_S_AP(AP_KRW))
+ orr r3, r3, #(L1_TYPE_S)
+ orr r3, r3, #0xa0000000
+ add r0, r0, #(0xc00 * 4) /* offset to 0xc00xxxxx */
+ mov r1, #0x40 /* 64MB */
+1:
+ str r3, [r0], #0x04
+ add r3, r3, r2
+ subs r1, r1, #1
+ bgt 1b
+
+ /* OK! Page table is set up. Give it to the CPU. */
+ adr r0, Ltable
+ ldr r0, [r0]
+ mcr p15, 0, r0, c2, c0, 0
+
+ /* Flush the old TLBs, just in case. */
+ mcr p15, 0, r0, c8, c7, 0
+
+ /* Set the Domain Access register. Very important! */
+ mov r0, #1
+ mcr p15, 0, r0, c3, c0, 0
+
+ /* Get ready to jump to the "real" kernel entry point... */
+ ldr r0, Lstart
+
+ /* OK, let's enable the MMU. */
+ mrc p15, 0, r2, c1, c0, 0
+ orr r2, r2, #CPU_CONTROL_MMU_ENABLE
+ mcr p15, 0, r2, c1, c0, 0
+
+ nop
+ nop
+ nop
+
+ /* CPWAIT sequence to make sure the MMU is on... */
+ mrc p15, 0, r2, c2, c0, 0 /* arbitrary read of CP15 */
+ mov r2, r2 /* force it to complete */
+ mov pc, r0 /* leap to kernel entry point! */
+
+Ltable:
+ .word 0xa0004000
+
+Lstart:
+ .word start
diff --git a/sys/arch/armish/armish/autoconf.c b/sys/arch/armish/armish/autoconf.c
new file mode 100644
index 00000000000..4224bafca90
--- /dev/null
+++ b/sys/arch/armish/armish/autoconf.c
@@ -0,0 +1,477 @@
+/* $OpenBSD: autoconf.c,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: autoconf.c,v 1.2 2001/09/05 16:17:36 matt Exp $ */
+
+/*
+ * Copyright (c) 1994-1998 Mark Brinicombe.
+ * Copyright (c) 1994 Brini.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Mark Brinicombe for
+ * the NetBSD project.
+ * 4. The name of the company nor the name of the author may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * RiscBSD kernel project
+ *
+ * autoconf.c
+ *
+ * Autoconfiguration functions
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/reboot.h>
+#include <sys/disklabel.h>
+#include <sys/device.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <machine/bootconfig.h>
+#include <machine/intr.h>
+
+#include <dev/cons.h>
+
+
+struct device *booted_device;
+int booted_partition;
+
+struct device *bootdv = NULL;
+
+int findblkmajor(struct device *dv);
+char * findblkname(int maj);
+
+void rootconf(void);
+void diskconf(void);
+
+static struct device * getdisk(char *str, int len, int defpart, dev_t *devp);
+struct device *parsedisk(char *, int, int, dev_t *);
+extern char *boot_file;
+
+#include "wd.h"
+#if NWD > 0
+extern struct cfdriver wd_cd;
+#endif
+#include "sd.h"
+#if NSD > 0
+extern struct cfdriver sd_cd;
+#endif
+#include "cd.h"
+#if NCD > 0
+extern struct cfdriver cd_cd;
+#endif
+#if NRD > 0
+extern struct cfdriver rd_cd;
+#endif
+#include "raid.h"
+#if NRAID > 0
+extern struct cfdriver raid_cd;
+#endif
+
+struct genericconf {
+ struct cfdriver *gc_driver;
+ char *gc_name;
+ dev_t gc_major;
+} genericconf[] = {
+#if NWD > 0
+ { &wd_cd, "wd", 16 },
+#endif
+#if NSD > 0
+ { &sd_cd, "sd", 24 },
+#endif
+#if NCD > 0
+ { &cd_cd, "cd", 26 },
+#endif
+#if NRD > 0
+ { &rd_cd, "rd", 18 },
+#endif
+#if NRAID > 0
+ { &raid_cd, "raid", 71 },
+#endif
+ { 0 }
+};
+
+int
+findblkmajor(dv)
+ struct device *dv;
+{
+ char *name = dv->dv_xname;
+ int i;
+
+ for (i = 0; i < sizeof(genericconf)/sizeof(genericconf[0]); ++i)
+ if (strncmp(name, genericconf[i].gc_name,
+ strlen(genericconf[i].gc_name)) == 0)
+ return (genericconf[i].gc_major);
+ return (-1);
+}
+
+char *
+findblkname(maj)
+ int maj;
+{
+ int i;
+
+ for (i = 0; i < sizeof(genericconf)/sizeof(genericconf[0]); ++i)
+ if (maj == genericconf[i].gc_major)
+ return (genericconf[i].gc_name);
+ return (NULL);
+}
+
+static struct device *
+getdisk(char *str, int len, int defpart, dev_t *devp)
+{
+ struct device *dv;
+
+ if ((dv = parsedisk(str, len, defpart, devp)) == NULL) {
+ printf("use one of: reboot");
+ for (dv = alldevs.tqh_first; dv != NULL;
+ dv = dv->dv_list.tqe_next) {
+ if (dv->dv_class == DV_DISK)
+ printf(" %s[a-p]", dv->dv_xname);
+#ifdef NFSCLIENT
+ if (dv->dv_class == DV_IFNET)
+ printf(" %s", dv->dv_xname);
+#endif
+ }
+ printf("\n");
+ }
+ return (dv);
+}
+
+struct device *
+parsedisk(char *str, int len, int defpart, dev_t *devp)
+{
+ struct device *dv;
+ char *cp, c;
+ int majdev, part;
+
+ if (len == 0)
+ return (NULL);
+ cp = str + len - 1;
+ c = *cp;
+ if (c >= 'a' && (c - 'a') < MAXPARTITIONS) {
+ part = c - 'a';
+ *cp = '\0';
+ } else
+ part = defpart;
+
+ for (dv = alldevs.tqh_first; dv != NULL; dv = dv->dv_list.tqe_next) {
+ if (dv->dv_class == DV_DISK &&
+ strcmp(str, dv->dv_xname) == 0) {
+ majdev = findblkmajor(dv);
+ if (majdev < 0)
+ panic("parsedisk");
+ *devp = MAKEDISKDEV(majdev, dv->dv_unit, part);
+ break;
+ }
+#ifdef NFSCLIENT
+ if (dv->dv_class == DV_IFNET &&
+ strcmp(str, dv->dv_xname) == 0) {
+ *devp = NODEV;
+ break;
+ }
+#endif
+ }
+
+ *cp = c;
+ return (dv);
+}
+
+
+/*
+ * Now that we are fully operational, we can checksum the
+ * disks, and using some heuristics, hopefully are able to
+ * always determine the correct root disk.
+ */
+void
+diskconf()
+{
+ /*
+ * Configure root, swap, and dump area. This is
+ * currently done by running the same checksum
+ * algorithm over all known disks, as was done in
+ * /boot. Then we basically fixup the *dev vars
+ * from the info we gleaned from this.
+ */
+#if 0
+ dkcsumattach();
+
+#endif
+ rootconf();
+#if 0
+ dumpconf();
+#endif
+}
+
+
+/*
+ * void cpu_configure()
+ *
+ * Configure all the root devices
+ * The root devices are expected to configure their own children
+ */
+void
+cpu_configure(void)
+{
+ softintr_init();
+
+ /*
+ * Since various PCI interrupts could be routed via the ICU
+ * (for PCI devices in the bridge) we need to set up the ICU
+ * now so that these interrupts can be established correctly
+ * i.e. This is a hack.
+ */
+
+ config_rootfound("mainbus", NULL);
+
+ /*
+ * We can not know which is our root disk, defer
+ * until we can checksum blocks to figure it out.
+ */
+ md_diskconf = diskconf;
+ cold = 0;
+
+ /* Time to start taking interrupts so lets open the flood gates .... */
+ (void)spl0();
+
+}
+
+/*
+ * Attempt to find the device from which we were booted.
+ * If we can do so, and not instructed not to do so,
+ * change rootdev to correspond to the load device.
+ */
+void
+rootconf()
+{
+ int majdev, mindev, unit, part, len;
+ dev_t temp;
+ struct swdevt *swp;
+ struct device *dv;
+ dev_t nrootdev, nswapdev = NODEV;
+ char buf[128];
+ int s;
+
+#if defined(NFSCLIENT)
+ extern char *nfsbootdevname;
+#endif
+
+ if (boothowto & RB_DFLTROOT)
+ return; /* Boot compiled in */
+
+ /*
+ * (raid) device auto-configuration could have returned
+ * the root device's id in rootdev. Check this case.
+ */
+ if (rootdev != NODEV) {
+ majdev = major(rootdev);
+ unit = DISKUNIT(rootdev);
+ part = DISKPART(rootdev);
+
+ len = snprintf(buf, sizeof buf, "%s%d", findblkname(majdev),
+ unit);
+ if (len == -1 || len >= sizeof(buf))
+ panic("rootconf: device name too long");
+
+ bootdv = getdisk(buf, len, part, &rootdev);
+ }
+
+ /* Lookup boot device from boot if not set by configuration */
+ if (bootdv == NULL) {
+ bootdv = parsedisk(boot_file, strlen(boot_file), 0, &temp);
+ }
+ if (bootdv == NULL) {
+ printf("boot device: lookup '%s' failed.\n", boot_file);
+ boothowto |= RB_ASKNAME; /* Don't Panic :-) */
+ /* boothowto |= RB_SINGLE; */
+ } else
+ printf("boot device: %s.\n", bootdv->dv_xname);
+
+ if (boothowto & RB_ASKNAME) {
+ for (;;) {
+ printf("root device ");
+ if (bootdv != NULL)
+ printf("(default %s%c)",
+ bootdv->dv_xname,
+ bootdv->dv_class == DV_DISK
+ ? 'a' : ' ');
+ printf(": ");
+ s = splhigh();
+ cnpollc(1);
+ len = getsn(buf, sizeof(buf));
+
+ cnpollc(0);
+ splx(s);
+ if (len == 0 && bootdv != NULL) {
+ strlcpy(buf, bootdv->dv_xname, sizeof buf);
+ len = strlen(buf);
+ }
+ if (len > 0 && buf[len - 1] == '*') {
+ buf[--len] = '\0';
+ dv = getdisk(buf, len, 1, &nrootdev);
+ if (dv != NULL) {
+ bootdv = dv;
+ nswapdev = nrootdev;
+ goto gotswap;
+ }
+ }
+
+ if ((len == 6) && strncmp(buf, "reboot", 6) == 0)
+ boot(RB_USERREQ);
+
+ dv = getdisk(buf, len, 0, &nrootdev);
+ if (dv != NULL) {
+ bootdv = dv;
+ break;
+ }
+ }
+ /*
+ * because swap must be on same device as root, for
+ * network devices this is easy.
+ */
+ if (bootdv->dv_class == DV_IFNET)
+ goto gotswap;
+
+ for (;;) {
+ printf("swap device ");
+ if (bootdv != NULL)
+ printf("(default %s%c)",
+ bootdv->dv_xname,
+ bootdv->dv_class == DV_DISK?'b':' ');
+ printf(": ");
+ s = splhigh();
+ cnpollc(1);
+ len = getsn(buf, sizeof(buf));
+ cnpollc(0);
+ splx(s);
+ if (len == 0 && bootdv != NULL) {
+ switch (bootdv->dv_class) {
+ case DV_IFNET:
+ nswapdev = NODEV;
+ break;
+ case DV_DISK:
+ nswapdev = MAKEDISKDEV(major(nrootdev),
+ DISKUNIT(nrootdev), 1);
+ break;
+ case DV_TAPE:
+ case DV_TTY:
+ case DV_DULL:
+ case DV_CPU:
+ break;
+ }
+ break;
+ }
+ dv = getdisk(buf, len, 1, &nswapdev);
+ if (dv) {
+ if (dv->dv_class == DV_IFNET)
+ nswapdev = NODEV;
+ break;
+ }
+ }
+
+gotswap:
+ rootdev = nrootdev;
+ dumpdev = nswapdev;
+ swdevt[0].sw_dev = nswapdev;
+ swdevt[1].sw_dev = NODEV;
+ } else if (mountroot == NULL) {
+ /*
+ * `swap generic': Use the device the ROM told us to use.
+ */
+ if (bootdv == NULL)
+ panic("boot device not known");
+
+ majdev = findblkmajor(bootdv);
+
+ if (majdev >= 0) {
+ /*
+ * Root and Swap are on disk.
+ * Boot is always from partition 0.
+ */
+ rootdev = MAKEDISKDEV(majdev, bootdv->dv_unit, 0);
+ nswapdev = MAKEDISKDEV(majdev, bootdv->dv_unit, 1);
+ dumpdev = nswapdev;
+ } else {
+ /*
+ * Root and Swap are on net.
+ */
+ nswapdev = dumpdev = NODEV;
+ }
+ swdevt[0].sw_dev = nswapdev;
+ swdevt[1].sw_dev = NODEV;
+
+ } else {
+
+ /*
+ * `root DEV swap DEV': honour rootdev/swdevt.
+ * rootdev/swdevt/mountroot already properly set.
+ */
+ return;
+ }
+
+ switch (bootdv->dv_class) {
+#if defined(NFSCLIENT)
+ case DV_IFNET:
+ mountroot = nfs_mountroot;
+ nfsbootdevname = bootdv->dv_xname;
+ return;
+#endif
+ case DV_DISK:
+ mountroot = dk_mountroot;
+ majdev = major(rootdev);
+ mindev = minor(rootdev);
+ unit = DISKUNIT(rootdev);
+ part = DISKPART(rootdev);
+ printf("root on %s%c\n", bootdv->dv_xname, part + 'a');
+ break;
+ default:
+ printf("can't figure root, hope your kernel is right\n");
+ return;
+ }
+
+ /*
+ * XXX: What is this doing?
+ */
+ temp = NODEV;
+ for (swp = swdevt; swp->sw_dev != NODEV; swp++) {
+ if (majdev == major(swp->sw_dev) &&
+ unit == DISKUNIT(swp->sw_dev)) {
+ temp = swdevt[0].sw_dev;
+ swdevt[0].sw_dev = swp->sw_dev;
+ swp->sw_dev = temp;
+ break;
+ }
+ }
+ if (swp->sw_dev == NODEV)
+ return;
+
+ /*
+ * If dumpdev was the same as the old primary swap device, move
+ * it to the new primary swap device.
+ */
+ if (temp == dumpdev)
+ dumpdev = swdevt[0].sw_dev;
+}
+/* End of autoconf.c */
diff --git a/sys/arch/armish/compile/.cvsignore b/sys/arch/armish/compile/.cvsignore
new file mode 100644
index 00000000000..b72af3039e6
--- /dev/null
+++ b/sys/arch/armish/compile/.cvsignore
@@ -0,0 +1,2 @@
+GENERIC
+RAMDISK
diff --git a/sys/arch/armish/conf/GENERIC b/sys/arch/armish/conf/GENERIC
new file mode 100644
index 00000000000..b62d7b0829b
--- /dev/null
+++ b/sys/arch/armish/conf/GENERIC
@@ -0,0 +1,168 @@
+# $OpenBSD: GENERIC,v 1.1 2006/05/29 17:13:19 drahn Exp $
+#
+# For further information on compiling OpenBSD kernels, see the config(8)
+# man page.
+#
+# For further information on hardware support for this architecture, see
+# the intro(4) man page. For further information about kernel options
+# for this architecture, see the options(4) man page. For an explanation
+# of each device driver in this file see the section 4 man page for the
+# device.
+
+machine armish arm
+include "../../../conf/GENERIC"
+maxusers 32 # estimated number of users
+
+options ARM32
+
+makeoptions KERNEL_BASE_PHYS="0xa0200000"
+makeoptions KERNEL_BASE_VIRT="0xc0200000"
+makeoptions BOARDTYPE="armish"
+
+options CPU_XSCALE_80321 # Support the XScale core
+options XSCALE_CACHE_READ_WRITE_ALLOCATE
+options CACHE_CLEAN_BLOCK_INTR
+
+#options PERFCTRS # performance counters
+
+option PCIVERBOSE
+
+config bsd swap generic
+
+# The main bus device
+mainbus0 at root
+cpu0 at mainbus?
+obio0 at mainbus?
+
+# On-board 16550 UART
+com0 at obio? addr 0xfe800000 xint 3
+
+# i80321 I/O Processor peripheral support
+iopxs0 at mainbus?
+gpio0 at iopxs0
+
+#iopaau* at iopxs? # Application Accelerator Unit
+#iopiic* at iopxs? # I2C Controller Unit(s)
+#iic0 at iopiic?
+#iic1 at iopiic?
+#iopwdog* at iopxs? # Watchdog timer
+pci0 at iopxs? bus ? # PCI/PCI-X support
+
+
+siop* at pci? disable # NCR 538XX SCSI controllers(new)
+scsibus* at siop?
+em* at pci?
+re* at pci?
+ral* at pci?
+# IDE controllers
+pciide* at pci? flags 0x0000
+wd* at pciide? flags 0x0000
+
+
+sd* at scsibus? # SCSI disk drives
+#st* at scsibus? # SCSI tape drives
+cd* at scsibus? # SCSI CD-ROM drives
+#ch* at scsibus? # SCSI autochangers
+#ss* at scsibus? # SCSI scanners
+#uk* at scsibus? # unknown SCSI
+
+# USB Controllers
+ohci* at pci? # Open Host Controller
+uhci* at pci? # Universal Host Controller
+ehci* at pci? # Enhanced Host Controller
+
+# USB bus support
+usb* at ohci?
+usb* at uhci?
+usb* at ehci?
+
+# USB devices
+uhub* at usb? # USB Hubs
+uhub* at uhub? # USB Hubs
+umodem* at uhub? # USB Modems/Serial
+ucom* at umodem?
+uvisor* at uhub? # Handspring Visor
+ucom* at uvisor?
+uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
+ucom* at uvscom?
+ubsa* at uhub? # Belkin serial adapter
+ucom* at ubsa?
+uftdi* at uhub? # FTDI FT8U100AX serial adapter
+ucom* at uftdi?
+uplcom* at uhub? # I/O DATA USB-RSAQ2 serial adapter
+ucom* at uplcom?
+umct* at uhub? # MCT USB-RS232 serial adapter
+ucom* at umct?
+uipaq* at uhub? # iPAQ serial adapter
+ucom* at uipaq?
+umsm* at uhub? # Qualcomm MSM EVDO
+ucom* at umsm?
+uaudio* at uhub? # USB Audio
+audio* at uaudio?
+umidi* at uhub? # USB MIDI
+midi* at umidi?
+ulpt* at uhub? # USB Printers
+umass* at uhub? # USB Mass Storage devices
+scsibus* at umass?
+atapiscsi* at umass?
+uhidev* at uhub? # Human Interface Devices
+ums* at uhidev? # USB mouse
+wsmouse* at ums? mux 0
+ukbd* at uhidev? # USB keyboard
+wskbd* at ukbd? mux 1
+uhid* at uhidev? # USB generic HID support
+aue* at uhub? # ADMtek AN986 Pegasus Ethernet
+atu* at uhub? # Atmel AT76c50x based 802.11b
+axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
+cue* at uhub? # CATC USB-EL1201A based Ethernet
+kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
+cdce* at uhub? # CDC Ethernet
+upl* at uhub? # Prolific PL2301/PL2302 host-to-host `network'
+udav* at uhub? # Davicom DM9601 based Ethernet
+url* at uhub? # Realtek RTL8150L based adapters
+wi* at uhub? # WaveLAN IEEE 802.11DS
+urio* at uhub? # Diamond Multimedia Rio 500
+uscanner* at uhub? # USB Scanners
+usscanner* at uhub? # USB SCSI scanners, e.g., HP5300
+scsibus* at usscanner?
+#uyap* at uhub? # Y@P firmware loader
+udsbr* at uhub? # D-Link DSB-R100 radio
+radio* at udsbr? # USB radio
+#ubt* at uhub? # USB Bluetooth
+ugen* at uhub? # USB Generic driver
+ural* at uhub? # Ralink RT2500
+#udcf* at uhub? # Gude Expert mouseCLOCK
+
+amphy* at mii? # AMD 79C873 PHYs
+dcphy* at mii? # Digital Clone PHYs
+exphy* at mii? # 3Com internal PHYs
+inphy* at mii? # Intel 82555 PHYs
+iophy* at mii? # Intel 82553 PHYs
+icsphy* at mii? # ICS1890 PHYs
+lxtphy* at mii? # Level One LXT-970 PHYs
+nsphy* at mii? # NS83840 PHYs
+#nsphyter* at mii? # NS83843 PHYs
+mtdphy* at mii? # Myson MTD972 PHYs
+acphy* at mii? # Altima AC101 PHYs
+qsphy* at mii? # Quality Semi QS6612 PHYs
+luphy* at mii? # Lucent LU6612 PHY
+sqphy* at mii? # Seeq 8022[013] PHYs
+rlphy* at mii? # RealTek 8139 internal PHYs
+#tlphy* at mii? # ThunderLAN PHYs
+tqphy* at mii? # TDK Semiconductor PHYs
+brgphy* at mii? # Broadcom 10/100/1000 PHYs
+bmtphy* at mii? # Broadcom 10/100 PHYs
+eephy* at mii? # Marvell 88E1000 Gigabit PHYs
+urlphy* at mii? # Realtek RTL8150L internal PHY
+rgephy* at mii? # Realtek 8169S/8110S PHY
+rlphy* at mii? # Realtek 8139 internal PHYs
+ciphy* at mii? # Cicada CS8201 10/100/1000 copper PHY
+ukphy* at mii? # generic unknown PHYs
+
+# mouse & keyboard multiplexor pseudo-devices
+#pseudo-device wsmux 2
+pseudo-device crypto 1
+pseudo-device bio 1 # ioctl multiplexing device
+pseudo-device hotplug 1 # devices hot plugging
+#pseudo-device raid 4 # RAIDframe disk driver
+
diff --git a/sys/arch/armish/conf/Makefile.armish b/sys/arch/armish/conf/Makefile.armish
new file mode 100644
index 00000000000..4806cdde4ca
--- /dev/null
+++ b/sys/arch/armish/conf/Makefile.armish
@@ -0,0 +1,223 @@
+# $OpenBSD: Makefile.armish,v 1.1 2006/05/29 17:13:19 drahn Exp $
+# $NetBSD: Makefile.i386,v 1.67 1996/05/11 16:12:11 mycroft Exp $
+
+# Makefile for OpenBSD
+#
+# This makefile is constructed from a machine description:
+# config machineid
+# Most changes should be made in the machine description
+# /sys/arch/armish/conf/``machineid''
+# after which you should do
+# config machineid
+# Machine generic makefile changes should be made in
+# /sys/arch/armish/conf/Makefile.armish
+# after which config should be rerun for all machines of that type.
+#
+# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
+# IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
+#
+# -DTRACE compile in kernel tracing hooks
+# -DQUOTA compile in file system quotas
+
+# DEBUG is set to -g if debugging.
+# PROF is set to -pg if profiling.
+
+.include <bsd.own.mk>
+
+MKDEP?= mkdep
+SIZE?= size
+STRIP?= strip
+
+# source tree is located via $S relative to the compilation directory
+.ifndef S
+S!= cd ../../../..; pwd
+.endif
+THISARM= $S/arch/armish
+ARM= $S/arch/arm
+
+INCLUDES= -nostdinc -I. -I$S/arch -I$S
+CPPFLAGS= ${INCLUDES} ${IDENT} -D_KERNEL -D__armish__
+CDIAGFLAGS= -Werror -Wall -Wstrict-prototypes -Wmissing-prototypes \
+ -Wno-uninitialized -Wno-format -Wno-main
+
+CMACHFLAGS= -ffreestanding
+#CMACHFLAGS= -march=armv4 -mtune=strongarm -ffreestanding
+.if ${IDENT:M-DNO_PROPOLICE}
+CMACHFLAGS+= -fno-stack-protector
+.endif
+CMACHFLAGS+= -msoft-float -fno-builtin-printf -fno-builtin-log
+
+COPTS?= -O2
+CFLAGS= ${DEBUG} ${CDIAGFLAGS} ${CMACHFLAGS} ${COPTS} ${PIPE}
+AFLAGS= -x assembler-with-cpp -D_LOCORE ${CMACHFLAGS}
+#LINKFLAGS= -Ttext 0xF0000020 -e start --warn-common
+#LINKFLAGS= -T ${THISARM}/conf/kern.ldscript
+LINKFLAGS= -T ldscript
+LINKFLAGS+= --warn-common
+STRIPFLAGS= -g -X -x
+
+HOSTCC= ${CC}
+HOSTED_CPPFLAGS=${CPPFLAGS:S/^-nostdinc$//}
+HOSTED_CFLAGS= ${CFLAGS}
+
+### find out what to use for libkern
+.include "$S/lib/libkern/Makefile.inc"
+.ifndef PROF
+LIBKERN= ${KERNLIB}
+.else
+LIBKERN= ${KERNLIB_PROF}
+.endif
+
+### find out what to use for libcompat
+.include "$S/compat/common/Makefile.inc"
+.ifndef PROF
+LIBCOMPAT= ${COMPATLIB}
+.else
+LIBCOMPAT= ${COMPATLIB_PROF}
+.endif
+
+# compile rules: rules are named ${TYPE}_${SUFFIX}${CONFIG_DEP}
+# where TYPE is NORMAL, DRIVER, or PROFILE; SUFFIX is the file suffix,
+# capitalized (e.g. C for a .c file), and CONFIG_DEP is _C if the file
+# is marked as config-dependent.
+
+NORMAL_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
+NORMAL_C_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $<
+
+DRIVER_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
+DRIVER_C_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $<
+
+NORMAL_S= ${CC} ${AFLAGS} ${CPPFLAGS} -c $<
+NORMAL_S_C= ${CC} ${AFLAGS} ${CPPFLAGS} ${PARAM} -c $<
+
+HOSTED_C= ${HOSTCC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $<
+
+%OBJS
+
+%CFILES
+
+%SFILES
+
+# load lines for config "xxx" will be emitted as:
+# xxx: ${SYSTEM_DEP} swapxxx.o
+# ${SYSTEM_LD_HEAD}
+# ${SYSTEM_LD} swapxxx.o
+# ${SYSTEM_LD_TAIL}
+SYSTEM_OBJ= ${BOARDTYPE}_start.o locore.o \
+ param.o ioconf.o ${OBJS} ${LIBKERN} ${LIBCOMPAT}
+SYSTEM_DEP= Makefile ${SYSTEM_OBJ}
+SYSTEM_LD_HEAD= rm -f $@
+SYSTEM_LD_HEAD+=; \
+ cat ${ARM}/conf/ldscript.head ${ARM}/conf/ldscript.tail | \
+ sed -e 's/@KERNEL_BASE_PHYS@/${KERNEL_BASE_PHYS}/' \
+ -e 's/@KERNEL_BASE_VIRT@/${KERNEL_BASE_VIRT}/' \
+ > ldscript
+
+SYSTEM_LD= @echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_OBJ}' vers.o; \
+ ${LD} ${LINKFLAGS} -o $@ ${SYSTEM_OBJ} vers.o
+SYSTEM_LD_TAIL= @${SIZE} $@; chmod 755 $@
+
+DEBUG?=
+.if ${DEBUG} == "-g"
+LINKFLAGS+= -X
+SYSTEM_LD_TAIL+=; \
+ echo cp $@ $@.gdb; rm -f $@.gdb; cp $@ $@.gdb; \
+ echo ${STRIP} ${STRIPFLAGS} $@; ${STRIP} ${STRIPFLAGS} $@
+.else
+LINKFLAGS+= -x
+.endif
+
+%LOAD
+
+assym.h: $S/kern/genassym.sh ${ARM}/arm/genassym.cf Makefile
+ cat ${ARM}/arm/genassym.cf | \
+ sh $S/kern/genassym.sh ${CC} ${CFLAGS} \
+ ${CPPFLAGS} ${PARAM} > assym.h.tmp && \
+ mv -f assym.h.tmp assym.h
+
+param.c: $S/conf/param.c
+ rm -f param.c
+ cp $S/conf/param.c .
+
+param.o: param.c Makefile
+ ${NORMAL_C_C}
+
+ioconf.o: ioconf.c
+ ${NORMAL_C}
+
+newvers: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP}
+ sh $S/conf/newvers.sh
+ ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c
+
+
+clean::
+ rm -f eddep *bsd bsd.gdb tags *.[io] [a-z]*.s \
+ [Ee]rrs linterrs makelinks assym.h
+
+lint:
+ @lint -hbxncez -Dvolatile= ${CPPFLAGS} ${PARAM} -UKGDB \
+ ${CFILES} ioconf.c param.c | \
+ grep -v 'static function .* unused'
+
+tags:
+ @echo "see $S/kern/Makefile for tags"
+
+links:
+ egrep '#if' ${CFILES} | sed -f $S/conf/defines | \
+ sed -e 's/:.*//' -e 's/\.c/.o/' | sort -u > dontlink
+ echo ${CFILES} | tr -s ' ' '\12' | sed 's/\.c/.o/' | \
+ sort -u | comm -23 - dontlink | \
+ sed 's,.*/\(.*.o\),rm -f \1; ln -s ../GENERIC/\1 \1,' > makelinks
+ sh makelinks && rm -f dontlink makelinks
+
+SRCS= ${ARM}/arm/locore.S \
+ param.c ioconf.c ${CFILES} ${SFILES}
+depend:: .depend
+.depend: ${SRCS} assym.h param.c ${APMINC}
+ ${MKDEP} ${AFLAGS} ${CPPFLAGS} ${ARM}/arm/locore.S
+ ${MKDEP} -a ${CFLAGS} ${CPPFLAGS} param.c ioconf.c ${CFILES}
+.if ${SFILES} != ""
+ ${MKDEP} -a ${AFLAGS} ${CPPFLAGS} ${SFILES}
+.endif
+ cat ${ARM}/arm/genassym.cf ${ARM}/footbridge/genassym.cf | \
+ sh $S/kern/genassym.sh ${MKDEP} -f assym.dep ${CFLAGS} \
+ ${CPPFLAGS}
+ @sed -e 's/.*\.o:.* /assym.h: /' < assym.dep >> .depend
+ @rm -f assym.dep
+
+
+# depend on root or device configuration
+autoconf.o conf.o: Makefile
+
+# depend on network or filesystem configuration
+uipc_domain.o uipc_proto.o vfs_conf.o: Makefile
+if.o if_tun.o if_loop.o if_ethersubr.o: Makefile
+if_arp.o if_ether.o: Makefile
+ip_input.o ip_output.o in_pcb.o in_proto.o: Makefile
+tcp_subr.o tcp_timer.o tcp_output.o: Makefile
+
+# depend on maxusers
+machdep.o: Makefile
+
+# depend on CPU configuration
+locore.o machdep.o: Makefile
+
+${BOARDTYPE}_start.o: ${THISARM}/armish/${BOARDTYPE}_start.S assym.h
+ ${NORMAL_S}
+
+locore.o: ${ARM}/arm/locore.S assym.h
+ ${NORMAL_S}
+
+# The install target can be redefined by putting a
+# install-kernel-${MACHINE_NAME} target into /etc/mk.conf
+MACHINE_NAME!= uname -n
+install: install-kernel-${MACHINE_NAME}
+.if !target(install-kernel-${MACHINE_NAME}})
+install-kernel-${MACHINE_NAME}:
+ rm -f /obsd
+ ln /bsd /obsd
+ cp bsd /nbsd
+ mv /nbsd /bsd
+.endif
+
+%RULES
diff --git a/sys/arch/armish/conf/RAMDISK b/sys/arch/armish/conf/RAMDISK
new file mode 100644
index 00000000000..ffe7bd68625
--- /dev/null
+++ b/sys/arch/armish/conf/RAMDISK
@@ -0,0 +1,190 @@
+# $OpenBSD: RAMDISK,v 1.1 2006/05/29 17:13:19 drahn Exp $
+#
+# For further information on compiling OpenBSD kernels, see the config(8)
+# man page.
+#
+# For further information on hardware support for this architecture, see
+# the intro(4) man page. For further information about kernel options
+# for this architecture, see the options(4) man page. For an explanation
+# of each device driver in this file see the section 4 man page for the
+# device.
+
+machine armish arm
+maxusers 32 # estimated number of users
+
+options ARM32
+
+#makeoptions KERNEL_BASE_PHYS="0xa0200000"
+makeoptions KERNEL_BASE_PHYS="0x00200000"
+makeoptions KERNEL_BASE_VIRT="0xc0200000"
+makeoptions BOARDTYPE="armish"
+
+option CPU_XSCALE_80321 # Support the XScale core
+option XSCALE_CACHE_READ_WRITE_ALLOCATE
+option CACHE_CLEAN_BLOCK_INTR
+
+#option PERFCTRS # performance counters
+
+option PCIVERBOSE
+
+option DST=0 # daylight saving time used by RTC
+option FFS # UFS
+option CD9660 # ISO 9660 + Rock Ridge file system
+option MSDOSFS # MS-DOS file system
+option INET # IP + ICMP + TCP + UDP
+option INET6 # IPv6 (needs INET)
+option DDB # kernel debugger
+option EXT2FS # Second Extended Filesystem
+option FIFO # FIFOs; RECOMMENDED
+
+
+config bsd root on rd0a swap on rd0b
+
+
+# The main bus device
+mainbus0 at root
+cpu0 at mainbus?
+obio0 at mainbus?
+
+# On-board 16550 UART
+#com0 at obio? addr 0xfe810000 xint 3
+com0 at obio? addr 0xfe800000 xint 0
+
+# i80321 I/O Processor peripheral support
+iopxs0 at mainbus?
+
+#iopaau* at iopxs? # Application Accelerator Unit
+#iopiic* at iopxs? # I2C Controller Unit(s)
+#iic0 at iopiic?
+#iic1 at iopiic?
+#iopwdog* at iopxs? # Watchdog timer
+pci0 at iopxs? bus ? # PCI/PCI-X support
+
+
+siop* at pci? disable # NCR 538XX SCSI controllers(new)
+scsibus* at siop?
+em* at pci?
+re* at pci?
+ral* at pci?
+# IDE controllers
+pciide* at pci? flags 0x0000
+wd* at pciide? flags 0x0000
+
+
+sd* at scsibus? # SCSI disk drives
+#st* at scsibus? # SCSI tape drives
+cd* at scsibus? # SCSI CD-ROM drives
+#ch* at scsibus? # SCSI autochangers
+#ss* at scsibus? # SCSI scanners
+#uk* at scsibus? # unknown SCSI
+
+# USB Controllers
+ohci* at pci? # Open Host Controller
+uhci* at pci? # Universal Host Controller
+ehci* at pci? # Enhanced Host Controller
+
+# USB bus support
+usb* at ohci?
+usb* at uhci?
+usb* at ehci?
+
+# USB devices
+uhub* at usb? # USB Hubs
+uhub* at uhub? # USB Hubs
+umodem* at uhub? # USB Modems/Serial
+ucom* at umodem?
+uvisor* at uhub? # Handspring Visor
+ucom* at uvisor?
+uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
+ucom* at uvscom?
+ubsa* at uhub? # Belkin serial adapter
+ucom* at ubsa?
+uftdi* at uhub? # FTDI FT8U100AX serial adapter
+ucom* at uftdi?
+uplcom* at uhub? # I/O DATA USB-RSAQ2 serial adapter
+ucom* at uplcom?
+umct* at uhub? # MCT USB-RS232 serial adapter
+ucom* at umct?
+uipaq* at uhub? # iPAQ serial adapter
+ucom* at uipaq?
+umsm* at uhub? # Qualcomm MSM EVDO
+ucom* at umsm?
+uaudio* at uhub? # USB Audio
+audio* at uaudio?
+umidi* at uhub? # USB MIDI
+midi* at umidi?
+ulpt* at uhub? # USB Printers
+umass* at uhub? # USB Mass Storage devices
+scsibus* at umass?
+atapiscsi* at umass?
+uhidev* at uhub? # Human Interface Devices
+ums* at uhidev? # USB mouse
+wsmouse* at ums? mux 0
+ukbd* at uhidev? # USB keyboard
+wskbd* at ukbd? mux 1
+uhid* at uhidev? # USB generic HID support
+aue* at uhub? # ADMtek AN986 Pegasus Ethernet
+atu* at uhub? # Atmel AT76c50x based 802.11b
+axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
+cue* at uhub? # CATC USB-EL1201A based Ethernet
+kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
+cdce* at uhub? # CDC Ethernet
+upl* at uhub? # Prolific PL2301/PL2302 host-to-host `network'
+udav* at uhub? # Davicom DM9601 based Ethernet
+url* at uhub? # Realtek RTL8150L based adapters
+wi* at uhub? # WaveLAN IEEE 802.11DS
+urio* at uhub? # Diamond Multimedia Rio 500
+uscanner* at uhub? # USB Scanners
+usscanner* at uhub? # USB SCSI scanners, e.g., HP5300
+scsibus* at usscanner?
+#uyap* at uhub? # Y@P firmware loader
+udsbr* at uhub? # D-Link DSB-R100 radio
+radio* at udsbr? # USB radio
+#ubt* at uhub? # USB Bluetooth
+ugen* at uhub? # USB Generic driver
+ural* at uhub? # Ralink RT2500
+#udcf* at uhub? # Gude Expert mouseCLOCK
+
+amphy* at mii? # AMD 79C873 PHYs
+dcphy* at mii? # Digital Clone PHYs
+exphy* at mii? # 3Com internal PHYs
+inphy* at mii? # Intel 82555 PHYs
+iophy* at mii? # Intel 82553 PHYs
+icsphy* at mii? # ICS1890 PHYs
+lxtphy* at mii? # Level One LXT-970 PHYs
+nsphy* at mii? # NS83840 PHYs
+#nsphyter* at mii? # NS83843 PHYs
+mtdphy* at mii? # Myson MTD972 PHYs
+acphy* at mii? # Altima AC101 PHYs
+qsphy* at mii? # Quality Semi QS6612 PHYs
+luphy* at mii? # Lucent LU6612 PHY
+sqphy* at mii? # Seeq 8022[013] PHYs
+rlphy* at mii? # RealTek 8139 internal PHYs
+#tlphy* at mii? # ThunderLAN PHYs
+tqphy* at mii? # TDK Semiconductor PHYs
+brgphy* at mii? # Broadcom 10/100/1000 PHYs
+bmtphy* at mii? # Broadcom 10/100 PHYs
+eephy* at mii? # Marvell 88E1000 Gigabit PHYs
+urlphy* at mii? # Realtek RTL8150L internal PHY
+rgephy* at mii? # Realtek 8169S/8110S PHY
+rlphy* at mii? # Realtek 8139 internal PHYs
+ciphy* at mii? # Cicada CS8201 10/100/1000 copper PHY
+ukphy* at mii? # generic unknown PHYs
+
+# mouse & keyboard multiplexor pseudo-devices
+#pseudo-device wsmux 2
+pseudo-device crypto 1
+pseudo-device bio 1 # ioctl multiplexing device
+pseudo-device hotplug 1 # devices hot plugging
+#pseudo-device raid 4 # RAIDframe disk driver
+
+#
+pseudo-device loop 1 # network loopback
+pseudo-device bpfilter 1 # packet filter
+pseudo-device rd 1 # ram disk
+
+option BOOT_CONFIG # boot-time kernel config
+
+# RAMDISK stuff
+option MINIROOTSIZE=5120
+option RAMDISK_HOOKS
diff --git a/sys/arch/armish/conf/files.armish b/sys/arch/armish/conf/files.armish
new file mode 100644
index 00000000000..a1b51e52dbe
--- /dev/null
+++ b/sys/arch/armish/conf/files.armish
@@ -0,0 +1,72 @@
+maxpartitions 16
+maxusers 2 8 64
+
+major {sd = 24}
+major {cd = 26}
+major {rd = 18}
+
+file arch/arm/arm/conf.c
+file arch/armish/armish/armish_machdep.c
+
+file arch/armish/armish/autoconf.c
+file arch/arm/arm/disksubr.c disk
+
+include "../../../scsi/files.scsi"
+
+# Use the generic ARM soft interrupt code.
+file arch/arm/arm/softintr.c
+file arch/arm/arm/irq_dispatch.S
+
+#file arch/armish/dev/iq80310_7seg.c
+#file arch/armish/dev/iq80310_intr.c
+#file arch/armish/dev/iq80310_timer.c
+
+define i2c_bitbang
+
+
+# IQ80310 on-board devices (including CPLD)
+device obio {addr, [size = -1], [width = -1], [xint = -1]}: bus_space_generic
+attach obio at mainbus
+file arch/armish/dev/obio.c obio
+file arch/armish/dev/obio_space.c obio
+
+# on-board XR 16550 UARTs
+attach com at obio with com_obio
+file arch/armish/dev/com_obio.c com_obio
+
+# Machine-independent I2O drivers.
+include "dev/i2o/files.i2o"
+
+# ARM i80321 files
+include "arch/arm/xscale/files.i80321"
+
+attach iopxs at mainbus with iopxs_mainbus
+file arch/armish/dev/i80321_mainbus.c iopxs_mainbus
+file arch/armish/dev/pci_addr_fixup.c iopxs
+file arch/armish/dev/iq80321_pci.c iopxs
+file arch/armish/dev/pciide_machdep.c iopxs
+
+#
+# Machine-independent ATA drivers
+#
+include "dev/ata/files.ata"
+
+# Include WSCONS stuff
+include "dev/wscons/files.wscons"
+
+# Include USB stuff
+include "dev/usb/files.usb"
+
+# Media Independent Interface (mii)
+include "dev/mii/files.mii"
+
+# PCI
+include "../../../dev/pci/files.pci"
+
+include "../../../dev/atapiscsi/files.atapiscsi"
+
+
+#
+# Machine-independent GPIO drivers
+#
+include "dev/gpio/files.gpio"
diff --git a/sys/arch/armish/dev/com_obio.c b/sys/arch/armish/dev/com_obio.c
new file mode 100644
index 00000000000..9c6f4467faa
--- /dev/null
+++ b/sys/arch/armish/dev/com_obio.c
@@ -0,0 +1,166 @@
+/* $NetBSD: com_obio.c,v 1.9 2005/12/11 12:17:09 christos Exp $ */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas <matt@3am-software.com>.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/termios.h>
+
+#include <machine/bus.h>
+
+#include <arm/xscale/i80321var.h>
+#include <armish/dev/obiovar.h>
+
+#include <dev/ic/comreg.h>
+#include <dev/ic/comvar.h>
+
+struct com_obio_softc {
+ struct com_softc sc_com;
+
+ void *sc_ih;
+};
+
+int com_obio_match(struct device *, void *, void *);
+void com_obio_attach(struct device *, struct device *, void *);
+
+struct cfattach com_obio_ca = {
+ sizeof(struct com_obio_softc), com_obio_match, com_obio_attach
+};
+
+struct cfdriver com_obio_cd = {
+ NULL, "com_obio", DV_DULL
+};
+
+int
+com_obio_match(struct device *parent, void *cf, void *aux)
+{
+
+ /* We take it on faith that the device is there. */
+ return (1);
+}
+
+int comintr0(void *a);
+int comintr1(void *a);
+int comintr2(void *a);
+int comintr3(void *a);
+int
+comintr0(void *a)
+{
+ return comintr(a);
+}
+int
+comintr1(void *a)
+{
+ return comintr(a);
+}
+int
+comintr2(void *a)
+{
+ return comintr(a);
+}
+int
+comintr3(void *a)
+{
+ return comintr(a);
+}
+
+uint32_t get_pending_irq(void);
+
+struct com_softc *console_comsc;
+int poll_console(void);
+int poll_console()
+{
+ int ret;
+#if 0
+ uint32_t pending0, pending1;
+ pending0 = get_pending_irq();
+#endif
+ ret = comintr(console_comsc);
+#if 0
+ if (ret != 0) {
+ pending1 = get_pending_irq();
+ printf("serviced com irq, opending %x npending %x\n",
+ pending0, pending1);
+ }
+#endif
+ return ret;
+}
+void
+com_obio_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct obio_attach_args *oba = aux;
+ struct com_obio_softc *osc = (void *) self;
+ struct com_softc *sc = &osc->sc_com;
+ int error;
+
+ console_comsc = sc;
+ sc->sc_iot = oba->oba_st;
+ sc->sc_iobase = oba->oba_addr;
+ sc->sc_frequency = COM_FREQ;
+/* sc->sc_hwflags = COM_HW_NO_TXPRELOAD; */
+ sc->sc_hwflags = 0;
+ error = bus_space_map(sc->sc_iot, oba->oba_addr, 8, 0, &sc->sc_ioh);
+
+ if (error) {
+ printf(": failed to map registers: %d\n", error);
+ return;
+ }
+
+ com_attach_subr(sc);
+ oba->oba_irq = 0x1c;
+#if 1
+ osc->sc_ih = i80321_intr_establish(oba->oba_irq, IPL_TTY,
+ comintr, sc, sc->sc_dev.dv_xname);
+#else
+#define ICU_INT_XINT0 27
+#define ICU_INT_XINT(x) ((x) + ICU_INT_XINT0)
+#if 1
+ osc->sc_ih = i80321_intr_establish(ICU_INT_XINT(0), IPL_TTY,
+ comintr0, sc, sc->sc_dev.dv_xname);
+#endif
+ osc->sc_ih = i80321_intr_establish(ICU_INT_XINT(1), IPL_TTY,
+ comintr1, sc, sc->sc_dev.dv_xname);
+ osc->sc_ih = i80321_intr_establish(ICU_INT_XINT(2), IPL_TTY,
+ comintr2, sc, sc->sc_dev.dv_xname);
+ osc->sc_ih = i80321_intr_establish(ICU_INT_XINT(3), IPL_TTY,
+ comintr3, sc, sc->sc_dev.dv_xname);
+#endif
+ if (osc->sc_ih == NULL)
+ printf("%s: unable to establish interrupt at CPLD irq %d\n",
+ sc->sc_dev.dv_xname, oba->oba_irq);
+}
diff --git a/sys/arch/armish/dev/i80321_mainbus.c b/sys/arch/armish/dev/i80321_mainbus.c
new file mode 100644
index 00000000000..42cd8b30dda
--- /dev/null
+++ b/sys/arch/armish/dev/i80321_mainbus.c
@@ -0,0 +1,375 @@
+/* $NetBSD: i80321_mainbus.c,v 1.16 2005/12/15 01:44:00 briggs Exp $ */
+
+/*
+ * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * IQ80321 front-end for the i80321 I/O Processor. We take care
+ * of setting up the i80321 memory map, PCI interrupt routing, etc.,
+ * which are all specific to the board the i80321 is wired up to.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/gpio.h>
+
+#include <machine/bus.h>
+
+#include <armish/dev/iq80321reg.h>
+#include <armish/dev/iq80321var.h>
+
+#include <arm/xscale/i80321reg.h>
+#include <arm/xscale/i80321var.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcidevs.h>
+#include <dev/gpio/gpiovar.h>
+
+#include "gpio.h"
+
+int i80321_mainbus_match(struct device *, void *, void *);
+void i80321_mainbus_attach(struct device *, struct device *, void *);
+
+void i80321_gpio_init (struct i80321_softc *sc);
+int i80321_gpio_pin_read (void *, int);
+void i80321_gpio_pin_write (void *, int, int);
+void i80321_gpio_pin_ctl (void *, int, int);
+
+/* XXX */
+#define I80219_REG_GPOE 0x7C4
+#define I80219_REG_GPID 0x7C8
+#define I80219_REG_GPOD 0x7CC
+
+struct cfattach iopxs_mainbus_ca = {
+ sizeof(struct i80321_softc), i80321_mainbus_match,
+ i80321_mainbus_attach
+};
+
+struct cfdriver iopxs_cd = {
+ NULL, "iopxs", DV_DULL
+};
+
+
+/* There can be only one. */
+int i80321_mainbus_found;
+
+int
+i80321_mainbus_match(struct device *parent, void *cf, void *aux)
+{
+#if 0
+ struct mainbus_attach_args *ma = aux;
+#endif
+
+ if (i80321_mainbus_found)
+ return (0);
+
+#if 1
+ /* XXX Shoot arch/arm/mainbus in the head. */
+ return (1);
+#else
+ if (strcmp(cf->cf_name, ma->ma_name) == 0)
+ return (1);
+
+ return (0);
+#endif
+}
+
+void
+i80321_mainbus_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct i80321_softc *sc = (void *) self;
+ struct gpiobus_attach_args gba;
+ pcireg_t b0u, b0l, b1u, b1l;
+ paddr_t memstart;
+ psize_t memsize;
+ pcireg_t foo;
+
+ i80321_mainbus_found = 1;
+
+ /*
+ * Fill in the space tag for the i80321's own devices,
+ * and hand-craft the space handle for it (the device
+ * was mapped during early bootstrap).
+ */
+ i80321_bs_init(&i80321_bs_tag, sc);
+ sc->sc_st = &i80321_bs_tag;
+ if (bus_space_map(sc->sc_st, VERDE_PMMR_BASE, VERDE_PMMR_SIZE, 0,
+ &sc->sc_sh))
+ panic("%s: unable to map VERDE registers", sc->sc_dev.dv_xname);
+
+ /*
+ * Slice off a subregion for the Memory Controller -- we need it
+ * here in order read the memory size.
+ */
+ if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_MCU_BASE,
+ VERDE_MCU_SIZE, &sc->sc_mcu_sh))
+ panic("%s: unable to subregion MCU registers",
+ sc->sc_dev.dv_xname);
+
+ if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_ATU_BASE,
+ VERDE_ATU_SIZE, &sc->sc_atu_sh))
+ panic("%s: unable to subregion ATU registers",
+ sc->sc_dev.dv_xname);
+
+ if(bus_space_map(sc->sc_st, VERDE_OUT_XLATE_IO_WIN0_BASE,
+ VERDE_OUT_XLATE_IO_WIN_SIZE, 0, &sc->sc_io_sh))
+ panic("%s: unable to map IOW registers", sc->sc_dev.dv_xname);
+
+ printf ("PIRSR %x\n", bus_space_read_4(sc->sc_st, sc->sc_sh, ICU_PIRSR));
+
+ printf("mapping bus io to %x - %x\n", sc->sc_io_sh, sc->sc_io_sh+VERDE_OUT_XLATE_IO_WIN_SIZE);
+
+ /*
+ * Initialize the interrupt part of our PCI chipset tag.
+ */
+ iq80321_pci_init(&sc->sc_pci_chipset, sc);
+
+ /* Initialize the PCI chipset tag. */
+ i80321_pci_init(&sc->sc_pci_chipset, sc);
+
+ sc->sc_membus_space.bus_base = 0x40000000;
+ sc->sc_membus_space.bus_size = 0x10000000;
+
+ pci_addr_fixup(sc, 2/*XXX*/);
+
+ /*
+ * Check the configuration of the ATU to see if another BIOS
+ * has configured us. If a PC BIOS didn't configure us, then:
+ * IQ80321: BAR0 00000000.0000000c BAR1 is 00000000.8000000c.
+ * IQ31244: BAR0 00000000.00000004 BAR1 is 00000000.0000000c.
+ * If a BIOS has configured us, at least one of those should be
+ * different. This is pretty fragile, but it's not clear what
+ * would work better.
+ */
+ b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
+ b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
+ b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
+ b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
+ b0l &= PCI_MAPREG_MEM_ADDR_MASK;
+ b0u &= PCI_MAPREG_MEM_ADDR_MASK;
+ b1l &= PCI_MAPREG_MEM_ADDR_MASK;
+ b1u &= PCI_MAPREG_MEM_ADDR_MASK;
+
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0,
+ 0xffffffff);
+ foo = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0,
+ b0l);
+
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4,
+ 0xffffffff);
+ foo = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4,
+ b0u);
+
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8,
+ 0xffffffff);
+ foo = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8,
+ b1l);
+
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc,
+ 0xffffffff);
+ foo = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc,
+ b1u);
+
+ printf(": i80321 I/O Processor\n");
+
+ i80321_sdram_bounds(sc->sc_st, sc->sc_mcu_sh, &memstart, &memsize);
+ printf("memstart %x, memsize %x\n", memstart, memsize);
+
+ /*
+ * We set up the Inbound Windows as follows:
+ *
+ * 0 Access to i80321 PMMRs
+ *
+ * 1 Reserve space for private devices
+ *
+ * 2 RAM access
+ *
+ * 3 Unused.
+ *
+ * This chunk needs to be customized for each IOP321 application.
+ */
+#if 0
+ sc->sc_iwin[0].iwin_base_lo = VERDE_PMMR_BASE;
+ sc->sc_iwin[0].iwin_base_hi = 0;
+ sc->sc_iwin[0].iwin_xlate = VERDE_PMMR_BASE;
+ sc->sc_iwin[0].iwin_size = VERDE_PMMR_SIZE;
+#else
+ sc->sc_iwin[0].iwin_base_lo = 0;
+ sc->sc_iwin[0].iwin_base_hi = 0;
+ sc->sc_iwin[0].iwin_xlate = 0;
+ sc->sc_iwin[0].iwin_size = 0;
+#endif
+
+ /* Map PCI:Local 1:1. */
+ sc->sc_iwin[1].iwin_base_lo = 0x40000000 |
+#if 0
+ PCI_MAPREG_MEM_PREFETCHABLE_MASK |
+ PCI_MAPREG_MEM_TYPE_64BIT;
+#else
+ 0;
+#endif
+ sc->sc_iwin[1].iwin_base_hi = 0;
+
+ sc->sc_iwin[1].iwin_xlate = 0;
+ sc->sc_iwin[1].iwin_size = 0x08000000;
+
+// sc->sc_iwin[2].iwin_base_lo = memstart |
+ sc->sc_iwin[2].iwin_base_lo = 0 |
+ PCI_MAPREG_MEM_PREFETCHABLE_MASK |
+ PCI_MAPREG_MEM_TYPE_64BIT;
+ sc->sc_iwin[2].iwin_base_hi = 0;
+
+ sc->sc_iwin[2].iwin_xlate = memstart;
+ sc->sc_iwin[2].iwin_size = memsize;
+
+ sc->sc_iwin[3].iwin_base_lo = 0;
+ sc->sc_iwin[3].iwin_base_hi = 0;
+ sc->sc_iwin[3].iwin_xlate = 0;
+ sc->sc_iwin[3].iwin_size = 0;
+
+ /*
+ * We set up the Outbound Windows as follows:
+ *
+ * 0 Access to private PCI space.
+ *
+ * 1 Unused.
+ */
+ printf("setup outbound %x %x\n",
+ PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo),
+ sc->sc_iwin[1].iwin_base_hi);
+ sc->sc_owin[0].owin_xlate_lo =
+ PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo);
+ sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi;
+
+ /*
+ * Set the Secondary Outbound I/O window to map
+ * to PCI address 0 for all 64K of the I/O space.
+ */
+// sc->sc_ioout_xlate = 0;
+ sc->sc_ioout_xlate = 0x90000000;
+ sc->sc_ioout_xlate_offset = 0x1000;
+
+ i80321_attach(sc);
+
+ i80321_gpio_init (sc);
+
+ /* if 80219 */ {
+ gba.gba_name = "gpio";
+ gba.gba_gc = &sc->sc_gpio_gc;
+ gba.gba_pins = sc->sc_gpio_pins;
+ gba.gba_npins = I80219_GPIO_NPINS;
+#if NGPIO > 0
+ config_found(&sc->sc_dev, &gba, gpiobus_print);
+#endif
+ }
+
+}
+
+void
+i80321_gpio_init (struct i80321_softc *sc)
+{
+ int i;
+ for (i = 0; i < I80219_GPIO_NPINS; i++) {
+ sc->sc_gpio_pins[i].pin_num = i;
+ sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
+
+ sc->sc_gpio_pins[i].pin_flags =
+ bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE) &
+ (1 << i) ? GPIO_PIN_INPUT : GPIO_PIN_OUTPUT;
+ sc->sc_gpio_pins[i].pin_state = i80321_gpio_pin_read(sc, i) ?
+ GPIO_PIN_HIGH : GPIO_PIN_LOW;
+ }
+ sc->sc_gpio_gc.gp_cookie = sc;
+ sc->sc_gpio_gc.gp_pin_read = i80321_gpio_pin_read;
+ sc->sc_gpio_gc.gp_pin_write = i80321_gpio_pin_write;
+ sc->sc_gpio_gc.gp_pin_ctl = i80321_gpio_pin_ctl;
+}
+
+int
+i80321_gpio_pin_read (void *arg, int pin)
+{
+ struct i80321_softc *sc = arg;
+ u_int32_t regval;
+ int reg;
+
+ if (bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE)
+ & (1 << pin)) {
+ reg = I80219_REG_GPID;
+ } else {
+ reg = I80219_REG_GPOD;
+ }
+ regval = bus_space_read_4(sc->sc_st, sc->sc_sh, reg);
+#if 0
+ printf("read %x gpio %x\n", reg);
+ printf("gpio state %x %x %x\n",
+ bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPID),
+ bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOD),
+ bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE));
+#endif
+ return ((regval >> pin) & 1);
+}
+
+void
+i80321_gpio_pin_write (void *arg, int pin, int value)
+{
+ struct i80321_softc *sc = arg;
+ u_int32_t regval;
+
+ regval = bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOD);
+ regval = (regval & ~(1 << pin)) | ((value & 1) << pin);
+#if 0
+ printf("writing %x to gpioO %x\n", regval);
+#endif
+ bus_space_write_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOD, regval);
+}
+void
+i80321_gpio_pin_ctl (void *arg, int pin, int flags)
+{
+ struct i80321_softc *sc = arg;
+ u_int32_t regval;
+ int value = (flags == GPIO_PIN_INPUT) ? 1 : 0;
+
+ regval = bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE);
+ regval = (regval & ~(1 << pin)) | ((value & 1) << pin);
+#if 0
+ printf("writing %x to ctl %x\n", regval, value);
+#endif
+ bus_space_write_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE, regval);
+}
diff --git a/sys/arch/armish/dev/iq80321_pci.c b/sys/arch/armish/dev/iq80321_pci.c
new file mode 100644
index 00000000000..0eb0dc2310f
--- /dev/null
+++ b/sys/arch/armish/dev/iq80321_pci.c
@@ -0,0 +1,216 @@
+/* $NetBSD: iq80321_pci.c,v 1.5 2005/12/11 12:17:09 christos Exp $ */
+
+/*
+ * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * IQ80321 PCI interrupt support.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+
+#include <armish/dev/iq80321reg.h>
+#include <armish/dev/iq80321var.h>
+
+#include <arm/xscale/i80321reg.h>
+#include <arm/xscale/i80321var.h>
+
+#include <dev/pci/pcidevs.h>
+#include <dev/pci/ppbreg.h>
+
+int iq80321_pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
+const char *iq80321_pci_intr_string(void *, pci_intr_handle_t);
+const struct evcnt *iq80321_pci_intr_evcnt(void *, pci_intr_handle_t);
+void *iq80321_pci_intr_establish(void *, pci_intr_handle_t,
+ int, int (*func)(void *), void *, char *);
+void iq80321_pci_intr_disestablish(void *, void *);
+
+void
+iq80321_pci_init(pci_chipset_tag_t pc, void *cookie)
+{
+
+ pc->pc_intr_v = cookie; /* the i80321 softc */
+ pc->pc_intr_map = iq80321_pci_intr_map;
+ pc->pc_intr_string = iq80321_pci_intr_string;
+ pc->pc_intr_establish = iq80321_pci_intr_establish;
+ pc->pc_intr_disestablish = iq80321_pci_intr_disestablish;
+}
+
+int
+iq80321_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
+{
+ struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
+ pci_chipset_tag_t pc = pa->pa_pc;
+ pcitag_t tag = pa->pa_intrtag;
+
+ int b, d, f;
+ uint32_t busno;
+ uint32_t intr;
+
+ /*
+ * The IQ80321's interrupts are routed like so:
+ *
+ * XINT0 i82544 Gig-E
+ *
+ * XINT1 UART
+ *
+ * XINT2 INTA# from S-PCI-X slot
+ *
+ * XINT3 INTB# from S-PCI-X slot
+ */
+
+ busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
+ busno = PCIXSR_BUSNO(busno);
+ if (busno == 0xff)
+ busno = 0;
+
+ pci_decompose_tag(pc, tag, &b, &d, &f);
+
+ /* No mappings for devices not on our bus. */
+ if (b != busno)
+ goto no_mapping;
+
+ switch (d) {
+#if 1
+ case 1: /* theucs re(4) 0 */
+ if (pa->pa_intrpin == 1) {
+ *ihp = ICU_INT_XINT(2); /* 29 */
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+
+ return (0);
+ }
+ goto no_mapping;
+ case 2: /* theucs re(4) 1 */
+ if (pa->pa_intrpin == 1) {
+ *ihp = ICU_INT_XINT(2); /* 30 */
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+ return (0);
+ }
+ goto no_mapping;
+#endif
+ case 3: /* thecus sata */
+ if (pa->pa_intrpin == 1) {
+ *ihp = ICU_INT_XINT(2);
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+ return (0);
+ }
+ goto no_mapping;
+ case 4: /* thecus */
+#if 0
+ if (pa->pa_intrpin == 1) { /* thecus uhci1 */
+ *ihp = ICU_INT_XINT(2);
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+ return (0);
+ }
+#endif
+#if 0
+ if (pa->pa_intrpin == 2) { /* thecus uhci1 */
+ *ihp = ICU_INT_XINT(2);
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+ return (0);
+ }
+#endif
+ if (pa->pa_intrpin == 3) { /* thecus ehci1 */
+ *ihp = ICU_INT_XINT(2);
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+ return (0);
+ }
+ goto no_mapping;
+ case 5: /* thecus minipci slot */
+ if (pa->pa_intrpin == 1) {
+ *ihp = ICU_INT_XINT(3);
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+ return (0);
+ }
+ goto no_mapping;
+ case 6: /* S-PCI-X slot */
+ if (pa->pa_intrpin == 1) {
+ *ihp = ICU_INT_XINT(2);
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+ return (0);
+ }
+ if (pa->pa_intrpin == 2) {
+ *ihp = ICU_INT_XINT(3);
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, *ihp);
+ return (0);
+ }
+ goto no_mapping;
+
+ default:
+ no_mapping:
+ intr = pci_conf_read(pa->pa_pc, pa->pa_intrtag,
+ PCI_INTERRUPT_REG);
+
+ printf("iq80321_pci_intr_map: no mapping for %d/%d/%d (%d, %d, %d)\n",
+ pa->pa_bus, pa->pa_device, pa->pa_function, d, pa->pa_intrpin, intr);
+ return (1);
+ }
+
+ return (0);
+}
+
+const char *
+iq80321_pci_intr_string(void *v, pci_intr_handle_t ih)
+{
+
+ return (i80321_irqnames[ih]);
+}
+
+const struct evcnt *
+iq80321_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
+{
+
+ /* XXX For now. */
+ return (NULL);
+}
+
+void *
+iq80321_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
+ int (*func)(void *), void *arg, char *name)
+{
+
+ return (i80321_intr_establish(ih, ipl, func, arg, name));
+}
+
+void
+iq80321_pci_intr_disestablish(void *v, void *cookie)
+{
+
+ i80321_intr_disestablish(cookie);
+}
diff --git a/sys/arch/armish/dev/iq80321reg.h b/sys/arch/armish/dev/iq80321reg.h
new file mode 100644
index 00000000000..35c7e834c48
--- /dev/null
+++ b/sys/arch/armish/dev/iq80321reg.h
@@ -0,0 +1,107 @@
+/* $NetBSD: iq80321reg.h,v 1.4 2003/05/14 19:46:39 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _IQ80321REG_H_
+#define _IQ80321REG_H_
+
+/*
+ * Memory map and register definitions for the Intel IQ80321
+ * Evaluation Board.
+ */
+
+/*
+ * The memory map of the IQ80321 looks like so:
+ *
+ * ------------------------------
+ * Intel 80321 IOP Reserved
+ * FFFF E900 ------------------------------
+ * Peripheral Memory Mapped
+ * Registers
+ * FFFF E000 ------------------------------
+ * On-board devices
+ * FE80 0000 ------------------------------
+ * SDRAM
+ * A000 0000 ------------------------------
+ * Reserved
+ * 9100 0000 ------------------------------
+ * Flash
+ * 9080 0000 ------------------------------
+ * Reserved
+ * 9002 0000 ------------------------------
+ * ATU Outbound Transaction
+ * Windows
+ * 8000 0000 ------------------------------
+ * ATU Outbound Direct
+ * Addressing Windows
+ * 0000 1000 ------------------------------
+ * Initialization Boot Code
+ * from Flash
+ * 0000 0000 ------------------------------
+ */
+
+/*
+ * We allocate a page table for VA 0xfe400000 (4MB) and map the
+ * PCI I/O space (64K) and i80321 memory-mapped registers (4K) there.
+ */
+#if 0
+#define IQ80321_IOPXS_VBASE 0xfe400000UL
+#define IQ80321_IOW_VBASE IQ80321_IOPXS_VBASE
+#define IQ80321_80321_VBASE (IQ80321_IOW_VBASE + \
+ VERDE_OUT_XLATE_IO_WIN_SIZE)
+#endif
+
+/*
+ * The IQ80321 on-board devices are mapped VA==PA during bootstrap.
+ * Conveniently, the size of the on-board register space is 1 section
+ * mapping.
+ */
+#define IQ80321_OBIO_BASE 0xfe800000UL
+#define IQ80321_OBIO_SIZE 0x00100000UL /* 1MB */
+
+#define IQ80321_UART1 0xfe800000UL /* TI 16550 */
+
+#define IQ80321_7SEG_MSB 0xfe840000UL
+#define IQ80321_7SEG_LSB 0xfe850000UL
+
+#define IQ80321_ROT_SWITCH 0xfe8d0000UL
+
+#define IQ80321_BATTERY_STAT 0xfe8f0000UL
+#define BATTERY_STAT_PRES (1U << 0)
+#define BATTERY_STAT_CHRG (1U << 1)
+#define BATTERY_STAT_DISCHRG (1U << 2)
+
+#endif /* _IQ80321REG_H_ */
diff --git a/sys/arch/armish/dev/iq80321var.h b/sys/arch/armish/dev/iq80321var.h
new file mode 100644
index 00000000000..1c2e1404cfb
--- /dev/null
+++ b/sys/arch/armish/dev/iq80321var.h
@@ -0,0 +1,52 @@
+/* $NetBSD: iq80321var.h,v 1.1 2002/03/27 21:51:30 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _IQ80321_IQ80321VAR_H_
+#define _IQ80321_IQ80321VAR_H_
+
+#include <dev/pci/pcivar.h>
+
+void iq80321_7seg(char, char);
+void iq80321_7seg_snake(void);
+
+void iq80321_pci_init(pci_chipset_tag_t, void *);
+void save_ref(void);
+void check_ref(void);
+
+void pci_addr_fixup(void *, int maxbus);
+
+#endif /* _IQ80321_IQ80321VAR_H_ */
diff --git a/sys/arch/armish/dev/obio.c b/sys/arch/armish/dev/obio.c
new file mode 100644
index 00000000000..cdd2bee1850
--- /dev/null
+++ b/sys/arch/armish/dev/obio.c
@@ -0,0 +1,142 @@
+/* $NetBSD: obio.c,v 1.14 2005/12/11 12:17:09 christos Exp $ */
+
+/*
+ * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * On-board device autoconfiguration support for Intel IQ80321
+ * evaluation boards.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+
+#include <arm/xscale/i80321reg.h>
+#include <armish/dev/iq80321reg.h>
+#include <armish/dev/iq80321var.h>
+#include <armish/dev/obiovar.h>
+
+int obio_match(struct device *, void *, void *);
+void obio_attach(struct device *, struct device *, void *);
+
+struct cfattach obio_ca = {
+ sizeof(struct device), obio_match, obio_attach
+};
+
+struct cfdriver obio_cd = {
+ NULL, "obio", DV_DULL
+};
+
+int obio_print(void *, const char *);
+int obio_search(struct device *, void *, void *);
+
+/* there can be only one */
+int obio_found;
+
+int
+obio_match(struct device *parent, void *v, void *aux)
+{
+#if 0
+ struct mainbus_attach_args *ma = aux;
+#endif
+
+ if (obio_found)
+ return (0);
+
+#if 1
+ /* XXX Shoot arch/arm/mainbus in the head. */
+ return (1);
+#else
+ if (strcmp(cf->cf_name, ma->ma_name) == 0)
+ return (1);
+
+ return (0);
+#endif
+}
+
+void
+obio_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct device *sc = self;
+
+
+ obio_found = 1;
+
+ printf("\n");
+
+ /*
+ * Attach all the on-board devices as described in the kernel
+ * configuration file.
+ */
+ config_search(obio_search, self, sc);
+}
+
+int
+obio_print(void *aux, const char *pnp)
+{
+ struct obio_attach_args *oba = aux;
+
+ printf(" addr 0x%08lx", oba->oba_addr);
+
+ if (oba->oba_irq != -1)
+ printf(" intr %d", oba->oba_irq);
+
+
+ return (UNCONF);
+}
+
+int
+obio_search(struct device *parent, void *v, void *aux)
+{
+ struct obio_attach_args oba;
+ struct cfdata *cf = v;
+
+ oba.oba_st = &obio_bs_tag;
+ oba.oba_addr = cf->cf_loc[0];
+ oba.oba_size = cf->cf_loc[1];
+ oba.oba_width = cf->cf_loc[2];
+ if (cf->cf_loc[3] != -1)
+ oba.oba_irq = ICU_INT_XINT(cf->cf_loc[3]);
+ else
+ oba.oba_irq = -1;
+
+ config_found(parent, &oba, obio_print);
+
+
+ return (0);
+}
diff --git a/sys/arch/armish/dev/obio_space.c b/sys/arch/armish/dev/obio_space.c
new file mode 100644
index 00000000000..4949a32b76a
--- /dev/null
+++ b/sys/arch/armish/dev/obio_space.c
@@ -0,0 +1,230 @@
+/* $NetBSD: obio_space.c,v 1.9 2005/11/24 13:08:33 yamt Exp $ */
+
+
+/*
+ * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * bus_space functions for IQ80321 on-board devices
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/bus.h>
+
+/* Prototypes for all the bus_space structure functions */
+bs_protos(obio);
+bs_protos(generic);
+bs_protos(generic_armv4);
+bs_protos(bs_notimpl);
+
+/*
+ * The obio bus space tag. This is constant for all instances, so
+ * we never have to explicitly "create" it.
+ */
+struct bus_space obio_bs_tag = {
+ /* cookie */
+ (void *) 0,
+
+ /* mapping/unmapping */
+ obio_bs_map,
+ obio_bs_unmap,
+ obio_bs_subregion,
+
+ /* allocation/deallocation */
+ obio_bs_alloc,
+ obio_bs_free,
+
+ /* get kernel virtual address */
+ obio_bs_vaddr,
+
+ /* mmap */
+ bs_notimpl_bs_mmap,
+
+ /* barrier */
+ obio_bs_barrier,
+
+ /* read (single) */
+ generic_bs_r_1,
+ generic_armv4_bs_r_2,
+ generic_bs_r_4,
+ bs_notimpl_bs_r_8,
+
+ /* read multiple */
+ generic_bs_rm_1,
+ generic_armv4_bs_rm_2,
+ bs_notimpl_bs_rm_4,
+ bs_notimpl_bs_rm_8,
+
+ /* read region */
+ generic_bs_rr_1,
+ bs_notimpl_bs_rr_2,
+ bs_notimpl_bs_rr_4,
+ bs_notimpl_bs_rr_8,
+
+ /* write (single) */
+ generic_bs_w_1,
+ generic_armv4_bs_w_2,
+ generic_bs_w_4,
+ bs_notimpl_bs_w_8,
+
+ /* write multiple */
+ generic_bs_wm_1,
+ generic_armv4_bs_wm_2,
+ bs_notimpl_bs_wm_4,
+ bs_notimpl_bs_wm_8,
+
+ /* write region */
+ bs_notimpl_bs_wr_1,
+ bs_notimpl_bs_wr_2,
+ bs_notimpl_bs_wr_4,
+ bs_notimpl_bs_wr_8,
+
+ /* set multiple */
+ bs_notimpl_bs_sm_1,
+ bs_notimpl_bs_sm_2,
+ bs_notimpl_bs_sm_4,
+ bs_notimpl_bs_sm_8,
+
+ /* set region */
+ bs_notimpl_bs_sr_1,
+ bs_notimpl_bs_sr_2,
+ bs_notimpl_bs_sr_4,
+ bs_notimpl_bs_sr_8,
+
+ /* copy */
+ bs_notimpl_bs_c_1,
+ bs_notimpl_bs_c_2,
+ bs_notimpl_bs_c_4,
+ bs_notimpl_bs_c_8,
+};
+
+int
+obio_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
+ bus_space_handle_t *bshp)
+{
+ const struct pmap_devmap *pd;
+ paddr_t startpa, endpa, pa;
+ vaddr_t va;
+ pt_entry_t *pte;
+
+ if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
+ /* Device was statically mapped. */
+ *bshp = pd->pd_va + (bpa - pd->pd_pa);
+ return (0);
+ }
+
+ endpa = round_page(bpa + size);
+ startpa = trunc_page(bpa);
+
+ va = uvm_km_valloc(kernel_map, endpa - startpa);
+ if (va == 0)
+ return(ENOMEM);
+
+ *bshp = (bus_space_handle_t)(va + (bpa - startpa));
+
+ for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
+ pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE);
+ if ((flag & BUS_SPACE_MAP_CACHEABLE) == 0) {
+ pte = vtopte(va);
+ *pte &= ~L2_S_CACHE_MASK;
+ PTE_SYNC(pte);
+ }
+ }
+ pmap_update(pmap_kernel());
+
+ return (0);
+}
+
+int
+obio_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
+ bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap,
+ bus_space_handle_t *bshp)
+{
+
+ panic("obio_bs_alloc(): not implemented");
+}
+
+
+void
+obio_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
+{
+ vaddr_t va, endva;
+
+ if (pmap_devmap_find_va(bsh, size) != NULL) {
+ /* Device was statically mapped; nothing to do. */
+ return;
+ }
+
+ endva = round_page(bsh + size);
+ va = trunc_page(bsh);
+
+ pmap_kremove(va, endva - va);
+ uvm_km_free(kernel_map, va, endva - va);
+}
+
+void
+obio_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
+{
+
+ panic("obio_bs_free(): not implemented");
+}
+
+int
+obio_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
+ bus_size_t size, bus_space_handle_t *nbshp)
+{
+
+ *nbshp = bsh + offset;
+ return (0);
+}
+
+void *
+obio_bs_vaddr(void *t, bus_space_handle_t bsh)
+{
+
+ return ((void *)bsh);
+}
+
+void
+obio_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
+ bus_size_t len, int flags)
+{
+
+ /* Nothing to do. */
+}
diff --git a/sys/arch/armish/dev/obiovar.h b/sys/arch/armish/dev/obiovar.h
new file mode 100644
index 00000000000..406cc46f740
--- /dev/null
+++ b/sys/arch/armish/dev/obiovar.h
@@ -0,0 +1,51 @@
+/* $NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _IQ80321_OBIOVAR_H_
+#define _IQ80321_OBIOVAR_H_
+
+struct obio_attach_args {
+ bus_space_tag_t oba_st; /* bus space tag */
+ bus_addr_t oba_addr; /* address of device */
+ bus_size_t oba_size; /* size of device */
+ int oba_width; /* bus width */
+ int oba_irq; /* XINT interrupt bit # */
+};
+
+extern struct bus_space obio_bs_tag;
+
+#endif /* _IQ80321_OBIOVAR_H_ */
diff --git a/sys/arch/armish/dev/pci_addr_fixup.c b/sys/arch/armish/dev/pci_addr_fixup.c
new file mode 100644
index 00000000000..9b814994605
--- /dev/null
+++ b/sys/arch/armish/dev/pci_addr_fixup.c
@@ -0,0 +1,466 @@
+/* $OpenBSD: pci_addr_fixup.c,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: pci_addr_fixup.c,v 1.7 2000/08/03 20:10:45 nathanw Exp $ */
+
+/*-
+ * Copyright (c) 2000 UCHIYAMA Yasushi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <sys/extent.h>
+
+#include <uvm/uvm_param.h>
+#include <machine/bus.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#include <arm/xscale/i80321var.h>
+#include <armish/dev/iq80321var.h>
+
+typedef int (*pciaddr_resource_manage_func_t)(struct i80321_softc *,
+ pci_chipset_tag_t, pcitag_t, int, struct extent *, int, bus_addr_t *,
+ bus_size_t);
+void pciaddr_resource_manage(struct i80321_softc *,
+ pci_chipset_tag_t, pcitag_t, pciaddr_resource_manage_func_t);
+void pciaddr_resource_reserve(struct i80321_softc *,
+ pci_chipset_tag_t, pcitag_t);
+int pciaddr_do_resource_reserve(struct i80321_softc *,
+ pci_chipset_tag_t, pcitag_t, int, struct extent *, int,
+ bus_addr_t *, bus_size_t);
+void pciaddr_resource_allocate(struct i80321_softc *,
+ pci_chipset_tag_t, pcitag_t);
+int pciaddr_do_resource_allocate(struct i80321_softc *,
+ pci_chipset_tag_t, pcitag_t, int, struct extent *, int, bus_addr_t *,
+ bus_size_t);
+bus_addr_t pciaddr_ioaddr(u_int32_t);
+void pciaddr_print_devid(pci_chipset_tag_t, pcitag_t);
+
+int pciaddr_device_is_agp(pci_chipset_tag_t, pcitag_t);
+
+void pci_device_foreach(struct i80321_softc *sc, pci_chipset_tag_t pc,
+ int maxbus,
+ void (*func)(struct i80321_softc *, pci_chipset_tag_t, pcitag_t));
+
+#define PCIADDR_MEM_START 0x0
+#define PCIADDR_MEM_END 0xffffffff
+#define PCIADDR_PORT_START 0x0
+#define PCIADDR_PORT_END 0xffff
+
+int pcibr_flags = 0;
+#define PCIBR_VERBOSE 1
+#define PCIBR_ADDR_FIXUP 2
+
+#define PCIBIOS_PRINTV(x) if (pcibr_flags & PCIBR_VERBOSE) \
+ printf x
+
+void
+pci_addr_fixup(void *v, int maxbus)
+{
+ struct i80321_softc *sc = v;
+
+ const char *verbose_header =
+ "[%s]-----------------------\n"
+ " device vendor product\n"
+ " register space address size\n"
+ "--------------------------------------------\n";
+ const char *verbose_footer =
+ "--------------------------[%3d devices bogus]\n";
+
+ sc->extent_mem = extent_create("PCI I/O memory space",
+ sc->sc_membus_space.bus_base,
+ sc->sc_membus_space.bus_base + sc->sc_membus_space.bus_size,
+ M_DEVBUF, 0, 0, EX_NOWAIT);
+ KASSERT(sc->extent_mem);
+ sc->extent_port = extent_create("PCI I/O port space",
+ PCIADDR_PORT_START, PCIADDR_PORT_END,
+ M_DEVBUF, 0, 0, EX_NOWAIT);
+ KASSERT(sc->extent_port);
+
+ /*
+ * 1. check & reserve system BIOS setting.
+ */
+ PCIBIOS_PRINTV((verbose_header, "System BIOS Setting"));
+ pci_device_foreach(sc, &sc->sc_pci_chipset, maxbus,
+ pciaddr_resource_reserve);
+ PCIBIOS_PRINTV((verbose_footer, sc->nbogus));
+
+ {
+ struct extent_region *rp;
+ struct extent *ex = sc->extent_mem;
+ for (rp = LIST_FIRST(&ex->ex_regions);
+ rp; rp = LIST_NEXT(rp, er_link)) {
+ }
+ }
+ {
+ struct extent_region *rp;
+ struct extent *ex = sc->extent_port;
+ for (rp = LIST_FIRST(&ex->ex_regions);
+ rp; rp = LIST_NEXT(rp, er_link)) {
+ }
+ }
+
+ if (sc->nbogus == 0)
+ return; /* no need to fixup */
+
+ /*
+ * 4. do fixup
+ */
+ PCIBIOS_PRINTV((verbose_header, "PCIBIOS fixup stage"));
+ sc->nbogus = 0;
+ pci_device_foreach(sc, &sc->sc_pci_chipset, maxbus,
+ pciaddr_resource_allocate);
+ PCIBIOS_PRINTV((verbose_footer, sc->nbogus));
+
+}
+
+void
+pciaddr_resource_reserve(struct i80321_softc *sc, pci_chipset_tag_t pc,
+ pcitag_t tag)
+{
+ if (pcibr_flags & PCIBR_VERBOSE)
+ pciaddr_print_devid(pc, tag);
+ pciaddr_resource_manage(sc, pc, tag, pciaddr_do_resource_reserve);
+}
+
+void
+pciaddr_resource_allocate(struct i80321_softc *sc, pci_chipset_tag_t pc,
+ pcitag_t tag)
+{
+ if (pcibr_flags & PCIBR_VERBOSE)
+ pciaddr_print_devid(pc, tag);
+ pciaddr_resource_manage(sc, pc, tag, pciaddr_do_resource_allocate);
+}
+
+void
+pciaddr_resource_manage(struct i80321_softc *sc, pci_chipset_tag_t pc,
+ pcitag_t tag, pciaddr_resource_manage_func_t func)
+{
+ struct extent *ex;
+ pcireg_t val, mask;
+ bus_addr_t addr;
+ bus_size_t size;
+ int error, mapreg, type, reg_start, reg_end, width;
+
+ val = pci_conf_read(pc, tag, PCI_BHLC_REG);
+ switch (PCI_HDRTYPE_TYPE(val)) {
+ default:
+ printf("WARNING: unknown PCI device header.\n");
+ sc->nbogus++;
+ return;
+ case 0:
+ reg_start = PCI_MAPREG_START;
+ reg_end = PCI_MAPREG_END;
+ break;
+ case 1: /* PCI-PCI bridge */
+ reg_start = PCI_MAPREG_START;
+ reg_end = PCI_MAPREG_PPB_END;
+ break;
+ case 2: /* PCI-CardBus bridge */
+ reg_start = PCI_MAPREG_START;
+ reg_end = PCI_MAPREG_PCB_END;
+ break;
+ }
+ error = 0;
+
+ for (mapreg = reg_start; mapreg < reg_end; mapreg += width) {
+ /* inquire PCI device bus space requirement */
+ val = pci_conf_read(pc, tag, mapreg);
+ pci_conf_write(pc, tag, mapreg, ~0);
+
+ mask = pci_conf_read(pc, tag, mapreg);
+ pci_conf_write(pc, tag, mapreg, val);
+
+ type = PCI_MAPREG_TYPE(val);
+ width = 4;
+ if (type == PCI_MAPREG_TYPE_MEM) {
+ if (PCI_MAPREG_MEM_TYPE(val) ==
+ PCI_MAPREG_MEM_TYPE_64BIT) {
+ /* XXX We could examine the upper 32 bits
+ * XXX of the BAR here, but we are totally
+ * XXX unprepared to handle a non-zero value,
+ * XXX either here or anywhere else in
+ * XXX i386-land.
+ * XXX So just arrange to not look at the
+ * XXX upper 32 bits, lest we misinterpret
+ * XXX it as a 32-bit BAR set to zero.
+ */
+ width = 8;
+ }
+ addr = PCI_MAPREG_MEM_ADDR(val);
+ size = PCI_MAPREG_MEM_SIZE(mask);
+ ex = sc->extent_mem;
+ } else {
+ /* XXX some devices give 32bit value */
+ addr = PCI_MAPREG_IO_ADDR(val) & PCIADDR_PORT_END;
+ size = PCI_MAPREG_IO_SIZE(mask);
+ ex = sc->extent_port;
+ }
+
+ if (!size) /* unused register */
+ continue;
+
+ /* reservation/allocation phase */
+ error += (*func) (sc, pc, tag, mapreg, ex, type, &addr, size);
+
+ PCIBIOS_PRINTV(("\t%02xh %s 0x%08x 0x%08x\n",
+ mapreg, type ? "port" : "mem ",
+ (unsigned int)addr, (unsigned int)size));
+ }
+
+ /* enable/disable PCI device */
+ val = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
+ if (error == 0)
+ val |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
+ PCI_COMMAND_MASTER_ENABLE);
+ else
+ val &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
+ PCI_COMMAND_MASTER_ENABLE);
+ pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, val);
+
+ if (error)
+ sc->nbogus++;
+
+ PCIBIOS_PRINTV(("\t\t[%s]\n", error ? "NG" : "OK"));
+}
+
+int
+pciaddr_do_resource_allocate(struct i80321_softc *sc, pci_chipset_tag_t pc,
+ pcitag_t tag, int mapreg, struct extent *ex, int type, bus_addr_t *addr,
+ bus_size_t size)
+{
+ bus_addr_t start;
+ int error;
+
+ if (*addr) /* no need to allocate */
+ return (0);
+
+ /* XXX Don't allocate if device is AGP device to avoid conflict. */
+ if (pciaddr_device_is_agp(pc, tag))
+ return (0);
+
+ start = (type == PCI_MAPREG_TYPE_MEM ? sc->sc_membus_space.bus_base
+ : PCIADDR_PORT_START);
+ if (start < ex->ex_start || start + size - 1 >= ex->ex_end) {
+ PCIBIOS_PRINTV(("No available resources. fixup failed\n"));
+ return (1);
+ }
+ error = extent_alloc_subregion(ex, start, ex->ex_end, size, size, 0, 0,
+ EX_FAST|EX_NOWAIT|EX_MALLOCOK, addr);
+ if (error) {
+ PCIBIOS_PRINTV(("No available resources. fixup failed\n"));
+ return (1);
+ }
+
+ /* write new address to PCI device configuration header */
+ pci_conf_write(pc, tag, mapreg, *addr);
+ /* check */
+ if (pcibr_flags & PCIBR_VERBOSE) {
+ printf("pci_addr_fixup: ");
+ pciaddr_print_devid(pc, tag);
+ }
+
+ if (pciaddr_ioaddr(pci_conf_read(pc, tag, mapreg)) != *addr) {
+ pci_conf_write(pc, tag, mapreg, 0); /* clear */
+ printf("fixup failed. (new address=%#lx)\n", *addr);
+ return (1);
+ }
+ if (pcibr_flags & PCIBR_VERBOSE)
+ printf("new address 0x%08lx\n", *addr);
+
+ return (0);
+}
+
+int
+pciaddr_do_resource_reserve(struct i80321_softc *sc, pci_chipset_tag_t pc,
+ pcitag_t tag, int mapreg, struct extent *ex, int type, bus_addr_t *addr,
+ bus_size_t size)
+{
+ int error;
+
+ if (*addr == 0)
+ return (1);
+
+ error = extent_alloc_region(ex, *addr, size, EX_NOWAIT | EX_MALLOCOK);
+ if (error) {
+ PCIBIOS_PRINTV(("Resource conflict.\n"));
+ pci_conf_write(pc, tag, mapreg, 0); /* clear */
+ return (1);
+ }
+
+ return (0);
+}
+
+bus_addr_t
+pciaddr_ioaddr(u_int32_t val)
+{
+ return ((PCI_MAPREG_TYPE(val) == PCI_MAPREG_TYPE_MEM)
+ ? PCI_MAPREG_MEM_ADDR(val)
+ : (PCI_MAPREG_IO_ADDR(val) & PCIADDR_PORT_END));
+}
+
+void
+pciaddr_print_devid(pci_chipset_tag_t pc, pcitag_t tag)
+{
+ int bus, device, function;
+ pcireg_t id;
+
+ id = pci_conf_read(pc, tag, PCI_ID_REG);
+ pci_decompose_tag(pc, tag, &bus, &device, &function);
+ printf("%03d:%02d:%d %04x:%04x\n", bus, device, function,
+ PCI_VENDOR(id), PCI_PRODUCT(id));
+}
+
+int
+pciaddr_device_is_agp(pci_chipset_tag_t pc, pcitag_t tag)
+{
+ pcireg_t class, status, rval;
+ int off;
+
+ /* Check AGP device. */
+ class = pci_conf_read(pc, tag, PCI_CLASS_REG);
+ if (PCI_CLASS(class) == PCI_CLASS_DISPLAY) {
+ status = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
+ if (status & PCI_STATUS_CAPLIST_SUPPORT) {
+ rval = pci_conf_read(pc, tag, PCI_CAPLISTPTR_REG);
+ for (off = PCI_CAPLIST_PTR(rval);
+ off != 0;
+ off = PCI_CAPLIST_NEXT(rval) ) {
+ rval = pci_conf_read(pc, tag, off);
+ if (PCI_CAPLIST_CAP(rval) == PCI_CAP_AGP)
+ return (1);
+ }
+ }
+ }
+ return (0);
+}
+
+
+#if 0
+struct extent *
+pciaddr_search(int mem_port, struct device *parent, bus_addr_t *startp,
+ bus_size_t size)
+{
+ struct i80321_softc *sc;
+
+ /* find the bridge, 'mpcpcibr' */
+
+ sc = NULL;
+ while (parent != NULL) {
+ if (strncmp("mpcpcibr", parent->dv_xname, 8) == 0) {
+ sc = (void *)parent;
+ break;
+ }
+ parent = parent->dv_parent;
+ }
+
+ if (sc && !(pcibr_flags & PCIBR_ADDR_FIXUP)) {
+ struct extent_region *rp;
+ struct extent *ex = mem_port? sc->extent_mem : sc->extent_port;
+
+ /* Search the PCI I/O memory space extent for free
+ * space that will accommodate size. Remember that the
+ * extent stores allocated space and we're searching
+ * for the gaps.
+ *
+ * If we're at the end or the gap between this region
+ * and the next region big enough, then we're done
+ */
+ *startp = ex->ex_start;
+ rp = LIST_FIRST(&ex->ex_regions);
+
+ for (rp = LIST_FIRST(&ex->ex_regions);
+ rp && *startp + size > rp->er_start;
+ rp = LIST_NEXT(rp, er_link)) {
+ bus_addr_t new_start;
+
+ new_start = (rp->er_end - 1 + size) & ~(size - 1);
+ if (new_start > *startp)
+ *startp = new_start;
+ }
+
+ return (ex);
+ }
+
+ return (NULL);
+}
+#endif
+
+
+void
+pci_device_foreach(struct i80321_softc *sc, pci_chipset_tag_t pc, int maxbus,
+ void (*func)(struct i80321_softc *, pci_chipset_tag_t, pcitag_t))
+{
+ const struct pci_quirkdata *qd;
+ int bus, device, function, maxdevs, nfuncs;
+ pcireg_t id, bhlcr;
+ pcitag_t tag;
+
+ for (bus = 0; bus <= maxbus; bus++) {
+ maxdevs = pci_bus_maxdevs(pc, bus);
+ for (device = 0; device < maxdevs; device++) {
+ tag = pci_make_tag(pc, bus, device, 0);
+ id = pci_conf_read(pc, tag, PCI_ID_REG);
+
+ /* Invalid vendor ID value? */
+ if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
+ continue;
+ /* XXX Not invalid, but we've done this ~forever. */
+ if (PCI_VENDOR(id) == 0)
+ continue;
+
+ qd = pci_lookup_quirkdata(PCI_VENDOR(id),
+ PCI_PRODUCT(id));
+
+ bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
+ if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
+ (qd != NULL &&
+ (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
+ nfuncs = 8;
+ else
+ nfuncs = 1;
+
+ for (function = 0; function < nfuncs; function++) {
+ tag = pci_make_tag(pc, bus, device, function);
+ id = pci_conf_read(pc, tag, PCI_ID_REG);
+
+ /* Invalid vendor ID value? */
+ if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
+ continue;
+ /*
+ * XXX Not invalid, but we've done this
+ * ~forever.
+ */
+ if (PCI_VENDOR(id) == 0)
+ continue;
+ (*func)(sc, pc, tag);
+ }
+ }
+ }
+}
diff --git a/sys/arch/armish/dev/pciide_machdep.c b/sys/arch/armish/dev/pciide_machdep.c
new file mode 100644
index 00000000000..8b4b1228a1c
--- /dev/null
+++ b/sys/arch/armish/dev/pciide_machdep.c
@@ -0,0 +1,65 @@
+/* $OpenBSD: pciide_machdep.c,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: pciide_machdep.c,v 1.2 1999/02/19 18:01:27 mycroft Exp $ */
+
+/*
+ * Copyright (c) 1998 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * PCI IDE controller driver (i386 machine-dependent portion).
+ *
+ * Author: Christopher G. Demetriou, March 2, 1998 (derived from NetBSD
+ * sys/dev/pci/ppb.c, revision 1.16).
+ *
+ * See "PCI IDE Controller Specification, Revision 1.0 3/4/94" from the
+ * PCI SIG.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pciidereg.h>
+#include <dev/pci/pciidevar.h>
+
+void *
+pciide_machdep_compat_intr_establish(struct device *dev,
+ struct pci_attach_args *pa, int chan, int (*func)(void *), void *arg)
+{
+ panic("pciide_machdep_compat_intr_establish called\n");
+ return (NULL);
+}
+
+void
+pciide_machdep_compat_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
+{
+ panic("pciide_machdep_compat_intr_disestablish called\n");
+}
diff --git a/sys/arch/armish/include/_types.h b/sys/arch/armish/include/_types.h
new file mode 100644
index 00000000000..99f5e8b4784
--- /dev/null
+++ b/sys/arch/armish/include/_types.h
@@ -0,0 +1,10 @@
+/* $OpenBSD: _types.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: types.h,v 1.4 2002/02/28 03:17:26 simonb Exp $ */
+
+#ifndef _ARMISH__TYPES_H_
+#define _ARMISH__TYPES_H_
+
+#include <arm/_types.h>
+#define __HAVE_GENERIC_SOFT_INTERRUPTS
+
+#endif /* _ARMISH__TYPES_H_ */
diff --git a/sys/arch/armish/include/apmvar.h b/sys/arch/armish/include/apmvar.h
new file mode 100644
index 00000000000..e3abcfc4f32
--- /dev/null
+++ b/sys/arch/armish/include/apmvar.h
@@ -0,0 +1,2 @@
+/* $OpenBSD: apmvar.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+#include <arm/apmvar.h>
diff --git a/sys/arch/armish/include/armish_intr.h b/sys/arch/armish/include/armish_intr.h
new file mode 100644
index 00000000000..48f8153a5f7
--- /dev/null
+++ b/sys/arch/armish/include/armish_intr.h
@@ -0,0 +1,103 @@
+/* $OpenBSD: armish_intr.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: i80321_intr.h,v 1.4 2003/07/05 06:53:08 dogcow Exp $ */
+
+/*
+ * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _I80321_INTR_H_
+#define _I80321_INTR_H_
+
+#define ARM_IRQ_HANDLER _C_LABEL(i80321_irq_handler)
+
+#ifndef _LOCORE
+
+#include <arm/armreg.h>
+#include <arm/cpufunc.h>
+#include <machine/intr.h>
+#include <arm/softintr.h>
+
+extern __volatile int current_spl_level;
+extern __volatile int softint_pending;
+extern int i80321_imask[];
+void i80321_do_pending(void);
+
+void i80321_setipl(int new);
+void i80321_splx(int new);
+int i80321_splraise(int ipl);
+int i80321_spllower(int ipl);
+void i80321_setsoftintr(int si);
+
+
+/*
+ * An useful function for interrupt handlers.
+ * XXX: This shouldn't be here.
+ */
+static __inline int
+find_first_bit( uint32_t bits )
+{
+ int count;
+
+ /* since CLZ is available only on ARMv5, this isn't portable
+ * to all ARM CPUs. This file is for I80321 processor.
+ */
+ asm( "clz %0, %1" : "=r" (count) : "r" (bits) );
+ return 31-count;
+}
+
+
+int _splraise(int);
+int _spllower(int);
+void splx(int);
+void _setsoftintr(int);
+
+/*
+ * This function *MUST* be called very early on in a port's
+ * initarm() function, before ANY spl*() functions are called.
+ *
+ * The parameter is the virtual address of the I80321's Interrupt
+ * Controller registers.
+ */
+void i80321_intr_bootstrap(vaddr_t);
+
+void i80321_irq_handler(void *);
+void *i80321_intr_establish(int irqno, int level, int (*func)(void *),
+ void *cookie, char *name);
+void i80321_intr_disestablish(void *cookie);
+const char *i80321_intr_string(void *cookie);
+
+#endif /* ! _LOCORE */
+
+#endif /* _I80321_INTR_H_ */
+
diff --git a/sys/arch/armish/include/asm.h b/sys/arch/armish/include/asm.h
new file mode 100644
index 00000000000..72334e65815
--- /dev/null
+++ b/sys/arch/armish/include/asm.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: asm.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: asm.h,v 1.3 2001/11/25 15:55:54 thorpej Exp $ */
+
+#include <arm/asm.h>
diff --git a/sys/arch/armish/include/atomic.h b/sys/arch/armish/include/atomic.h
new file mode 100644
index 00000000000..782db36deae
--- /dev/null
+++ b/sys/arch/armish/include/atomic.h
@@ -0,0 +1,2 @@
+/* $OpenBSD: atomic.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+#include <arm/atomic.h>
diff --git a/sys/arch/armish/include/bootconfig.h b/sys/arch/armish/include/bootconfig.h
new file mode 100644
index 00000000000..4f804900052
--- /dev/null
+++ b/sys/arch/armish/include/bootconfig.h
@@ -0,0 +1,76 @@
+/* $OpenBSD: bootconfig.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: bootconfig.h,v 1.2 2001/06/21 22:08:28 chris Exp $ */
+
+/*
+ * Copyright (c) 1994 Mark Brinicombe.
+ * Copyright (c) 1994 Brini.
+ * All rights reserved.
+ *
+ * This code is derived from software written for Brini by Mark Brinicombe
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Mark Brinicombe
+ * for the NetBSD Project.
+ * 4. The name of the company nor the name of the author may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * boot configuration structures
+ *
+ * Created : 12/09/94
+ *
+ * Based on kate/boot/bootconfig.h
+ */
+
+typedef struct _PhysMem {
+ u_int address;
+ u_int pages;
+} PhysMem;
+
+#if defined(_KERNEL)
+
+#define DRAM_BLOCKS 1
+
+typedef struct _BootConfig {
+ PhysMem dram[DRAM_BLOCKS];
+ u_int dramblocks;
+} BootConfig;
+
+extern BootConfig bootconfig;
+#define MAX_BOOT_STRING 255
+
+#define BOOTOPT_TYPE_BOOLEAN 0
+#define BOOTOPT_TYPE_STRING 1
+#define BOOTOPT_TYPE_INT 2
+#define BOOTOPT_TYPE_BININT 3
+#define BOOTOPT_TYPE_HEXINT 4
+#define BOOTOPT_TYPE_MASK 7
+
+int get_bootconf_option (char *string, char *option, int type, void *result);
+
+extern char *boot_args;
+extern char *boot_file;
+#endif /* _KERNEL */
+
+/* End of bootconfig.h */
diff --git a/sys/arch/armish/include/bus.h b/sys/arch/armish/include/bus.h
new file mode 100644
index 00000000000..99d450453a2
--- /dev/null
+++ b/sys/arch/armish/include/bus.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: bus.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: bus.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $ */
+
+#include <arm/bus.h>
diff --git a/sys/arch/armish/include/cdefs.h b/sys/arch/armish/include/cdefs.h
new file mode 100644
index 00000000000..a6c16add4b2
--- /dev/null
+++ b/sys/arch/armish/include/cdefs.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: cdefs.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+
+#include <arm/cdefs.h>
diff --git a/sys/arch/armish/include/conf.h b/sys/arch/armish/include/conf.h
new file mode 100644
index 00000000000..22c9cacc68e
--- /dev/null
+++ b/sys/arch/armish/include/conf.h
@@ -0,0 +1,18 @@
+/* $OpenBSD: conf.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: conf.h,v 1.8 2002/02/10 12:26:03 chris Exp $ */
+
+#ifndef _ARMISH_CONF_H
+#define _ARMISH_CONF_H
+
+#include <sys/conf.h>
+
+/*
+ * ARMISH specific device includes go in here
+ */
+
+#define CONF_HAVE_USB
+#define CONF_HAVE_GPIO
+
+#include <arm/conf.h>
+
+#endif /* _ARMISH_CONF_H */
diff --git a/sys/arch/armish/include/cpu.h b/sys/arch/armish/include/cpu.h
new file mode 100644
index 00000000000..1fd99e8e2b0
--- /dev/null
+++ b/sys/arch/armish/include/cpu.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: cpu.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: cpu.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $ */
+
+#include <arm/cpu.h>
diff --git a/sys/arch/armish/include/db_machdep.h b/sys/arch/armish/include/db_machdep.h
new file mode 100644
index 00000000000..f8197f2a588
--- /dev/null
+++ b/sys/arch/armish/include/db_machdep.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: db_machdep.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: db_machdep.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $ */
+
+#include <arm/db_machdep.h>
diff --git a/sys/arch/armish/include/disklabel.h b/sys/arch/armish/include/disklabel.h
new file mode 100644
index 00000000000..cef55a0c6c6
--- /dev/null
+++ b/sys/arch/armish/include/disklabel.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: disklabel.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: disklabel.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $ */
+
+#include <arm/disklabel.h>
diff --git a/sys/arch/armish/include/elf_abi.h b/sys/arch/armish/include/elf_abi.h
new file mode 100644
index 00000000000..e69a860d4dd
--- /dev/null
+++ b/sys/arch/armish/include/elf_abi.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: elf_abi.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+
+#include <arm/elf_abi.h>
diff --git a/sys/arch/armish/include/endian.h b/sys/arch/armish/include/endian.h
new file mode 100644
index 00000000000..ea87a8d604a
--- /dev/null
+++ b/sys/arch/armish/include/endian.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: endian.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: endian.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $ */
+
+#include <arm/endian.h>
diff --git a/sys/arch/armish/include/exec.h b/sys/arch/armish/include/exec.h
new file mode 100644
index 00000000000..af1484a920b
--- /dev/null
+++ b/sys/arch/armish/include/exec.h
@@ -0,0 +1,48 @@
+/* $OpenBSD: exec.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: exec.h,v 1.6 1994/10/27 04:16:05 cgd Exp $ */
+
+/*
+ * Copyright (c) 1993 Christopher G. Demetriou
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _I386_EXEC_H_
+#define _I386_EXEC_H_
+
+#define __LDPGSZ 4096
+
+#define NATIVE_EXEC_ELF
+
+#define ARCH_ELFSIZE 32
+
+#define ELF_TARG_CLASS ELFCLASS32
+#define ELF_TARG_DATA ELFDATA2LSB
+#define ELF_TARG_MACH EM_ARM
+
+#define _NLIST_DO_ELF
+
+#define _KERN_DO_ELF
+
+#endif /* _I386_EXEC_H_ */
diff --git a/sys/arch/armish/include/float.h b/sys/arch/armish/include/float.h
new file mode 100644
index 00000000000..fa1d820e389
--- /dev/null
+++ b/sys/arch/armish/include/float.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: float.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: float.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $ */
+
+#include <arm/float.h>
diff --git a/sys/arch/armish/include/fp.h b/sys/arch/armish/include/fp.h
new file mode 100644
index 00000000000..a106b0df984
--- /dev/null
+++ b/sys/arch/armish/include/fp.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: fp.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: fp.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $ */
+
+#include <arm/fp.h>
diff --git a/sys/arch/armish/include/frame.h b/sys/arch/armish/include/frame.h
new file mode 100644
index 00000000000..6de1f1ee1c9
--- /dev/null
+++ b/sys/arch/armish/include/frame.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: frame.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: frame.h,v 1.1 2001/06/08 22:23:00 chris Exp $ */
+
+#include <arm/frame.h>
diff --git a/sys/arch/armish/include/ieee.h b/sys/arch/armish/include/ieee.h
new file mode 100644
index 00000000000..fff84b906a6
--- /dev/null
+++ b/sys/arch/armish/include/ieee.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: ieee.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: ieee.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $ */
+
+#include <arm/ieee.h>
diff --git a/sys/arch/armish/include/ieeefp.h b/sys/arch/armish/include/ieeefp.h
new file mode 100644
index 00000000000..fe16d9b8d63
--- /dev/null
+++ b/sys/arch/armish/include/ieeefp.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: ieeefp.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: ieeefp.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $ */
+
+#include <arm/ieeefp.h>
diff --git a/sys/arch/armish/include/internal_types.h b/sys/arch/armish/include/internal_types.h
new file mode 100644
index 00000000000..d61922ed2ea
--- /dev/null
+++ b/sys/arch/armish/include/internal_types.h
@@ -0,0 +1,7 @@
+/* $OpenBSD: internal_types.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* Public domain */
+#ifndef _MACHINE_INTERNAL_TYPES_H_
+#define _MACHINE_INTERNAL_TYPES_H_
+
+#include "arm/internal_types.h"
+#endif
diff --git a/sys/arch/armish/include/intr.h b/sys/arch/armish/include/intr.h
new file mode 100644
index 00000000000..7f3df2dc822
--- /dev/null
+++ b/sys/arch/armish/include/intr.h
@@ -0,0 +1,157 @@
+/* $OpenBSD: intr.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: intr.h,v 1.12 2003/06/16 20:00:59 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ARMISH_INTR_H_
+#define _ARMISH_INTR_H_
+
+#ifdef _KERNEL
+
+
+/* Interrupt priority "levels". */
+#define IPL_NONE 0 /* nothing */
+#define IPL_SOFT 1 /* generic software interrupts */
+#define IPL_SOFTCLOCK 2 /* software clock interrupt */
+#define IPL_SOFTNET 3 /* software network interrupt */
+#define IPL_BIO 4 /* block I/O */
+#define IPL_NET 5 /* network */
+#define IPL_SOFTSERIAL 6 /* software serial interrupt */
+#define IPL_TTY 7 /* terminals */
+#define IPL_VM 8 /* memory allocation */
+#define IPL_AUDIO 9 /* audio device */
+#define IPL_CLOCK 10 /* clock interrupt */
+#define IPL_STATCLOCK 11 /* statistics clock interrupt */
+#define IPL_HIGH 12 /* everything */
+#define IPL_SERIAL 13 /* serial device */
+
+#define NIPL 14
+
+/* Interrupt sharing types. */
+#define IST_NONE 0 /* none */
+#define IST_PULSE 1 /* pulsed */
+#define IST_EDGE 2 /* edge-triggered */
+#define IST_LEVEL 3 /* level-triggered */
+
+#define IST_LEVEL_LOW IST_LEVEL
+#define IST_LEVEL_HIGH 4
+#define IST_EDGE_FALLING IST_EDGE
+#define IST_EDGE_RISING 5
+#define IST_EDGE_BOTH 6
+
+
+#define __NEWINTR /* enables new hooks in cpu_fork()/cpu_switch() */
+
+#ifndef _LOCORE
+
+#include <sys/device.h>
+#include <sys/queue.h>
+
+#if defined(_LKM)
+
+int _splraise(int);
+int _spllower(int);
+void splx(int);
+void _setsoftintr(int);
+
+#else /* _LKM */
+
+/*
+ * Each board needs to define the following functions:
+ *
+ * int _splraise(int);
+ * int _spllower(int);
+ * void splx(int);
+ * void _setsoftintr(int);
+ *
+ * These may be defined as functions, static __inline functions, or macros,
+ * but there must be a _spllower() and splx() defined as functions callable
+ * from assembly language (for cpu_switch()). However, since it's quite
+ * useful to be able to inline splx(), you could do something like the
+ * following:
+ *
+ * in <boardtype>_intr.h:
+ * static __inline int
+ * boardtype_splx(int spl)
+ * {...}
+ *
+ * #define splx(nspl) boardtype_splx(nspl)
+ * ...
+ * and in boardtype's machdep code:
+ *
+ * ...
+ * #undef splx
+ * int
+ * splx(int spl)
+ * {
+ * return boardtype_splx(spl);
+ * }
+ */
+
+
+#endif /* _LKM */
+
+#define splhigh() _splraise(IPL_HIGH)
+#define splsoft() _splraise(IPL_SOFT)
+#define splsoftclock() _splraise(IPL_SOFTCLOCK)
+#define splsoftnet() _splraise(IPL_SOFTNET)
+#define splbio() _splraise(IPL_BIO)
+#define splnet() _splraise(IPL_NET)
+#define spltty() _splraise(IPL_TTY)
+#define splvm() _splraise(IPL_VM)
+#define splaudio() _splraise(IPL_AUDIO)
+#define splclock() _splraise(IPL_CLOCK)
+#define splstatclock() _splraise(IPL_STATCLOCK)
+#define splserial() _splraise(IPL_SERIAL)
+
+#define spl0() _spllower(IPL_NONE)
+
+#define splsched() splhigh()
+#define spllock() splhigh()
+
+/* Use generic software interrupt support. */
+#include <arm/softintr.h>
+
+#endif /* ! _LOCORE */
+
+#include <machine/armish_intr.h>
+
+#define splassert(wantipl) do { /* nada */ } while (0)
+
+#endif /* _KERNEL */
+
+#endif /* _ARMISH_INTR_H_ */
+
diff --git a/sys/arch/armish/include/irqhandler.h b/sys/arch/armish/include/irqhandler.h
new file mode 100644
index 00000000000..02687d27f3c
--- /dev/null
+++ b/sys/arch/armish/include/irqhandler.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: irqhandler.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: irqhandler.h,v 1.4 2002/04/12 18:50:32 thorpej Exp $ */
+
+#include <arm/footbridge/footbridge_irqhandler.h>
diff --git a/sys/arch/armish/include/isa_machdep.h b/sys/arch/armish/include/isa_machdep.h
new file mode 100644
index 00000000000..8d5052e0fed
--- /dev/null
+++ b/sys/arch/armish/include/isa_machdep.h
@@ -0,0 +1,13 @@
+/* $OpenBSD: isa_machdep.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: isa_machdep.h,v 1.4 2002/01/07 22:58:08 chris Exp $ */
+
+#ifndef _ARMISH_ISA_MACHDEP_H_
+#define _ARMISH_ISA_MACHDEP_H_
+#include <arm/isa_machdep.h>
+
+#ifdef _KERNEL
+#define ISA_FOOTBRIDGE_IRQ IRQ_IN_L2
+void isa_footbridge_init(u_int, u_int);
+#endif /* _KERNEL */
+
+#endif /* _ARMISH_ISA_MACHDEP_H_ */
diff --git a/sys/arch/armish/include/limits.h b/sys/arch/armish/include/limits.h
new file mode 100644
index 00000000000..2ec9d566ca6
--- /dev/null
+++ b/sys/arch/armish/include/limits.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: limits.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: limits.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $ */
+
+#include <arm/limits.h>
diff --git a/sys/arch/armish/include/loadfile_machdep.h b/sys/arch/armish/include/loadfile_machdep.h
new file mode 100644
index 00000000000..1522e422d7d
--- /dev/null
+++ b/sys/arch/armish/include/loadfile_machdep.h
@@ -0,0 +1,59 @@
+/* $OpenBSD: loadfile_machdep.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: loadfile_machdep.h,v 1.1 1999/04/29 03:17:12 tsubai Exp $ */
+
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Christos Zoulas.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define BOOT_ELF
+#define ELFSIZE 32
+
+#define LOAD_KERNEL (LOAD_ALL & ~LOAD_TEXTA)
+#define COUNT_KERNEL (COUNT_ALL & ~COUNT_TEXTA)
+
+#define LOADADDR(a) ((((u_long)(a)) + offset)&0xfffffff)
+#define ALIGNENTRY(a) ((u_long)(a))
+#define READ(f, b, c) read((f), (void *)LOADADDR(b), (c))
+#define BCOPY(s, d, c) memcpy((void *)LOADADDR(d), (void *)(s), (c))
+#define BZERO(d, c) memset((void *)LOADADDR(d), 0, (c))
+#define WARN(a) (void)(printf a, \
+ printf((errno ? ": %s\n" : "\n"), \
+ strerror(errno)))
+#define PROGRESS(a) (void) printf a
+#define ALLOC(a) alloc(a)
+#define FREE(a, b) free(a, b)
+#define OKMAGIC(a) ((a) == OMAGIC)
+
+void run_loadfile(u_long *, int);
diff --git a/sys/arch/armish/include/lock.h b/sys/arch/armish/include/lock.h
new file mode 100644
index 00000000000..5c5d458ac90
--- /dev/null
+++ b/sys/arch/armish/include/lock.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: lock.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: lock.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $ */
+
+#include <arm/lock.h>
diff --git a/sys/arch/armish/include/math.h b/sys/arch/armish/include/math.h
new file mode 100644
index 00000000000..6c6bca98e7a
--- /dev/null
+++ b/sys/arch/armish/include/math.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: math.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: math.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $ */
+
+#include <arm/math.h>
diff --git a/sys/arch/armish/include/param.h b/sys/arch/armish/include/param.h
new file mode 100644
index 00000000000..cad71c3f3ad
--- /dev/null
+++ b/sys/arch/armish/include/param.h
@@ -0,0 +1,51 @@
+/* $OpenBSD: param.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: param.h,v 1.4 2002/02/12 06:58:19 thorpej Exp $ */
+
+/*
+ * Copyright (c) 1994,1995 Mark Brinicombe.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the RiscBSD team.
+ * 4. The name "RiscBSD" nor the name of the author may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY RISCBSD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL RISCBSD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARMISH_PARAM_H_
+#define _ARMISH_PARAM_H_
+
+/*
+ * 1 page should be enough
+ */
+#ifndef MSGBUFSIZE
+#define MSGBUFSIZE (1*NBPG)
+#endif
+
+#include <arm/param.h>
+
+#define _MACHINE armish
+#define MACHINE "armish"
+
+#endif /* _ARMISH_PARAM_H_ */
diff --git a/sys/arch/armish/include/pcb.h b/sys/arch/armish/include/pcb.h
new file mode 100644
index 00000000000..a1db5e3897c
--- /dev/null
+++ b/sys/arch/armish/include/pcb.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: pcb.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: pcb.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $ */
+
+#include <arm/pcb.h>
diff --git a/sys/arch/armish/include/pci_machdep.h b/sys/arch/armish/include/pci_machdep.h
new file mode 100644
index 00000000000..e0f5a7ad2ab
--- /dev/null
+++ b/sys/arch/armish/include/pci_machdep.h
@@ -0,0 +1,2 @@
+/* $OpenBSD: pci_machdep.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+#include <arm/pci_machdep.h>
diff --git a/sys/arch/armish/include/pio.h b/sys/arch/armish/include/pio.h
new file mode 100644
index 00000000000..bf3e961da25
--- /dev/null
+++ b/sys/arch/armish/include/pio.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: pio.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: pio.h,v 1.3 2001/12/07 23:09:33 chris Exp $ */
+
+#include <arm/pio.h>
diff --git a/sys/arch/armish/include/pmap.h b/sys/arch/armish/include/pmap.h
new file mode 100644
index 00000000000..01e8fc61bd9
--- /dev/null
+++ b/sys/arch/armish/include/pmap.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: pmap.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: pmap.h,v 1.2 2001/11/23 17:29:01 thorpej Exp $ */
+
+#include <arm/pmap.h>
diff --git a/sys/arch/armish/include/proc.h b/sys/arch/armish/include/proc.h
new file mode 100644
index 00000000000..827656aa0ad
--- /dev/null
+++ b/sys/arch/armish/include/proc.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: proc.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: proc.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $ */
+
+#include <arm/proc.h>
diff --git a/sys/arch/armish/include/profile.h b/sys/arch/armish/include/profile.h
new file mode 100644
index 00000000000..063080728d1
--- /dev/null
+++ b/sys/arch/armish/include/profile.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: profile.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: profile.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $ */
+
+#include <arm/profile.h>
diff --git a/sys/arch/armish/include/psl.h b/sys/arch/armish/include/psl.h
new file mode 100644
index 00000000000..d93d50de876
--- /dev/null
+++ b/sys/arch/armish/include/psl.h
@@ -0,0 +1 @@
+/* $OpenBSD: psl.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
diff --git a/sys/arch/armish/include/ptrace.h b/sys/arch/armish/include/ptrace.h
new file mode 100644
index 00000000000..0e1cc87d92c
--- /dev/null
+++ b/sys/arch/armish/include/ptrace.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: ptrace.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: ptrace.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $ */
+
+#include <arm/ptrace.h>
diff --git a/sys/arch/armish/include/reg.h b/sys/arch/armish/include/reg.h
new file mode 100644
index 00000000000..7ae8527fe4b
--- /dev/null
+++ b/sys/arch/armish/include/reg.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: reg.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: reg.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $ */
+
+#include <arm/reg.h>
diff --git a/sys/arch/armish/include/reloc.h b/sys/arch/armish/include/reloc.h
new file mode 100644
index 00000000000..83e6db5a9bb
--- /dev/null
+++ b/sys/arch/armish/include/reloc.h
@@ -0,0 +1,2 @@
+/* $OpenBSD: reloc.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+#include <arm/reloc.h>
diff --git a/sys/arch/armish/include/rtc.h b/sys/arch/armish/include/rtc.h
new file mode 100644
index 00000000000..3a1ab0b4466
--- /dev/null
+++ b/sys/arch/armish/include/rtc.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: rtc.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: rtc.h,v 1.2 2001/11/25 15:55:58 thorpej Exp $ */
+
+#include <arm/rtc.h>
diff --git a/sys/arch/armish/include/setjmp.h b/sys/arch/armish/include/setjmp.h
new file mode 100644
index 00000000000..98bbfd140ad
--- /dev/null
+++ b/sys/arch/armish/include/setjmp.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: setjmp.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: setjmp.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $ */
+
+#include <arm/setjmp.h>
diff --git a/sys/arch/armish/include/signal.h b/sys/arch/armish/include/signal.h
new file mode 100644
index 00000000000..6a47eaababc
--- /dev/null
+++ b/sys/arch/armish/include/signal.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: signal.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: signal.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $ */
+
+#include <arm/signal.h>
diff --git a/sys/arch/armish/include/spinlock.h b/sys/arch/armish/include/spinlock.h
new file mode 100644
index 00000000000..f9b55586ad6
--- /dev/null
+++ b/sys/arch/armish/include/spinlock.h
@@ -0,0 +1,7 @@
+
+/* $OpenBSD: spinlock.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+#ifndef _ARMISH_SPINLOCK_H_
+#define _ARMISH_SPINLOCK_H_
+#include <arm/spinlock.h>
+#endif /* _ARMISH_SPINLOCK_H_ */
+
diff --git a/sys/arch/armish/include/stdarg.h b/sys/arch/armish/include/stdarg.h
new file mode 100644
index 00000000000..c6a37339531
--- /dev/null
+++ b/sys/arch/armish/include/stdarg.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: stdarg.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: stdarg.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $ */
+
+#include <arm/stdarg.h>
diff --git a/sys/arch/armish/include/sysarch.h b/sys/arch/armish/include/sysarch.h
new file mode 100644
index 00000000000..5b73002433f
--- /dev/null
+++ b/sys/arch/armish/include/sysarch.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: sysarch.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: sysarch.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $ */
+
+#include <arm/sysarch.h>
diff --git a/sys/arch/armish/include/trap.h b/sys/arch/armish/include/trap.h
new file mode 100644
index 00000000000..5714cfc0e0c
--- /dev/null
+++ b/sys/arch/armish/include/trap.h
@@ -0,0 +1,4 @@
+/* $OpenBSD: trap.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: trap.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $ */
+
+#include <arm/trap.h>
diff --git a/sys/arch/armish/include/vmparam.h b/sys/arch/armish/include/vmparam.h
new file mode 100644
index 00000000000..2c393e9d9b8
--- /dev/null
+++ b/sys/arch/armish/include/vmparam.h
@@ -0,0 +1,100 @@
+/* $OpenBSD: vmparam.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */
+/* $NetBSD: vmparam.h,v 1.23 2003/05/22 05:47:07 thorpej Exp $ */
+
+/*
+ * Copyright (c) 1988 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARM32_VMPARAM_H_
+#define _ARM32_VMPARAM_H_
+
+#define ARM_KERNEL_BASE 0xc0000000
+
+#include <arm/vmparam.h>
+
+#ifdef _KERNEL
+/*
+ * Address space constants
+ */
+
+/*
+ * The line between user space and kernel space
+ * Mappings >= KERNEL_BASE are constant across all processes
+ */
+#define KERNEL_BASE ARM_KERNEL_BASE
+
+/*
+ * Override the default pager_map size, there's not enough KVA.
+ */
+#define PAGER_MAP_SIZE (4 * 1024 * 1024)
+
+/*
+ * Size of User Raw I/O map
+ */
+
+#define USRIOSIZE 300
+
+/* virtual sizes (bytes) for various kernel submaps */
+
+#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE)
+
+/*
+ * max number of non-contig chunks of physical RAM you can have
+ */
+
+#define VM_PHYSSEG_MAX 32
+
+/*
+ * when converting a physical address to a vm_page structure, we
+ * want to use a binary search on the chunks of physical memory
+ * to find our RAM
+ */
+
+#define VM_PHYSSEG_STRAT VM_PSTRAT_BSEARCH
+
+/*
+ * this indicates that we can't add RAM to the VM system after the
+ * vm system is init'd.
+ */
+
+#define VM_PHYSSEG_NOADD
+
+/*
+ * we support 2 free lists:
+ *
+ * - DEFAULT for all systems
+ * - ISADMA for the ISA DMA range on Sharks only
+ */
+#endif /* _KERNEL */
+
+#define VM_NFREELIST 2
+#define VM_FREELIST_DEFAULT 0
+#define VM_FREELIST_ISADMA 1
+
+
+#endif /* _ARM32_VMPARAM_H_ */