diff options
| -rw-r--r-- | sys/arch/hppa/include/ansi.h | 76 | ||||
| -rw-r--r-- | sys/arch/hppa/include/cdefs.h | 38 | ||||
| -rw-r--r-- | sys/arch/hppa/include/cpu.h | 122 | ||||
| -rw-r--r-- | sys/arch/hppa/include/disklabel.h | 46 | ||||
| -rw-r--r-- | sys/arch/hppa/include/endian.h | 44 | ||||
| -rw-r--r-- | sys/arch/hppa/include/exec.h | 37 | ||||
| -rw-r--r-- | sys/arch/hppa/include/frame.h | 14 | ||||
| -rw-r--r-- | sys/arch/hppa/include/intr.h | 233 | ||||
| -rw-r--r-- | sys/arch/hppa/include/iodc.h | 155 | ||||
| -rw-r--r-- | sys/arch/hppa/include/iomod.h | 407 | ||||
| -rw-r--r-- | sys/arch/hppa/include/limits.h | 114 | ||||
| -rw-r--r-- | sys/arch/hppa/include/nvm.h | 74 | ||||
| -rw-r--r-- | sys/arch/hppa/include/param.h | 149 | ||||
| -rw-r--r-- | sys/arch/hppa/include/pdc.h | 462 | ||||
| -rw-r--r-- | sys/arch/hppa/include/signal.h | 54 | ||||
| -rw-r--r-- | sys/arch/hppa/include/stdarg.h | 59 | ||||
| -rw-r--r-- | sys/arch/hppa/include/trap.h | 74 | ||||
| -rw-r--r-- | sys/arch/hppa/include/types.h | 85 |
18 files changed, 2243 insertions, 0 deletions
diff --git a/sys/arch/hppa/include/ansi.h b/sys/arch/hppa/include/ansi.h new file mode 100644 index 00000000000..85efa95a377 --- /dev/null +++ b/sys/arch/hppa/include/ansi.h @@ -0,0 +1,76 @@ +/* $OpenBSD: ansi.h,v 1.1 1998/06/23 19:45:19 mickey Exp $ */ + +/*- + * Copyright (c) 1990, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)ansi.h 8.2 (Berkeley) 1/4/94 + */ + +#ifndef _ANSI_H_ +#define _ANSI_H_ + +/* + * Types which are fundamental to the implementation and may appear in + * more than one standard header are defined here. Standard headers + * then use: + * #ifdef _BSD_SIZE_T_ + * typedef _BSD_SIZE_T_ size_t; + * #undef _BSD_SIZE_T_ + * #endif + */ +#define _BSD_CLOCK_T_ unsigned long /* clock() */ +#define _BSD_PTRDIFF_T_ int /* ptr1 - ptr2 */ +#define _BSD_SIZE_T_ unsigned int /* sizeof() */ +#define _BSD_SSIZE_T_ int /* byte count or error */ +#define _BSD_TIME_T_ long /* time() */ +#define _BSD_VA_LIST_ double * /* va_list */ +#define _BSD_CLOCKID_T_ int +#define _BSD_TIMER_T_ int + +/* + * Runes (wchar_t) is declared to be an ``int'' instead of the more natural + * ``unsigned long'' or ``long''. Two things are happening here. It is not + * unsigned so that EOF (-1) can be naturally assigned to it and used. Also, + * it looks like 10646 will be a 31 bit standard. This means that if your + * ints cannot hold 32 bits, you will be in trouble. The reason an int was + * chosen over a long is that the is*() and to*() routines take ints (says + * ANSI C), but they use _RUNE_T_ instead of int. By changing it here, you + * lose a bit of ANSI conformance, but your programs will still work. + * + * Note that _WCHAR_T_ and _RUNE_T_ must be of the same type. When wchar_t + * and rune_t are typedef'd, _WCHAR_T_ will be undef'd, but _RUNE_T remains + * defined for ctype.h. + */ +#define _BSD_WCHAR_T_ int /* wchar_t */ +#define _BSD_RUNE_T_ int /* rune_t */ + +#endif /* _ANSI_H_ */ diff --git a/sys/arch/hppa/include/cdefs.h b/sys/arch/hppa/include/cdefs.h new file mode 100644 index 00000000000..f2694c44bd9 --- /dev/null +++ b/sys/arch/hppa/include/cdefs.h @@ -0,0 +1,38 @@ +/* $OpenBSD: cdefs.h,v 1.1 1998/06/23 19:45:19 mickey Exp $ */ + +/* + * Copyright (c) 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#ifndef _MACHINE_CDEFS_H_ +#define _MACHINE_CDEFS_H_ + +#define _C_LABEL(x) _STRING(x) + +#define __indr_references(sym,msg) /* nothing */ +#define __warn_references(sym,msg) /* nothing */ + +#endif /* !_MACHINE_CDEFS_H_ */ diff --git a/sys/arch/hppa/include/cpu.h b/sys/arch/hppa/include/cpu.h new file mode 100644 index 00000000000..aaf7e2bbbc8 --- /dev/null +++ b/sys/arch/hppa/include/cpu.h @@ -0,0 +1,122 @@ +/* $OpenBSD: cpu.h,v 1.1 1998/06/23 19:45:20 mickey Exp $ */ + +/* + * Copyright (c) 1988-1994, The University of Utah and + * the Computer Systems Laboratory at the University of Utah (CSL). + * All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS + * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF + * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: cpu.h 1.19 94/12/16$ + */ + +#include <machine/frame.h> + +/* + * Exported definitions unique to hp700/PA-RISC cpu support. + */ + +/* + * definitions of cpu-dependent requirements + * referenced in generic code + */ +#undef COPY_SIGCODE /* copy sigcode above user stack in exec */ + +/* + * Supported systems + */ +#define HP_810 0x100 +#define HP_815 0x103 +#define HP_822 0x101 +#define HP_825 0x008 +#define HP_827 0x102 +#define HP_835 0x00a +#define HP_840 0x004 +#define HP_842 0x104 +#define HP_845 0x00b +#define HP_850 0x080 +#define HP_852 0x105 +#define HP_855 0x081 +#define HP_860 0x082 +#define HP_870 0x083 + +#define HP_720 0x200 /* [S] Cobra */ +#define HP_750 0x201 /* [S] Coral */ +#define HP_730 0x202 /* [S] King Cobra */ + +#define HP_710 0x300 /* [S] Bushmaster */ +#define HP_705 0x302 /* [S] Bushmaster */ + +#define HP_715_33 0x311 /* [S] Scorpio */ +#define HP_715_50 0x310 /* [S] Scorpio */ +#define HP_715T_50 0x312 /* [S] Scorpio (upgrade from 4XXt) */ +#define HP_715S_50 0x314 /* [S] Scorpio (upgrade from 4XXs) */ +#define HP_715_75 0x316 /* [S] Scorpio */ +#define HP_725 0xFFF /* [S] Scorpio -- is this the real ID? */ +#define HP_735 0x203 /* [S] Hardball */ +#define HP_735_125 0x206 /* [S] Hardball */ +#define HP_755 0xFFD /* [S] Coral II -- is this the real ID? */ + +#define HP_712_60 0x600 /* [S] Gekko */ +#define HP_712_80 0x601 /* [S] Gekko */ +#define HP_712_100 0x602 /* [S] Gekko */ +#define HP_743i_1 0x603 +#define HP_743i_2 0x604 +#define HP_712_4 0x605 /* [S] Gekko */ +#define HP_7GL_1 0x606 +#define HP_7GL_2 0x607 +#define HP_7GL_3 0x608 +#define HP_743v_1 0x617 +#define HP_743v_2 0x618 +#define HP_743i_3 0x619 + +#define HPPA_IOSPACE 0xf0000000 +#define HPPA_IOBCAST 0xfffc0000 +#define HPPA_PDC_LOW 0xef000000 +#define HPPA_PDC_HIGH 0xf1000000 +#define HPPA_FPA 0xfff80000 +#define HPPA_FLEX_DATA 0xfff80001 +#define HPPA_DMA_ENABLE 0x00000001 +#define HPPA_FLEX_MASK 0xfffc0000 +#define HPPA_SPA_ENABLE 0x00000020 +#define HPPA_NMODSPBUS 64 + +#define CLKF_BASEPRI(framep) (0) /* XXX */ +#define CLKF_PC(framep) (0) /* XXX */ +#define CLKF_INTR(framep) (0) /* XXX */ +#define CLKF_USERMODE(framep) (0) /* XXX */ + +#define signotify(p) (void)(p) +#define need_resched() {(void)1;} +#define need_proftick(p) {(void)(p);} + +/* + * Boot arguments stuff + */ + +#define BOOTARG_LEN (NBPG) +#define BOOTARG_OFF (NBPG) + +/* + * CTL_MACHDEP definitions. + */ +#define CPU_CONSDEV 1 /* dev_t: console terminal device */ +#define CPU_MAXID 2 /* number of valid machdep ids */ + +#define CTL_MACHDEP_NAMES { \ + { 0, 0 }, \ + { "console_device", CTLTYPE_STRUCT }, \ +} diff --git a/sys/arch/hppa/include/disklabel.h b/sys/arch/hppa/include/disklabel.h new file mode 100644 index 00000000000..8d794f72aec --- /dev/null +++ b/sys/arch/hppa/include/disklabel.h @@ -0,0 +1,46 @@ +/* $OpenBSD: disklabel.h,v 1.1 1998/06/23 19:45:20 mickey Exp $ */ + +/* + * Copyright (c) 1998 Michael Shalayeff + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Michael Shalayeff. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _MACHINE_DISKLABEL_H_ +#define _MACHINE_DISKLABEL_H_ + +#define LABELSECTOR (1024 / DEV_BSIZE) /* sector containing label */ +#define LABELOFFSET 0 /* offset of label in sector */ +#define MAXPARTITIONS 16 /* number of partitions */ +#define RAW_PART 2 /* raw partition: xx?c */ + +/* Just a dummy */ +struct cpu_disklabel { + int cd_dummy; /* must have one element. */ +}; + +#endif /* _MACHINE_DISKLABEL_H_ */ diff --git a/sys/arch/hppa/include/endian.h b/sys/arch/hppa/include/endian.h new file mode 100644 index 00000000000..891aa9ad9f7 --- /dev/null +++ b/sys/arch/hppa/include/endian.h @@ -0,0 +1,44 @@ +/* $OpenBSD: endian.h,v 1.1 1998/06/23 19:45:21 mickey Exp $ */ + +/* + * Copyright (c) 1987, 1991 Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)endian.h 7.10 (Berkeley) 5/7/93 + */ + +#ifndef _HPPA_ENDIAN_H_ +#define _HPPA_ENDIAN_H_ + +#define BYTE_ORDER 4321 +#include <sys/endian.h> + +#endif /* !_HPPA_ENDIAN_H_ */ diff --git a/sys/arch/hppa/include/exec.h b/sys/arch/hppa/include/exec.h new file mode 100644 index 00000000000..e778910d213 --- /dev/null +++ b/sys/arch/hppa/include/exec.h @@ -0,0 +1,37 @@ +/* $OpenBSD: exec.h,v 1.1 1998/06/23 19:45:21 mickey Exp $ */ + +/* + * Copyright (c) 1994, The University of Utah and + * the Computer Systems Laboratory at the University of Utah (CSL). + * All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS + * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF + * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: exec.h 1.3 94/12/16$ + */ + +#define cpu_exec_aout_makecmds(p, epp) ENOEXEC + +/* Size of a page in an object file. */ +#define __LDPGSZ 4096 + +#define ELF_TARG_CLASS ELFCLASS64 +#define ELF_TARG_DATA ELFDATA2LSB +#define ELF_TARG_MACH EM_PARISC + +#define _NLIST_DO_AOUT +#define _NLIST_DO_ECOFF + diff --git a/sys/arch/hppa/include/frame.h b/sys/arch/hppa/include/frame.h new file mode 100644 index 00000000000..bb7f5173338 --- /dev/null +++ b/sys/arch/hppa/include/frame.h @@ -0,0 +1,14 @@ +/* $OpenBSD: frame.h,v 1.1 1998/06/23 19:45:22 mickey Exp $ */ + + +#ifndef _HPPA_FRAME_H_ +#define _HPPA_FRAME_H_ + +#define FRAME_PC 0 + +struct trapframe { + int i; + int tf_regs[10]; +}; + +#endif diff --git a/sys/arch/hppa/include/intr.h b/sys/arch/hppa/include/intr.h new file mode 100644 index 00000000000..2366b4cf40f --- /dev/null +++ b/sys/arch/hppa/include/intr.h @@ -0,0 +1,233 @@ +/* $OpenBSD: intr.h,v 1.1 1998/06/23 19:45:22 mickey Exp $ */ + +/* + * Copyright (c) 1990,1991,1992,1994 The University of Utah and + * the Computer Systems Laboratory at the University of Utah (CSL). + * All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS + * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF + * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: machspl.h 1.16 94/12/14$ + * Author: Jeff Forys, Bob Wheeler, University of Utah CSL + */ + +#ifndef _HPPA_INTR_H_ +#define _HPPA_INTR_H_ + +#include <machine/iodc.h> +#include <machine/iomod.h> + +/* + * While the original 8 SPL's were "plenty", the PA-RISC chip provides us + * with 32 possible interrupt levels. We take advantage of this by using + * the standard SPL names (e.g. splbio, splimp) and mapping them into the + * PA-RISC interrupt scheme. Obviously, to understand how SPL's work on + * the PA-RISC, one must first have an understanding as to how interrupts + * are handled on these chips! + * + * Briefly, the CPU has a 32-bit control register for External Interrupt + * Requests (EIR). Each bit corresponds to a specific external interrupt. + * Bits in the EIR can be masked by the External Interrupt Enable Mask + * (EIEM) control register. Zero bits in the EIEM mask pending external + * interrupt requests for the corresponding bit positions. Finally, the + * PSW I-bit must be set to allow interrupts to occur. + * + * SPL values then, are possible values for the EIEM. For example, SPL0 + * would set the EIEM to 0xffffffff (enable all external interrupts), and + * SPLCLOCK would set the EIEM to 0x0 (disable all external interrupts). + */ + +/* + * Define all possible External Interrupt Enable Masks (EIEMs). + */ +#define INTPRI_00 0x00000000 +#define INTPRI_01 0x80000000 +#define INTPRI_02 0xc0000000 +#define INTPRI_03 0xe0000000 +#define INTPRI_04 0xf0000000 +#define INTPRI_05 0xf8000000 +#define INTPRI_06 0xfc000000 +#define INTPRI_07 0xfe000000 +#define INTPRI_08 0xff000000 +#define INTPRI_09 0xff800000 +#define INTPRI_10 0xffc00000 +#define INTPRI_11 0xffe00000 +#define INTPRI_12 0xfff00000 +#define INTPRI_13 0xfff80000 +#define INTPRI_14 0xfffc0000 +#define INTPRI_15 0xfffe0000 +#define INTPRI_16 0xffff0000 +#define INTPRI_17 0xffff8000 +#define INTPRI_18 0xffffc000 +#define INTPRI_19 0xffffe000 +#define INTPRI_20 0xfffff000 +#define INTPRI_21 0xfffff800 +#define INTPRI_22 0xfffffc00 +#define INTPRI_23 0xfffffe00 +#define INTPRI_24 0xffffff00 +#define INTPRI_25 0xffffff80 +#define INTPRI_26 0xffffffc0 +#define INTPRI_27 0xffffffe0 +#define INTPRI_28 0xfffffff0 +#define INTPRI_29 0xfffffff8 +#define INTPRI_30 0xfffffffc +#define INTPRI_31 0xfffffffe +#define INTPRI_32 0xffffffff + +/* + * Convert PA-RISC EIEMs into machine-independent SPLs as follows: + * + * 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 + * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 + * +-+-+-+-+-+-+-+-+---+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * |c|p| | |v| | | |b i| | | | | | | |t| | | | | | | |n| | |s| | | | | + * |l|w| | |m| | | |i m| | | | | | | |t| | | | | | | |e| | |c| | | | | + * |k|r| | | | | | |o p| | | | | | | |y| | | | | | | |t| | |l| | | | | + * | | | | | | | | | | | | | | | | | | | | | | | | | | | |k| | | | | + * +-+-+-+-+-+-+-+-+---+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * + * The machine-dependent SPL's are also included below (indented). + * To change the interrupt priority of a particular device, you need + * only change it's corresponding #define below. + * + * Notes: + * - software prohibits more than one machine-dependent SPL per bit on + * a given architecture (e.g. hp700 or hp800). In cases where there + * are multiple equivalent devices which interrupt at the same level + * (e.g. ASP RS232 #1 and #2), the interrupt table insertion routine + * will always add in the unit number (arg0) to offset the entry. + * - hard clock must be the first bit (i.e. 0x80000000). + * - SPL7 is any non-zero value (since the PSW I-bit is off). + * - SPLIMP serves two purposes: blocks network interfaces and blocks + * memory allocation via malloc. In theory, SPLLAN would be high + * enough. However, on the 700, the SCSI driver uses malloc at + * interrupt time requiring SPLIMP >= SPLBIO. On the 800, we are + * still using HP-UX drivers which make the assumption that + * SPLIMP >= SPLCIO. New drivers would address both problems. + */ +#define SPLHIGH 0x00000007 /* any non-zero, non-INTPRI value */ +#define SPLCLOCK INTPRI_00 /* hard clock */ +#define SPLPOWER INTPRI_01 /* power failure (unused) */ +#define SPLVIPER INTPRI_03 /* (hp700) Viper */ +#define SPLVM INTPRI_04 /* TLB shootdown (unused) */ +#define SPLBIO INTPRI_08 /* block I/O */ +#define SPLASP INTPRI_08 /* (hp700) ASP */ +#define SPLCIO INTPRI_08 /* (hp800) CIO */ +#define SPLIMP INTPRI_08 /* network & malloc */ +#define SPLEISA INTPRI_09 /* (hp700 EISA) */ +#define SPLCIOHPIB INTPRI_09 /* (hp800) CIO HP-IB */ +#define SPLFWSCSI INTPRI_10 /* (hp700 internal FW SCSI) */ +#define SPLSCSI INTPRI_11 /* (hp700 internal SCSI) */ +#define SPLLAN INTPRI_12 /* (hp700 LAN) */ +#define SPLCIOLAN INTPRI_12 /* (hp800 CIO LAN) */ +#define SPLFDDI_1 INTPRI_13 /* FDDI #1 (graphics #1) */ +#define SPLFDDI_2 INTPRI_14 /* FDDI #2 (graphics #2) */ +#define SPLTTY INTPRI_16 /* TTY */ +#define SPLCIOMUX INTPRI_16 /* (hp800) CIO MUX */ +#define SPLDCA INTPRI_16 /* (hp700) RS232 #1 */ +/* INTPRI_17 * (hp700) RS232 #2 */ +#define SPLGRF INTPRI_18 /* (hp700/hp800) graphics #1) */ +/* INTPRI_19 * (hp700/hp800) graphics #2) */ +#define SPLHIL INTPRI_20 /* (hp700/hp800) HIL */ +#define SPLNET INTPRI_24 /* soft net */ +#define SPLSCLK INTPRI_27 /* soft clock */ +#define SPL0 INTPRI_32 /* no interrupts masked */ + +/* + * Define interrupt bits/masks. + * N.B. A lower privilege transfer trap uses an illegal SPL_IBIT. + */ +#define SPL_IMASK_CLOCK INTPRI_01 + +#define SPL_IBIT_CIO 8 +#define SPL_IBIT_CIOHPIB 9 +#define SPL_IBIT_CIOLAN 12 +#define SPL_IBIT_CIOMUX 16 +#define SPL_IBIT_SOFTNET 24 +#define SPL_IBIT_SOFTCLK 27 +#define SPL_IBIT_LPRIV 32 /* fake interrupt */ + +#if !defined(_LOCORE) +/* + * Define the machine-independent SPL routines in terms of splx(). + * To prevent cluttering the global spl() namespace, routines that + * need machine-dependent SPLs should roll their own. + * + * If compiling with GCC, it's easy to inline spl's with constant + * arguments. However, when the argument can be variable, there + * is little or no win; as a result, splx() is not inline'd. + */ +#define __splhigh(splhval) \ +({ \ + register unsigned int _ctl_r; \ + __asm __volatile ("mfctl 15,%0" : "=r" (_ctl_r) : ); \ + __asm __volatile ("mtctl %0,15" : : "r" (splhval) ); \ + __asm __volatile ("rsm 1,%%r0" : : ); \ + _ctl_r; \ +}) + +#define __spllow(spllval) \ +({ \ + register unsigned int _ctl_r; \ + __asm __volatile ("mfctl 15,%0" : "=r" (_ctl_r) : ); \ + __asm __volatile ("mtctl %0,15" : : "r" (spllval) ); \ + __asm __volatile ("ssm 1,%%r0" : : ); \ + _ctl_r; \ +}) + +#define splhigh() __splhigh(SPLHIGH) +#define splclock() __spllow(SPLCLOCK) +#define splpower() __spllow(SPLPOWER) +#define splvm() __spllow(SPLVM) +#define splbio() __spllow(SPLBIO) +#define splimp() __spllow(SPLIMP) +#define spltty() __spllow(SPLTTY) +#define splnet() __spllow(SPLNET) +#define splstatclock() __spllow(SPLCLOCK) +#define splsoft() __spllow(SPLSCLK) +#define splsoftnet() splsoft() +#define splsoftclock() splsoft() +#define spl0() __spllow(SPL0) + +int splx __P((int)); +#define setsoftclock() (PAGE0->mem_hpa->io_eir = SPL_IBIT_SOFTCLK) +#define setsoftnet() (void)(1) + +void mtctl __P((u_int, u_int)); +u_int mfctl __P((u_int)); + +/* + * BASEPRI is true when the specified EIEM is equal to the SPL level of + * the idle loop in swtch() (i.e. SPL0). + */ +#define BASEPRI(eiem) ((eiem) == (unsigned int)SPL0) + +/* + * This is a generic interrupt switch table. It may be used by various + * interrupt systems. For each interrupt, it holds a handler and an + * EIEM mask (selected from SPL* or, more generally, INTPRI*). + * + * So that these tables can be easily found, please prefix them with + * the label "itab_" (e.g. "itab_proc"). + */ +struct intrtab { + int (*handler) __P((void)); /* ptr to routine to call */ + unsigned int intpri; /* INTPRI (SPL) with which to call it */ + int arg0, arg1; /* 2 arguments to handler: arg0 is unit */ +}; + +#endif /* !_LOCORE */ +#endif /* _HPPA_INTR_H_ */ diff --git a/sys/arch/hppa/include/iodc.h b/sys/arch/hppa/include/iodc.h new file mode 100644 index 00000000000..3e14fdbc5c4 --- /dev/null +++ b/sys/arch/hppa/include/iodc.h @@ -0,0 +1,155 @@ +/* $OpenBSD: iodc.h,v 1.1 1998/06/23 19:45:23 mickey Exp $ */ + +/* + * Copyright (c) 1990 mt Xinu, Inc. All rights reserved. + * Copyright (c) 1990,1991,1992,1994 University of Utah. All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * This file may be freely distributed in any form as long as + * this copyright notice is included. + * MTXINU, THE UNIVERSITY OF UTAH, AND CSL PROVIDE THIS SOFTWARE ``AS + * IS'' AND WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, + * WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND + * FITNESS FOR A PARTICULAR PURPOSE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: iodc.h 1.6 94/12/14$ + */ + +/* + * Definitions for talking to IODC (I/O Dependent Code). + * + * The PDC is used to load I/O Dependent Code from a particular module. + * I/O Dependent Code is module-type dependent software which provides + * a uniform way to identify, initialize, and access a module (and in + * some cases, their devices). + */ + +#ifndef _IODC_ +#define _IODC_ + +#define MINIOSIZ 64 /* minimum buffer size for IODC call */ +#define MAXIOSIZ (64 * 1024) /* maximum buffer size for IODC call */ + +/* + * IODC Entry Indices and their arguments... + */ + +#define IODC_DATA 0 /* get the 16-byte IODC structure (see below) */ + +#define IODC_INIT 3 /* initialize (see options below) */ +#define IODC_INIT_FIRST 2 /* find first device on module */ +#define IODC_INIT_NEXT 3 /* find subsequent devices on module */ +#define IODC_INIT_ALL 4 /* initialize module and device */ +#define IODC_INIT_DEV 5 /* initialize device */ +#define IODC_INIT_MOD 6 /* initialize module */ +#define IODC_INIT_MSG 9 /* return error message(s) */ + +#define IODC_IO 4 /* perform I/O (see options below) */ +#define IODC_IO_BOOTIN 0 /* read from boot device */ +#define IODC_IO_BOOTOUT 1 /* write to boot device */ +#define IODC_IO_CONSIN 2 /* read from console */ +#define IODC_IO_CONSOUT 3 /* write to conosle */ +#define IODC_IO_MSG 9 /* return error message(s) */ + +#define IODC_SPA 5 /* get extended SPA information */ +#define IODC_SPA_DFLT 0 /* return SPA information */ + +#define IODC_TEST 8 /* perform self tests */ +#define IODC_TEST_INFO 0 /* return test information */ +#define IODC_TEST_STEP 1 /* execute a particular test */ +#define IODC_TEST_TEST 2 /* describe a test section */ +#define IODC_TEST_MSG 9 /* return error message(s) */ + + +/* + * The following structure defines what a particular IODC returns when + * given the IODC_DATA argument. + */ + +#if !defined(_LOCORE) && !defined(ASSEMBLER) +struct iodc_data { + u_int iodc_model: 8, /* hardware model number */ + iodc_revision:8, /* software revision */ + iodc_spa_io: 1, /* 0:memory, 1:device */ + iodc_spa_pack:1, /* 1:packed multiplexor */ + iodc_spa_enb:1, /* 1:has an spa */ + iodc_spa_shift:5, /* power of two # bytes in SPA space */ + iodc_more: 1, /* iodc_data is: 0:8-byte, 1:16-byte */ + iodc_word: 1, /* io_dc_data is: 0:byte, 1:word */ + iodc_pf: 1, /* 1:supports powerfail */ + iodc_type: 5; /* see below */ + u_int iodc_sv_rev: 4, /* software version revision number */ + iodc_sv_model:20, /* software interface model # */ + iodc_sv_opt: 8; /* type-specific options */ + u_char iodc_rev; /* revision number of IODC code */ + u_char iodc_dep; /* module-dependent information */ + u_char iodc_rsv[2]; /* reserved */ + u_short iodc_cksum; /* 16-bit checksum of whole IODC */ + u_short iodc_length; /* number of entry points in IODC */ + /* IODC entry points follow... */ +}; +#endif /* !(_LOCORE || ASSEMBLER) */ + +/* iodc_type */ +#define IODC_TP_NPROC 0 /* native processor */ +#define IODC_TP_MEMORY 1 /* memory */ +#define IODC_TP_B_DMA 2 /* Type-B DMA (NIO Transit, Parallel, ... ) */ +#define IODC_TP_B_DIRECT 3 /* Type-B Direct */ +#define IODC_TP_A_DMA 4 /* Type-A DMA (NIO HPIB, LAN, ... ) */ +#define IODC_TP_A_DIRECT 5 /* Type-A Direct (RS232, HIL, ... ) */ +#define IODC_TP_OTHER 6 /* other */ +#define IODC_TP_BCPORT 7 /* Bus Converter Port */ +#define IODC_TP_CIO 8 /* CIO adapter */ +#define IODC_TP_CONSOLE 9 /* console */ +#define IODC_TP_FIO 10 /* foreign I/O module */ +#define IODC_TP_BA 11 /* bus adaptor */ +#define IODC_TP_MULTI 12 /* Multiple-Type I/O */ +#define IODC_TP_FAULTY 31 /* broken */ + +/* iodc_sv_model (IODC_TP_MEMORY) */ +#define SVMOD_MEM_ARCH 0x8 /* architected memory module */ +#define SVMOD_MEM_PDEP 0x9 /* processor-dependent memory module */ + +/* iodc_sv_model (IODC_TP_OTHER) */ +#define SVMOD_O_SPECFB 0x48 /* hp800 Spectograph frame buffer */ +#define SVMOD_O_SPECCTL 0x49 /* hp800 Spectograph control */ + +/* iodc_sv_model (IODC_TP_BA) */ +#define SVMOD_BA_ASP 0x70 /* hp700 Core Bus Adapter (ASP/Hardball) */ +#define SVMOD_BA_EISA 0x76 /* hp700 EISA Bus Adapter */ +#define SVMOD_BA_VME 0x78 /* hp700 VME Bus Adapter (unsupported) */ +#define SVMOD_BA_LASI 0x81 /* hp700 712 Bus Adapter */ +#define SVMOD_BA_WAX 0x8e /* hp700 ??? Bus Adapter (unsupported) */ + +/* iodc_sv_model (IODC_TP_FIO) */ +#define SVMOD_FIO_SCSI 0x71 /* hp700 Core SCSI */ +#define SVMOD_FIO_FWSCSI 0x7c /* hp700 Core FW SCSI */ +#define SVMOD_FIO_LAN 0x72 /* hp700 Core LAN */ +#define SVMOD_FIO_FDDI 0x7d /* hp700 Core FDDI (unsupported) */ +#define SVMOD_FIO_HIL 0x73 /* hp700 Core HIL */ +#define SVMOD_FIO_CENT 0x74 /* hp700 Core Centronics */ +#define SVMOD_FIO_RS232 0x75 /* hp700 Core RS-232 */ +#define SVMOD_FIO_SGC 0x77 /* hp700 SGC Graphics */ +#define SVMOD_FIO_A1 0x7a /* hp700 Core audio (type 1) */ +#define SVMOD_FIO_A1NB 0x7e /* hp700 Core audio (type 1, no beeper) */ +#define SVMOD_FIO_A2 0x7f /* hp700 Core audio (type 2) */ +#define SVMOD_FIO_A2NB 0x7b /* hp700 Core audio (type 2, no beeper) */ +#define SVMOD_FIO_HPIB 0x80 /* hp700 Core HPIB (unsupported) */ + +#define SVMOD_FIO_GSCSI 0x82 /* hp712 Core SCSI */ +#define SVMOD_FIO_GPCFD 0x83 /* hp712 PC floppy disk */ +#define SVMOD_FIO_GPCIO 0x84 /* hp712 PC keyboard and mouse */ +#define SVMOD_FIO_GGRF 0x85 /* hp712 SGC Graphics */ +#define SVMOD_FIO_GLAN 0x8a /* hp712 Core LAN */ +#define SVMOD_FIO_GRS232 0x8c /* hp712 Core RS232 */ +#endif /* _IODC_ */ diff --git a/sys/arch/hppa/include/iomod.h b/sys/arch/hppa/include/iomod.h new file mode 100644 index 00000000000..3017eae722b --- /dev/null +++ b/sys/arch/hppa/include/iomod.h @@ -0,0 +1,407 @@ +/* $OpenBSD: iomod.h,v 1.1 1998/06/23 19:45:23 mickey Exp $ */ + +/* + * Copyright (c) 1990 mt Xinu, Inc. All rights reserved. + * Copyright (c) 1990,1991,1992,1994 University of Utah. All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * Copyright (c) 1990 mt Xinu, Inc. + * This file may be freely distributed in any form as long as + * this copyright notice is included. + * MTXINU, THE UNIVERSITY OF UTAH, AND CSL PROVIDE THIS SOFTWARE ``AS + * IS'' AND WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, + * WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND + * FITNESS FOR A PARTICULAR PURPOSE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: iomod.h 1.6 94/12/14$ + */ + +#ifndef _IOMOD_ +#define _IOMOD_ + +#include <machine/pdc.h> + +/* + * Structures and definitions for I/O Modules on HP-PA (9000/800). + * + * Memory layout: + * + * 0x00000000 +---------------------------------+ + * | Page Zero | + * 0x00000800 + - - - - - - - - - - - - - - - - + + * | | + * | | + * | Memory Address Space | + * | | + * | | + * 0xEF000000 +---------------------------------+ + * | | + * | PDC Address Space | + * | | + * 0xF1000000 +---------------------------------+ + * | | + * | | + * | I/O Address Space | + * | | + * | | + * 0xFFF80000 + - - - - - - - - - - - - - - - - + + * | Fixed Physical Address Space | + * 0xFFFC0000 + - - - - - - - - - - - - - - - - + + * | Local Broadcast Address Space | + * 0xFFFE0000 + - - - - - - - - - - - - - - - - + + * | Global Broadcast Address Space | + * 0xFFFFFFFF +---------------------------------+ + * + * "Memory Address Space" is used by memory modules, + * "Page Zero" is described below. + * "PDC Address Space" is used by Processor-Dependent Code. + * "I/O Address Space" is used by I/O modules (and is not cached), + * "Fixed Physical" is used by modules on the central bus, + * "Local Broadcast" is used to reach all modules on the same bus, and + * "Global Broadcast" is used to reach all modules (thru bus converters). + * + * SPA space (see below) ranges from 0xF1000000 thru 0xFFFC0000. + */ + +#define PDC_ADDR 0xEF000000 /* explained above */ +#define IO_ADDR 0xF1000000 +#define SGC_SLOT1 0xF4000000 /* (hp700) */ +#define SGC_SLOT2 0xF8000000 /* (hp700) */ +#define SGC_SIZE 0x02000000 /* (hp700) */ +#define FP_ADDR 0xFFF80000 +#define LBCAST_ADDR 0xFFFC0000 +#define GBCAST_ADDR 0xFFFE0000 + +#define PDC_LOW PDC_ADDR /* define some ranges */ +#define PDC_HIGH IO_ADDR +#define FPA_LOW FP_ADDR +#define FPA_HIGH LBCAST_ADDR +#define SPA_LOW IO_ADDR +#define SPA_HIGH LBCAST_ADDR +#define SGC_LOW SGC_SLOT1 +#define SGC_HIGH (SGC_SLOT2+SGC_SIZE) + +#define FPA_IOMOD ((FPA_HIGH-FPA_LOW)/sizeof(struct iomod)) +#define MAXMODBUS ((int)(FPA_IOMOD)) /* maximum modules/bus */ + +#define FLEX_MASK 0xFFFC0000 /* (see below) */ + +#if !defined(_LOCORE) && !defined(ASSEMBLER) +/* + * Simplify typing for all these volatile things. + */ +typedef volatile char * v_caddr; + +/* + * The first 2K of Soft Physical Address space on the Initial Memory Module + * is aptly called "page zero". The following structure defines the format + * of page zero. Individual members of this structure should be accessed + * as "PAGE0->member". + */ + +#define PAGE0 ((struct pagezero *)0) /* can't get any lower than this! */ + +struct pagezero { + /* [0x000] Initialize Vectors */ + int ivec_special; /* must be zero */ + int (*ivec_mempf)__P((void)); /* powerfail recovery software */ + int (*ivec_toc)__P((void)); /* exec'd after Transfer Of Control */ + int ivec_toclen; /* bytes of ivec_toc code */ + int (*ivec_rendz)__P((void)); /* exec'd after Rendezvous Signal */ + int ivec_mempflen; /* bytes of ivec_mempf code */ + int ivec_resv[10]; /* (reserved) must be zero */ + + /* [0x040] Processor Dependent */ + union { + int pd_Resv1[112]; /* (reserved) processor dependent */ + struct { /* Viper-specific data */ + int v_Resv1[39]; + u_int v_Ctrlcpy; /* copy of Viper `vi_control' */ + int v_Resv2[72]; + } pd_Viper; + } pz_Pdep; + + /* [0x200] Reserved */ + int resv1[84]; /* (reserved) */ + + /* [0x350] Memory Configuration */ + int memc_cont; /* bytes of contiguous valid memory */ + int memc_phsize; /* bytes of valid physical memory */ + int memc_adsize; /* bytes of SPA space used by PDC */ + int memc_resv; /* (reserved) */ + + /* [0x360] Miscellaneous */ + struct boot_err mem_be[8]; /* boot errors (see above) */ + int mem_free; /* first free phys. memory location */ + struct iomod *mem_hpa; /* HPA of CPU */ + int (*mem_pdc)__P((void)); /* PDC entry point */ + u_int mem_10msec; /* # of Interval Timer ticks in 10msec*/ + + /* [0x390] Initial Memory Module */ + struct iomod *imm_hpa; /* HPA of Initial Memory module */ + int imm_soft_boot; /* 0 == hard boot, 1 == soft boot */ + int imm_spa_size; /* bytes of SPA in IMM */ + int imm_max_mem; /* bytes of mem in IMM (<= spa_size) */ + + /* [0x3A0] Boot Console/Display, Device, and Keyboard */ + struct pz_device mem_cons; /* description of console device */ + struct pz_device mem_boot; /* description of boot device */ + struct pz_device mem_kbd; /* description of keyboard device */ + + /* [0x430] Reserved */ + int resv2[116]; /* (reserved) */ + + /* [0x600] Processor Dependent */ + int pd_resv2[128]; /* (reserved) processor dependent */ +}; +#define v_ctrlcpy pz_Pdep.pd_Viper.v_Ctrlcpy + + +/* + * Every module has 4K-bytes of address space associated with it. + * A Hard Physical Address (HPA) can be broken down as follows. + * + * Since this is an I/O space, the high 4 bits are always 1's. + * + * The "flex" address specifies which bus a module is on; there are + * 256K-bytes of HPA space for each bus, however only values from + * 64 - 1022 are valid for the "flex" field (1022 designates the + * central bus). The "flex" addr is set at bus configuration time. + * + * The "fixed" address specifies a particular module on the same + * bus (i.e. among modules with the same "flex" address). This + * value can also be found in "device_path.dp_mod" in "pdc.h". + * + * A modules HPA space consists of 2 pages; the "up" bit specifies + * which of these pages is being addressed. In general, the lower + * page is privileged and the upper page it module-type dependent. + * + */ + +struct hpa { + u_int hpa_ones: 4, /* must be 1's; this is an I/O space addr */ + hpa_flex:10, /* bus address for this module */ + hpa_fixed:6, /* location of module on bus */ + hpa_up : 1, /* 1 == upper page, 0 == lower page */ + hpa_set : 5, /* register set */ + hpa_reg : 4, /* register number within a register set */ + hpa_zeros:2; /* must be 0's; addrs are word aligned */ +}; + + +/* + * Certain modules require additional memory (i.e. more than that + * provided by the HPA space). A Soft Physical Address (SPA) can be + * broken down as follows, on a module-type specific basis (either + * Memory SPA or I/O SPA). + * + * SPA space must be a power of 2, and aligned accordingly. The IODC + * provides all information needed by software to configure SPA space + * for a particular module. + */ + +struct memspa { + u_int spa_page:21, /* page of memory */ + spa_off :11; /* offset into memory page */ +}; + +struct iospa { + u_int spa_ones: 4, /* must be 1's; this is an I/O space addr */ + spa_iopg:17, /* page in I/O address space */ + spa_set : 5, /* register set */ + spa_reg : 4, /* register number within a register set */ + spa_mode: 2; /* aligned according to bus transaction mode */ +}; + + +/* + * It is possible to send a command to all modules on a particular bus + * (local broadcast), or all modules (global broadcast). A Broadcast + * Physical Address (BPA) can be broken down as follows. + * + * Read and Clear transactions are not allowed in BPA space. All pages + * in BPA space are privileged. + */ + +struct bpa { + u_int bpa_ones:14, /* must be 1's; this is in BPA space */ + bpa_gbl : 1, /* 0 == local, 1 == global broadcast */ + bpa_page: 6, /* page in local/global BPA space */ + bpa_set : 5, /* register set */ + bpa_reg : 4, /* register number within a register set */ + bpa_zeros:2; /* must be 0's; addrs are word aligned */ +}; + + +/* + * All I/O and Memory modules have 4K-bytes of HPA space associated with + * it (described above), however not all modules implement every register. + * The first 2K-bytes of registers are "priviliged". + * + * (WO) == Write Only, (RO) == Read Only + */ + +struct iomod { +/* SRS (Supervisor Register Set) */ + u_int io_eir; /* (WO) interrupt CPU; set bits in EIR CR */ + u_int io_eim; /* (WO) External Interrupt Message address */ + u_int io_dc_rw; /* write address of IODC to read IODC data */ + int io_ii_rw; /* read/clear external intrpt msg (bit-26) */ + caddr_t io_dma_link; /* pointer to "next quad" in DMA chain */ + u_int io_dma_command; /* (RO) chain command to exec on "next quad" */ + caddr_t io_dma_address; /* (RO) start of DMA */ + int io_dma_count; /* (RO) number of bytes remaining to xfer */ + caddr_t io_flex; /* (WO) HPA flex addr, LSB: bus master flag */ + caddr_t io_spa; /* (WO) SPA space; 0-20:addr, 24-31:iodc_spa */ + int resv1[2]; /* (reserved) */ + u_int io_command; /* (WO) module commands (see below) */ + u_int io_status; /* (RO) error returns (see below) */ + u_int io_control; /* memory err logging (bit-9), bc forwarding */ + u_int io_test; /* (RO) self-test information */ +/* ARS (Auxiliary Register Set) */ + u_int io_err_sadd; /* (RO) slave bus error or memory error addr */ + caddr_t chain_addr; /* start address of chain RAM */ + u_int sub_mask_clr; /* ignore intrpts on sub-channel (bitmask) */ + u_int sub_mask_set; /* service intrpts on sub-channel (bitmask) */ + u_int diagnostic; /* diagnostic use (reserved) */ + int resv2[2]; /* (reserved) */ + caddr_t nmi_address; /* address to send data to when NMI detected */ + caddr_t nmi_data; /* NMI data to be sent */ + int resv3[3]; /* (reserved) */ + u_int io_mem_low; /* bottom of memory address range */ + u_int io_mem_high; /* top of memory address range */ + u_int io_io_low; /* bottom of I/O HPA address Range */ + u_int io_io_high; /* top of I/O HPA address Range */ + + int priv_trs[160]; /* TRSes (Type-dependent Reg Sets) */ + + int priv_hvrs[320]; /* HVRSes (HVERSION-dependent Register Sets) */ + + int hvrs[512]; /* HVRSes (HVERSION-dependent Register Sets) */ +}; +#endif /* !_LOCORE */ + +/* io_flex */ +#define DMA_ENABLE 0x1 /* flex register enable DMA bit */ + +/* io_spa */ +#define IOSPA(spa,iodc_data) \ + ((v_caddr) \ + (spa | iodc_data.iodc_spa_shift | iodc_data.iodc_spa_enb << 5 | \ + iodc_data.iodc_spa_pack << 6 | iodc_data.iodc_spa_io << 7)) + +/* io_command */ +#define CMD_STOP 0 /* halt any I/O, enable diagnostic access */ +#define CMD_FLUSH 1 /* abort DMA */ +#define CMD_CHAIN 2 /* initiate DMA */ +#define CMD_CLEAR 3 /* clear errors */ +#define CMD_RESET 5 /* reset any module */ + +/* io_status */ +#define IO_ERR_MEM_SL 0x10000 /* SPA space lost or corrupted */ +#define IO_ERR_MEM_SE 0x00200 /* severity: minor */ +#define IO_ERR_MEM_HE 0x00100 /* severity: affects invalid parts */ +#define IO_ERR_MEM_FE 0x00080 /* severity: bad */ +#define IO_ERR_MEM_RY 0x00040 /* IO_COMMAND register ready for command */ +#define IO_ERR_DMA_DG 0x00010 /* module in diagnostic mode */ +#define IO_ERR_DMA_PW 0x00004 /* Power Failing */ +#define IO_ERR_DMA_PL 0x00002 /* Power Lost */ +#define IO_ERR_VAL(x) (((x) >> 10) & 0x3f) +#define IO_ERR_DEPEND 0 /* unspecified error */ +#define IO_ERR_SPA 1 /* (module-type specific) */ +#define IO_ERR_INTERNAL 2 /* (module-type specific) */ +#define IO_ERR_MODE 3 /* invlaid mode or address space mapping */ +#define IO_ERR_ERROR_M 4 /* bus error (master detect) */ +#define IO_ERR_DPARITY_S 5 /* data parity (slave detect) */ +#define IO_ERR_PROTO_M 6 /* protocol error (master detect) */ +#define IO_ERR_ADDRESS 7 /* no slave acknowledgement in transaction */ +#define IO_ERR_MORE 8 /* device transfered more data than expected */ +#define IO_ERR_LESS 9 /* device transfered less data than expected */ +#define IO_ERR_SAPARITY 10 /* slave addrss phase parity */ +#define IO_ERR_MAPARITY 11 /* master address phase parity */ +#define IO_ERR_MDPARITY 12 /* mode phase parity */ +#define IO_ERR_STPARITY 13 /* status phase parity */ +#define IO_ERR_CMD 14 /* unimplemented I/O Command */ +#define IO_ERR_BUS 15 /* generic bus error */ +#define IO_ERR_CORR 24 /* correctable memory error */ +#define IO_ERR_UNCORR 25 /* uncorrectable memory error */ +#define IO_ERR_MAP 26 /* equivalent to IO_ERR_CORR */ +#define IO_ERR_LINK 28 /* Bus Converter "link" (connection) error */ +#define IO_ERR_CCMD 32 /* Illegal DMA command */ +#define IO_ERR_ERROR_S 52 /* bus error (slave detect) */ +#define IO_ERR_DPARITY_M 53 /* data parity (master detect) */ +#define IO_ERR_PROTOCOL 54 /* protocol error (slave detect) */ +#define IO_ERR_SELFTEST 58 /* (module-type specific) */ +#define IO_ERR_BUSY 59 /* slave was busy too often or too long */ +#define IO_ERR_RETRY 60 /* "busied" transaction not retried soon enuf */ +#define IO_ERR_ACCESS 61 /* illegal register access */ +#define IO_ERR_IMPROP 62 /* "improper" data written */ +#define IO_ERR_UNKNOWN 63 + +/* io_control (memory) */ +#define IO_CTL_MEMINIT 0x0 /* prevent some bus errors during memory init */ +#define IO_CTL_MEMOKAY 0x100 /* enable all bus error logging */ + +/* io_spa */ +#define SPA_ENABLE 0x20 /* io_spa register enable spa bit */ + + +/* + * Before configuring the bus, we build a table which consists of + * "useful information" on each module. We then use this table to + * allocate SPA's and reconfigure the bus. + */ + +#define MODTABSIZ MAXMODBUS /* size of static I/O module table */ + +#if !defined(_LOCORE) && !defined(ASSEMBLER) +struct modtab { + struct modtab *mt_next; /* pointer to next `modtab' entry */ + u_int m_fixed; /* fixed bus address */ + struct iodc_data mt_type; /* type specific info from IODC */ + volatile struct iomod *m_hpa; /* ptr to HPA */ + u_int m_spa; /* location of SPA */ + u_int m_spasiz; /* size of SPA */ + union { + struct { /* Memory module */ + u_int M_memsiz; /* size (m_memsiz) */ + } m_Mem; + struct { /* I/O module */ + u_int M_cioeim; /* EIM address (m_cioeim) */ + caddr_t M_ciochain; /* CIO chain RAM (m_ciochain) */ + } m_Io; + struct { /* Viper memory controller module */ + u_int M_vi_eim; /* EIM address (m_vi_eim) */ + u_int M_vi_iwd; /* EIM intr word (m_vi_iwd) */ + } m_Vi; + union { /* Foriegn I/O module */ + u_int M_scsiclk; /* SCSI: clock frequency */ + u_int M_stirom; /* GRF: location of STI ROM */ + } m_Fio; + } m_Dep; +}; + +#define m_memsiz m_Dep.m_Mem.M_memsiz +#define m_cioeim m_Dep.m_Io.M_cioeim +#define m_ciochain m_Dep.m_Io.M_ciochain +#define m_vi_eim m_Dep.m_Vi.M_vi_eim +#define m_vi_iwd m_Dep.m_Vi.M_vi_iwd +#define m_scsiclk m_Dep.m_Fio.M_scsiclk +#define m_stirom m_Dep.m_Fio.M_stirom +#endif /* !(_LOCORE || ASSEMBLER) */ + +#define EIM_GRPMASK 0x1F /* EIM register group mask */ +#define EIEM_MASK(eim) (0x80000000 >> (eim & EIM_GRPMASK)) +#define EIEM_BITCNT 32 /* number of bits in EIEM register */ + +#endif /* _IOMOD_ */ diff --git a/sys/arch/hppa/include/limits.h b/sys/arch/hppa/include/limits.h new file mode 100644 index 00000000000..e4eadb27e25 --- /dev/null +++ b/sys/arch/hppa/include/limits.h @@ -0,0 +1,114 @@ +/* $OpenBSD: limits.h,v 1.1 1998/06/23 19:45:24 mickey Exp $ */ + +/* + * Copyright (c) 1992-1994, The University of Utah and + * the Computer Systems Laboratory at the University of Utah (CSL). + * All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS + * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF + * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: limits.h 1.6 94/12/16$ + */ + +/* + * Copyright (c) 1988, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)limits.h 8.3 (Berkeley) 1/4/94 + */ + +#define CHAR_BIT 8 /* number of bits in a char */ +#define MB_LEN_MAX 6 /* Allow 31 bit UTF2 */ + + +#ifdef _KERNEL +#define CLK_TCK 60 /* ticks per second */ +#endif + +/* + * According to ANSI (section 2.2.4.2), the values below must be usable by + * #if preprocessing directives. Additionally, the expression must have the + * same type as would an expression that is an object of the corresponding + * type converted according to the integral promotions. The subtraction for + * INT_MIN and LONG_MIN is so the value is not unsigned; 2147483648 is an + * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2). + * These numbers work for pcc as well. The UINT_MAX and ULONG_MAX values + * are written as hex so that GCC will be quiet about large integer constants. + */ +#define SCHAR_MAX 127 /* min value for a signed char */ +#define SCHAR_MIN (-128) /* max value for a signed char */ + +#define UCHAR_MAX 255 /* max value for an unsigned char */ +#define CHAR_MAX 127 /* max value for a char */ +#define CHAR_MIN (-128) /* min value for a char */ + +#define USHRT_MAX 65535 /* max value for an unsigned short */ +#define SHRT_MAX 32767 /* max value for a short */ +#define SHRT_MIN (-32768) /* min value for a short */ + +#define UINT_MAX 0xffffffff /* max value for an unsigned int */ +#define INT_MAX 2147483647 /* max value for an int */ +#define INT_MIN (-2147483647-1) /* min value for an int */ + +#define ULONG_MAX 0xffffffff /* max value for an unsigned long */ +#define LONG_MAX 2147483647 /* max value for a long */ +#define LONG_MIN (-2147483647-1) /* min value for a long */ + +#if !defined(_ANSI_SOURCE) +#define SSIZE_MAX INT_MAX /* max value for a ssize_t */ + +#if !defined(_POSIX_SOURCE) +#define SIZE_T_MAX UINT_MAX /* max value for a size_t */ + +#define UID_MAX UINT_MAX /* max value for a uid_t */ +#define GID_MAX UINT_MAX /* max value for a gid_t */ + +/* GCC requires that quad constants be written as expressions. */ +#define UQUAD_MAX ((u_quad_t)0-1) /* max value for a uquad_t */ + /* max value for a quad_t */ +#define QUAD_MAX ((quad_t)(UQUAD_MAX >> 1)) +#define QUAD_MIN (-QUAD_MAX-1) /* min value for a quad_t */ + +#endif /* !_POSIX_SOURCE */ +#endif /* !_ANSI_SOURCE */ diff --git a/sys/arch/hppa/include/nvm.h b/sys/arch/hppa/include/nvm.h new file mode 100644 index 00000000000..a0712807762 --- /dev/null +++ b/sys/arch/hppa/include/nvm.h @@ -0,0 +1,74 @@ +/* $OpenBSD: nvm.h,v 1.1 1998/06/23 19:45:24 mickey Exp $ */ + +/* + * Copyright (c) 1990, 1994 The University of Utah and + * the Computer Systems Laboratory at the University of Utah (CSL). + * All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS + * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF + * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: nvm.h 1.4 94/12/14$ + * Author: Jeff Forys, University of Utah CSL + */ + +#ifndef _NVM_ +#define _NVM_ + +/* + * The PDC provides access to Non-Volatile Memory (NVM). If this + * is implemented (it's HVERSION dependent), the first 256 bytes + * are formatted as follows: + * + * 0x000 +----------------------------+ + * | Implementation information | + * 0x024 +----------------------------+ + * | | + * | IPL information | + * | | + * 0x080 +----------------------------+ + * | | + * | | + * | OS Panic information | + * | | + * | | + * 0x100 +----------------------------+ + * + * It appears that there are at least 256 bytes of NVM, and only + * the "OS Panic information" is not architected. This means that + * we can use locations 0x80 - 0xFF for saving information across + * boots (e.g. boot flags and boot device). I think we should use + * the higher portions of this space first, to avoid conflicting + * with possible future HP-PA plans for the NVM. + * + * The PDC requires that NVM be read/written to in word multiples. + */ + +/* + * Boot flags and boot device (0xF4 - 0xFF). + */ + +#define NVM_BOOTDATA 0xF4 /* location of bootdata in NVM */ +#define NVM_BOOTMAGIC 0xACCEDE /* magic used for bootdata cksum */ +#define NVM_BOOTCKSUM(bd) \ + ((unsigned int) NVM_BOOTMAGIC + (bd).flags + (bd).device) + +struct bootdata { + unsigned int cksum; /* NVM_BOOTMAGIC + flags + device */ + unsigned int flags; /* boot flags */ + unsigned int device; /* boot device */ +}; + +#endif /* _NVM_ */ diff --git a/sys/arch/hppa/include/param.h b/sys/arch/hppa/include/param.h new file mode 100644 index 00000000000..d4f8159e094 --- /dev/null +++ b/sys/arch/hppa/include/param.h @@ -0,0 +1,149 @@ +/* $OpenBSD: param.h,v 1.1 1998/06/23 19:45:25 mickey Exp $ */ + +/* + * Copyright (c) 1988-1994, The University of Utah and + * the Computer Systems Laboratory at the University of Utah (CSL). + * All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS + * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF + * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: param.h 1.18 94/12/16$ + */ + +#include <machine/cpu.h> +#include <machine/intr.h> + +/* + * Machine dependent constants for PA-RISC (1.1). + */ + +#define _MACHINE hp700 +#define MACHINE "hp700" +#define _MACHINE_ARCH hppa +#define MACHINE_ARCH "hppa" +#define MID_MACHINE MID_HPUX800 + +/* + * Round p (pointer or byte index) up to a correctly-aligned value for all + * data types (int, long, ...). The result is u_int and must be cast to + * any desired pointer type. + */ +#define ALIGNBYTES 3 +#define ALIGN(p) (((u_long)(p) + ALIGNBYTES) &~ ALIGNBYTES) + +#define NBPG 4096 /* bytes/page */ +#define PGOFSET (NBPG-1) /* byte offset into page */ +#define PGSHIFT 12 /* LOG2(NBPG) */ +#define NPTEPG (1 << (PGSHIFT-PTESHIFT)) + +#define SEGSHIFT (PGSHIFT + (PGSHIFT-PTESHIFT)) /* LOG2(NBSEG) */ +#define NBSEG (1 << SEGSHIFT) /* bytes/segment (quadrant) */ +#define SEGOFSET (NBSEG-1) /* byte offset into segment */ + +#define KERNBASE 0x00000000 /* start of kernel virtual */ +#define BTOPKERNBASE ((u_long)KERNBASE >> PGSHIFT) + +#define DEV_BSIZE 512 +#define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */ +#define BLKDEV_IOSIZE 2048 +#define MAXPHYS (64 * 1024) /* max raw I/O transfer size */ + +#define STACK_GROWS_UP 1 /* stack grows to higher addresses */ + +#define CLSIZE 1 +#define CLSIZELOG2 0 + +/* NOTE: SSIZE, SINCR and UPAGES must be multiples of CLSIZE */ +#define SSIZE (1) /* initial stack size/NBPG */ +#define SINCR (1) /* increment of stack/NBPG */ + +#define UPAGES (2) /* pages of u-area */ +#define USPACE (UPAGES * NBPG) /* pages for user struct */ + +/* + * Constants related to network buffer management. + * MCLBYTES must be no larger than CLBYTES (the software page size), and, + * on machines that exchange pages of input or output buffers with mbuf + * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple + * of the hardware page size. + */ +#define MSIZE 128 /* size of an mbuf */ +#define MCLSHIFT 11 +#define MCLBYTES (1 << MCLSHIFT) /* large enough for ether MTU */ +#define MCLOFSET (MCLBYTES - 1) +#ifndef NMBCLUSTERS +#ifdef GATEWAY +#define NMBCLUSTERS (1024) /* cl map size: 1MB */ +#else +#define NMBCLUSTERS (512) /* cl map size: 0.5MB */ +#endif +#endif + +/* + * Size of kernel malloc arena in CLBYTES-sized logical pages + */ +#ifndef NKMEMCLUSTERS +#define NKMEMCLUSTERS (1024*1024/CLBYTES) +#endif + +/* pages ("clicks") (4096 bytes) to disk blocks */ +#define ctod(x) ((x)<<(PGSHIFT-DEV_BSHIFT)) +#define dtoc(x) ((x)>>(PGSHIFT-DEV_BSHIFT)) + +/* pages to bytes */ +#define ctob(x) ((x)<<PGSHIFT) +#define btoc(x) (((unsigned)(x)+(NBPG-1))>>PGSHIFT) + +#define LABELOFFSET 0 + +#define btodb(bytes) /* calculates (bytes / DEV_BSIZE) */ \ + ((unsigned)(bytes) >> DEV_BSHIFT) +#define dbtob(db) /* calculates (db * DEV_BSIZE) */ \ + ((unsigned)(db) << DEV_BSHIFT) + +/* + * Map a ``block device block'' to a file system block. + * This should be device dependent, and should use the bsize + * field from the disk label. + * For now though just use DEV_BSIZE. + */ +#define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE/DEV_BSIZE)) + +/* + * Mach derived conversion macros + */ +#define hppa_round_page(x) ((((unsigned long)(x)) + NBPG - 1) & ~(NBPG-1)) +#define hppa_trunc_page(x) ((unsigned long)(x) & ~(NBPG-1)) +#define hppa_btop(x) ((unsigned long)(x) >> PGSHIFT) +#define hppa_ptob(x) ((unsigned long)(x) << PGSHIFT) + +#include <machine/intr.h> + +#ifdef _KERNEL + +#define DELAY(n) { register int N = (n); while (--N > 0); } + +#ifdef COMPAT_HPUX +/* + * Constants/macros for HPUX multiple mapping of user address space. + * Pages in the first 256Mb are mapped in at every 256Mb segment. + */ +#define HPMMMASK 0xF0000000 +#define ISHPMMADDR(v) 0 /* XXX ...jef */ +#define HPMMBASEADDR(v) ((unsigned)(v) & ~HPMMMASK) +#endif + +#endif diff --git a/sys/arch/hppa/include/pdc.h b/sys/arch/hppa/include/pdc.h new file mode 100644 index 00000000000..c3f6228df60 --- /dev/null +++ b/sys/arch/hppa/include/pdc.h @@ -0,0 +1,462 @@ +/* $OpenBSD: pdc.h,v 1.1 1998/06/23 19:45:25 mickey Exp $ */ + +/* + * Copyright (c) 1990 mt Xinu, Inc. All rights reserved. + * Copyright (c) 1990,1991,1992,1994 University of Utah. All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * Copyright (c) 1990 mt Xinu, Inc. + * This file may be freely distributed in any form as long as + * this copyright notice is included. + * MTXINU, THE UNIVERSITY OF UTAH, AND CSL PROVIDE THIS SOFTWARE ``AS + * IS'' AND WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, + * WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND + * FITNESS FOR A PARTICULAR PURPOSE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: pdc.h 1.12 94/12/14$ + */ + +#ifndef _HPPA_PDC_H_ +#define _HPPA_PDC_H_ + +/* + * Definitions for interaction with "Processor Dependent Code", + * which is a set of ROM routines used to provide information to the OS. + * Also includes definitions for the layout of "Page Zero" memory when + * boot code is invoked. + * + * Glossary: + * PDC: Processor Dependent Code (ROM or copy of ROM). + * IODC: I/O Dependent Code (module-type dependent code). + * IPL: Boot program (loaded into memory from boot device). + * HPA: Hard Physical Address (hardwired address). + * SPA: Soft Physical Address (reconfigurable address). + */ + +/* + * Our Initial Memory Module is laid out as follows. + * + * 0x000 +--------------------+ + * | Page Zero (iomod.h)| + * 0x800 +--------------------+ + * | | + * | | + * | PDC | + * | | + * | | + * MEM_FREE +--------------------+ + * | | + * | Console IODC | + * | | + * MEM_FREE+16k +--------------------+ + * | | + * | Boot Device IODC | + * | | + * IPL_START +--------------------+ + * | | + * | IPL Code or Kernel | + * | | + * +--------------------+ + * + * Restrictions: + * MEM_FREE (pagezero.mem_free) can be no greater than 32K. + * The PDC may use up to MEM_FREE + 32K (for Console & Boot IODC). + * IPL_START must be less than or equal to 64K. + * + * The IPL (boot) Code is immediately relocated to RELOC (check + * "../hp800stand/Makefile") to make way for the Kernel. + */ + +#define IODC_MAXSIZE (16 * 1024) /* maximum size of IODC */ + + +/* + * The "Top 15 PDC Entry Points" and their arguments... + */ + +#define PDC_POW_FAIL 1 /* prepare for power failure */ +#define PDC_POW_FAIL_DFLT 0 + +#define PDC_CHASSIS 2 /* update chassis display (see below) */ +#define PDC_CHASSIS_DISP 0 /* update display */ +#define PDC_CHASSIS_WARN 1 /* return warnings */ +#define PDC_CHASSIS_ALL 2 /* update display & return warnings */ + +#define PDC_PIM 3 /* access Processor Internal Memory */ +#define PDC_PIM_HPMC 0 /* read High Pri Mach Chk data */ +#define PDC_PIM_SIZE 1 /* return size */ +#define PDC_PIM_LPMC 2 /* read Low Pri Mach Chk data */ +#define PDC_PIM_SBD 3 /* read soft boot data */ +#define PDC_PIM_TOC 4 /* read TOC data (used to use HPMC) */ + +#define PDC_MODEL 4 /* processor model number info */ +#define PDC_MODEL_INFO 0 /* processor model number info */ +#define PDC_MODEL_BOOTID 1 /* set BOOT_ID of processor */ +#define PDC_MODEL_COMP 2 /* return component version numbers */ +#define PDC_MODEL_MODEL 3 /* return system model information */ +#define PDC_MODEL_ENSPEC 4 /* enable product-specific instrs */ +#define PDC_MODEL_DISPEC 5 /* disable product-specific instrs */ + +#define PDC_CACHE 5 /* return cache and TLB params */ +#define PDC_CACHE_DFLT 0 + +#define PDC_HPA 6 /* return HPA of processor */ +#define PDC_HPA_DFLT 0 + +#define PDC_COPROC 7 /* return co-processor configuration */ +#define PDC_COPROC_DFLT 0 + +#define PDC_IODC 8 /* talk to IODC */ +#define PDC_IODC_READ 0 /* read IODC entry point */ +#define PDC_IODC_NINIT 2 /* non-destructive init */ +#define PDC_IODC_DINIT 3 /* destructive init */ +#define PDC_IODC_MEMERR 4 /* check for memory errors */ +#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */ + +#define PDC_TOD 9 /* access time-of-day clock */ +#define PDC_TOD_READ 0 /* read TOD clock */ +#define PDC_TOD_WRITE 1 /* write TOD clock */ +#define PDC_TOD_ITIMER 2 /* calibrate Interval Timer (CR16) */ + +#define PDC_STABLE 10 /* access Stable Storage (SS) */ +#define PDC_STABLE_READ 0 /* read SS */ +#define PDC_STABLE_WRITE 1 /* write SS */ +#define PDC_STABLE_SIZE 2 /* return size of SS */ +#define PDC_STABLE_VRFY 3 /* verify contents of SS */ +#define PDC_STABLE_INIT 4 /* initialize SS */ + +#define PDC_NVM 11 /* access Non-Volatile Memory (NVM) */ +#define PDC_NVM_READ 0 /* read NVM */ +#define PDC_NVM_WRITE 1 /* write NVM */ +#define PDC_NVM_SIZE 2 /* return size of NVM */ +#define PDC_NVM_VRFY 3 /* verify contents of NVM */ +#define PDC_NVM_INIT 4 /* initialize NVM */ + +#define PDC_ADD_VALID 12 /* check address for validity */ +#define PDC_ADD_VALID_DFLT 0 + +#define PDC_BUS_BAD 13 /* verify Error Detection Circuitry (EDC) */ +#define PDC_BUS_BAD_DLFT 0 + +#define PDC_DEBUG 14 /* return address of PDC debugger */ +#define PDC_DEBUG_DFLT 0 + +#define PDC_INSTR 15 /* return instr that invokes PDCE_CHECK */ +#define PDC_INSTR_DFLT 0 + +#define PDC_PROC 16 /* stop currently executing processor */ +#define PDC_PROC_DFLT 0 + +#define PDC_CONF 17 /* (de)configure a module */ +#define PDC_CONF_DECONF 0 /* deconfigure module */ +#define PDC_CONF_RECONF 1 /* reconfigure module */ +#define PDC_CONF_INFO 2 /* get config informaion */ + +#define PDC_BLOCK_TLB 18 /* Manage Block TLB entries (BTLB) */ +#define PDC_BTLB_DEFAULT 0 /* Return BTLB configuration info */ +#define PDC_BTLB_INSERT 1 /* Insert a BTLB entry */ +#define PDC_BTLB_PURGE 2 /* Purge a BTLB entry */ +#define PDC_BTLB_PURGE_ALL 3 /* Purge all BTLB entries */ + +#define PDC_TLB 19 /* Manage Hardware TLB handling */ +#define PDC_TLB_INFO 0 /* Return HW-TLB configuration info */ +#define PDC_TLB_CONFIG 1 /* Set HW-TLB pdir base and size */ + +#define PDC_TLB_CURRPDE 1 /* cr28 points to current pde on miss */ +#define PDC_TLB_RESERVD 3 /* reserved */ +#define PDC_TLB_NEXTPDE 5 /* cr28 points to next pde on miss */ +#define PDC_TLB_WORD3 7 /* cr28 is word 3 of 16 byte pde */ + +#define PDC_MEMMAP 128 /* hp700: return page information */ +#define PDC_MEMMAP_HPA 0 /* map module # to HPA */ + + +#if !defined(_LOCORE) && !defined(ASSEMBLER) + +/* + * Commonly used PDC calls and the structures they return. + */ +#include <sys/types.h> + +struct pdc_pim { /* PDC_PIM */ + u_int count; /* actual (HPMC, LPMC) or total (SIZE) count */ + u_int archsize; /* size of architected regions (see "pim.h") */ + double filler[15]; +}; + +struct pdc_model { /* PDC_MODEL */ + u_int hvers; /* hardware version */ + u_int svers; /* software version */ + u_int hw_id; /* unique processor hardware identifier */ + u_int boot_id; /* same as hw_id */ + u_int sw_id; /* software security and licensing */ + u_int sw_cap; /* O/S capabilities of processor */ + u_int arch_rev; /* architecture revision */ + u_int pot_key; /* potential key */ + u_int curr_key; /* current key */ + int filler1; + double filler2[11]; +}; + +struct cache_cf { /* PDC_CACHE (for "struct pdc_cache") */ + u_int cc_resv0: 4, + cc_block: 4, /* used to determine most efficient stride */ + cc_line : 3, /* max data written by store (16-byte mults) */ + cc_resv1: 2, /* (reserved) */ + cc_wt : 1, /* D-cache: write-to = 0, write-through = 1 */ + cc_sh : 2, /* separate I and D = 0, shared I and D = 1 */ + cc_cst : 3, /* D-cache: incoherent = 0, coherent = 1 */ + cc_resv2: 5, /* (reserved) */ + cc_assoc: 8; /* D-cache: associativity of cache */ +}; + +struct tlb_cf { /* PDC_CACHE (for "struct pdc_cache") */ + u_int tc_resv1:12, /* (reserved) */ + tc_sh : 2, /* separate I and D = 0, shared I and D = 1 */ + tc_hvers: 1, /* H-VERSION dependent */ + tc_page : 1, /* 2K page size = 0, 4k page size = 1 */ + tc_cst : 3, /* incoherent = 0, coherent = 1 */ + tc_resv2: 5, /* (reserved) */ + tc_assoc: 8; /* associativity of TLB */ +}; + +struct pdc_cache { /* PDC_CACHE */ +/* Instruction cache */ + u_int ic_size; /* size of I-cache (in bytes) */ + struct cache_cf ic_conf;/* cache configuration (see above) */ + u_int ic_base; /* start addr of I-cache (for FICE flush) */ + u_int ic_stride; /* addr incr per i_count iteration (flush) */ + u_int ic_count; /* number of i_loop iterations (flush) */ + u_int ic_loop; /* number of FICE's per addr stride (flush) */ +/* Data cache */ + u_int dc_size; /* size of D-cache (in bytes) */ + struct cache_cf dc_conf;/* cache configuration (see above) */ + u_int dc_base; /* start addr of D-cache (for FDCE flush) */ + u_int dc_stride; /* addr incr per d_count iteration (flush) */ + u_int dc_count; /* number of d_loop iterations (flush) */ + u_int dc_loop; /* number of FDCE's per addr stride (flush) */ +/* Instruction TLB */ + u_int it_size; /* number of entries in I-TLB */ + struct tlb_cf it_conf; /* I-TLB configuration (see above) */ + u_int it_sp_base; /* start space of I-TLB (for PITLBE flush) */ + u_int it_sp_stride; /* space incr per sp_count iteration (flush) */ + u_int it_sp_count; /* number of off_count iterations (flush) */ + u_int it_off_base; /* start offset of I-TLB (for PITLBE flush) */ + u_int it_off_stride; /* offset incr per off_count iteration (flush)*/ + u_int it_off_count; /* number of it_loop iterations/space (flush) */ + u_int it_loop; /* number of PITLBE's per off_stride (flush) */ +/* Data TLB */ + u_int dt_size; /* number of entries in D-TLB */ + struct tlb_cf dt_conf; /* D-TLB configuration (see above) */ + u_int dt_sp_base; /* start space of D-TLB (for PDTLBE flush) */ + u_int dt_sp_stride; /* space incr per sp_count iteration (flush) */ + u_int dt_sp_count; /* number of off_count iterations (flush) */ + u_int dt_off_base; /* start offset of D-TLB (for PDTLBE flush) */ + u_int dt_off_stride; /* offset incr per off_count iteration (flush)*/ + u_int dt_off_count; /* number of dt_loop iterations/space (flush) */ + u_int dt_loop; /* number of PDTLBE's per off_stride (flush) */ + double filler; +}; + +struct pdc_hpa { /* PDC_HPA */ + struct iomod *hpa; /* HPA of processor */ + int filler1; + double filler2[15]; +}; + +struct pdc_coproc { /* PDC_COPROC */ + u_int ccr_enable; /* same format as CCR (CR 10) */ + int ccr_present; /* which co-proc's are present (bitset) */ + double filler2[15]; +}; + +struct pdc_tod { /* PDC_TOD, PDC_TOD_READ */ + u_int sec; /* elapsed time since 00:00:00 GMT, 1/1/70 */ + u_int usec; /* accurate to microseconds */ + double filler2[15]; +}; + +struct pdc_instr { /* PDC_INSTR */ + u_int instr; /* instruction that invokes PDC mchk entry pt */ + int filler1; + double filler2[15]; +}; + +struct pdc_iodc_read { /* PDC_IODC, PDC_IODC_READ */ + int size; /* number of bytes in selected entry point */ + int filler1; + double filler2[15]; +}; + +struct pdc_iodc_minit { /* PDC_IODC, PDC_IODC_NINIT or PDC_IODC_DINIT */ + u_int stat; /* HPA.io_status style error returns */ + u_int max_spa; /* size of SPA (in bytes) > max_mem+map_mem */ + u_int max_mem; /* size of "implemented" memory (in bytes) */ + u_int map_mem; /* size of "mapable-only" memory (in bytes) */ + double filler[14]; +}; + +struct btlb_info { /* for "struct pdc_btlb" (PDC_BTLB) */ + u_int resv0: 8, /* (reserved) */ + num_i: 8, /* Number of instruction slots */ + num_d: 8, /* Number of data slots */ + num_c: 8; /* Number of combined slots */ +}; + +struct pdc_btlb { /* PDC_BLOCK_TLB */ + u_int min_size; /* Min size in pages */ + u_int max_size; /* Max size in pages */ + struct btlb_info finfo; /* Fixed range info */ + struct btlb_info vinfo; /* Variable range info */ + u_int filler[28]; +}; + +struct pdc_hwtlb { /* PDC_TLB */ + u_int min_size; /* What do these mean? */ + u_int max_size; + u_int filler[30]; +}; + +struct pdc_memmap { /* PDC_MEMMAP */ + u_int hpa; /* HPA for module */ + u_int morepages; /* additional IO pages */ + double filler[15]; +}; + + +/* + * The PDC_CHASSIS is a strange bird. The format for updating the display + * is as follows: + * + * 0 11 12 14 15 16 19 20 23 24 27 28 31 + * +-------+----------+-------+--------+--------+--------+--------+ + * | R | OS State | Blank | Hex1 | Hex2 | Hex3 | Hex4 | + * +-------+----------+-------+--------+--------+--------+--------+ + * + * Unfortunately, someone forgot to tell the hardware designers that + * there was supposed to be a hex display somewhere. The result is, + * you can only toggle 5 LED's and the fault light. + * + * Interesting values for Hex1-Hex4 and the resulting LED displays: + * + * FnFF CnFF: + * 0 - - - - - Counts in binary from 0x0 - 0xF + * 2 o - - - - for corresponding values of `n'. + * 4 o o - - - + * 6 o o o - - + * 8 o o o o - + * A o o o o o + * + * If the "Blank" bit is set, the display should be made blank. + * The values for "OS State" are defined below. + */ + +#define PDC_CHASSIS_BAR 0xF0FF /* create a bar graph with LEDs */ +#define PDC_CHASSIS_CNT 0xC0FF /* count with LEDs */ + +#define PDC_OSTAT(os) (((os) & 0x7) << 17) +#define PDC_OSTAT_OFF 0x0 /* all off */ +#define PDC_OSTAT_FAULT 0x1 /* the red LED of death */ +#define PDC_OSTAT_TEST 0x2 /* self test */ +#define PDC_OSTAT_BOOT 0x3 /* boot program running */ +#define PDC_OSTAT_SHUT 0x4 /* shutdown in progress */ +#define PDC_OSTAT_WARN 0x5 /* battery dying, etc */ +#define PDC_OSTAT_RUN 0x6 /* OS running */ +#define PDC_OSTAT_ON 0x7 /* all on */ + + +/* + * Device path specifications used by PDC. + */ +struct device_path { + u_char dp_flags; /* see bit definitions below */ + char dp_bc[6]; /* Bus Converter routing info to a specific */ + /* I/O adaptor (< 0 means none, > 63 resvd) */ + u_char dp_mod; /* fixed field of specified module */ + int dp_layers[6]; /* device-specific info (ctlr #, unit # ...) */ +}; + +/* dp_flags */ +#define PF_AUTOBOOT 0x80 /* These two are PDC flags for how to locate */ +#define PF_AUTOSEARCH 0x40 /* the "boot device" */ +#define PF_TIMER 0x0f /* power of 2 # secs "boot timer" (0 == dflt) */ + +/* + * A processors Stable Storage is accessed through the PDC. There are + * at least 96 bytes of stable storage (the device path information may + * or may not exist). However, as far as I know, processors provide at + * least 192 bytes of stable storage. + */ +struct stable_storage { + struct device_path ss_pri_boot; /* (see above) */ + char ss_filenames[32]; + u_short ss_os_version; /* 0 == none, 1 == HP-UX, 2 == MPE-XL */ + char ss_os[22]; /* OS-dependant information */ + char ss_pdc[7]; /* reserved */ + char ss_fast_size; /* how much memory to test. 0xf == all, or */ + /* else it's (256KB << ss_fast_size) */ + struct device_path ss_console; + struct device_path ss_alt_boot; + struct device_path ss_keyboard; +}; + + +/* + * Recoverable error indications provided to boot code by the PDC. + * Any non-zero value indicates error. + */ +struct boot_err { + u_int be_resv : 10, /* (reserved) */ + be_fixed : 6, /* module that produced error */ + be_chas : 16; /* error code (interpret as 4 hex digits) */ +}; + + +/* + * The PDC uses the following structure to completely define an I/O + * module and the interface to its IODC. + */ +struct pz_device { + struct device_path pz_dp; +#define pz_flags pz_dp.dp_flags +#define pz_bc pz_dp.dp_bc +#define pz_mod pz_dp.dp_mod +#define pz_layers pz_dp.dp_layers + struct iomod *pz_hpa; /* HPA base address of device */ + caddr_t pz_spa; /* SPA base address (zero if no SPA exists) */ + int (*pz_iodc_io)();/* entry point of device's driver routines */ + short pz_resv; /* (reserved) */ + u_short pz_class; /* (see below) */ +}; + +/* pz_class */ +#define PCL_NULL 0 /* illegal */ +#define PCL_RANDOM 1 /* random access (disk) */ +#define PCL_SEQU 2 /* sequential access (tape) */ +#define PCL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */ +#define PCL_KEYBD 8 /* half-duplex input (HIL Keyboard) */ +#define PCL_DISPL 9 /* half-duplex ouptput (display) */ + +#define BT_HPA PAGE0->mem_boot.pz_hpa +#define lightshow(val) { \ + static int data; \ + data = (val << 8) | 0xC0FF; \ + (*PAGE0->mem_pdc)(PDC_CHASSIS, PDC_CHASSIS_DISP, data); \ + delay(5000000); \ +} + +extern int (*pdc)(); + +#endif /* !(_LOCORE || ASSEMBLER) */ + +#endif /* _HPPA_PDC_H_ */ diff --git a/sys/arch/hppa/include/signal.h b/sys/arch/hppa/include/signal.h new file mode 100644 index 00000000000..5c73afb9f62 --- /dev/null +++ b/sys/arch/hppa/include/signal.h @@ -0,0 +1,54 @@ +/* $OpenBSD: signal.h,v 1.1 1998/06/23 19:45:27 mickey Exp $ */ + +/* + * Copyright (c) 1994, The University of Utah and + * the Computer Systems Laboratory at the University of Utah (CSL). + * All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS + * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF + * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: signal.h 1.3 94/12/16$ + */ + +/* + * Machine-dependent signal definitions + */ + +typedef int sig_atomic_t; + +#ifndef _POSIX_SOURCE +#include <machine/trap.h> /* codes for SIGILL, SIGFPE */ +#endif + +/* + * Information pushed on stack when a signal is delivered. + * This is used by the kernel to restore state following + * execution of the signal handler. It is also made available + * to the handler to allow it to restore state properly if + * a non-standard exit is performed. + */ +struct sigcontext { + int sc_onstack; /* sigstack state to restore */ + int sc_mask; /* signal mask to restore */ + int sc_sp; /* sp to restore */ + int sc_fp; /* fp to restore */ + int sc_ap; /* ap to restore */ + int sc_pcsqh; /* pc space queue (head) to restore */ + int sc_pcoqh; /* pc offset queue (head) to restore */ + int sc_pcsqt; /* pc space queue (tail) to restore */ + int sc_pcoqt; /* pc offset queue (tail) to restore */ + int sc_ps; /* psl to restore */ +}; diff --git a/sys/arch/hppa/include/stdarg.h b/sys/arch/hppa/include/stdarg.h new file mode 100644 index 00000000000..2a66770cb08 --- /dev/null +++ b/sys/arch/hppa/include/stdarg.h @@ -0,0 +1,59 @@ +/* $OpenBSD: stdarg.h,v 1.1 1998/06/23 19:45:27 mickey Exp $ */ + +/*- + * Copyright (c) 1991, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)stdarg.h 8.1 (Berkeley) 6/10/93 + */ + +#ifndef _HPPA_STDARG_H_ +#define _HPPA_STDARG_H_ + +typedef double *va_list; + +#ifdef __GNUC__ +#define va_start(ap,lastarg) ((ap) = (va_list)__builtin_saveregs()) +#else +#define va_start(ap,lastarg) __builtin_va_start(ap, &lastarg) +#endif + +#define va_arg(ap,type) \ + (sizeof(type) > 8 ? \ + ((ap = (va_list) ((char *)ap - sizeof (int))), \ + (*((type *) (void *) (*((int *) (ap)))))): \ + ((ap = (va_list) ((long)((char *)ap - sizeof (type)) & \ + (sizeof(type) > 4 ? ~0x7 : ~0x3))),\ + (*((type *) (void *) ((char *)ap + ((8 - sizeof(type)) % 4)))))) + +#define va_end(ap) + +#endif /* !_HPPA_STDARG_H */ diff --git a/sys/arch/hppa/include/trap.h b/sys/arch/hppa/include/trap.h new file mode 100644 index 00000000000..ad001d17433 --- /dev/null +++ b/sys/arch/hppa/include/trap.h @@ -0,0 +1,74 @@ +/* $OpenBSD: trap.h,v 1.1 1998/06/23 19:45:28 mickey Exp $ */ + +/* + * Copyright (c) 1988-1994, The University of Utah and + * the Computer Systems Laboratory at the University of Utah (CSL). + * All rights reserved. + * + * Permission to use, copy, modify and distribute this software is hereby + * granted provided that (1) source code retains these copyright, permission, + * and disclaimer notices, and (2) redistributions including binaries + * reproduce the notices in supporting documentation, and (3) all advertising + * materials mentioning features or use of this software display the following + * acknowledgement: ``This product includes software developed by the + * Computer Systems Laboratory at the University of Utah.'' + * + * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS + * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF + * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * CSL requests users of this software to return to csl-dist@cs.utah.edu any + * improvements that they make and grant CSL redistribution rights. + * + * Utah $Hdr: trap.h 1.6 94/12/16$ + */ + +/* + * Trap type values + * also known in trap.c for name strings + */ + +#define T_NONEXIST 0 +#define T_HPMACH_CHK 1 +#define T_POW_FAIL 2 +#define T_RECOV_CTR 3 +#define T_EXT_INTP 4 +#define T_LPMACH_CHK 5 +#define T_IPGFT 6 +#define T_IMEM_PROT 7 +#define T_UNIMPL_INST 8 +#define T_BRK_INST 9 +#define T_PRIV_OP 10 +#define T_PRIV_REG 11 +#define T_OVFLO 12 +#define T_COND 13 +#define T_EXCEP 14 +#define T_DPGFT 15 +#define T_IPGFT_NA 16 +#define T_DPGFT_NA 17 +#define T_DMEM_PROT 18 +#define T_DMEM_BREAK 19 +#define T_TLB_DIRTY 20 +#define T_VIO_REF 21 +#define T_EMULAT 22 +#define T_HPRIV_XFR 23 +#define T_LPRIV_XFR 24 +#define T_TAKEN_BR 25 + +#define T_DMEM_ACC 26 /* 7100 */ +#define T_DMEM_PID 27 /* 7100 */ +#define T_DMEM_UNALIGN 28 /* 7100 */ + +#define T_ICS_OVFL 30 /* SW: interrupt stack overflow */ +#define T_KS_OVFL 31 /* SW: kernel stack overflow */ + +#define T_USER 0x20 /* user-mode flag or'ed with type */ + +/* definitions for <sys/signal.h> */ +#define ILL_PRIVREG_FAULT 0x4 +#define ILL_UNIMPL_INST 0x8 +#define ILL_PRIV_OP 0x10 +#define ILL_PRIV_REG 0x11 +#define ILL_OVFLO 0x12 +#define ILL_COND 0x13 +#define ILL_EXCEP 0x14 diff --git a/sys/arch/hppa/include/types.h b/sys/arch/hppa/include/types.h new file mode 100644 index 00000000000..cf0872f8be5 --- /dev/null +++ b/sys/arch/hppa/include/types.h @@ -0,0 +1,85 @@ +/* $OpenBSD: types.h,v 1.1 1998/06/23 19:45:28 mickey Exp $ */ + +/*- + * Copyright (c) 1990, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)types.h 8.3 (Berkeley) 1/5/94 + */ + +#ifndef _HPPA_TYPES_H_ +#define _HPPA_TYPES_H_ + +#if !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE) +typedef struct _physadr { + int r[1]; +} *physadr; + +typedef struct label_t { + int lbl_rp; + int lbl_sp; + int lbl_s[17]; + int lbl_ss[1]; + double lbl_sf[10]; /* hp800:fr12-fr15, hp700:fr12-fr21 */ +} label_t; + +#endif + +typedef unsigned int pa_space_t; +typedef unsigned long vm_size_t; +typedef unsigned long vm_offset_t; + +/* + * Basic integral types. Omit the typedef if + * not possible for a machine/compiler combination. + */ +#define __BIT_TYPES_DEFINED__ +#ifdef __STDC__ +typedef __signed char int8_t; +#else +typedef char int8_t; +#endif +typedef unsigned char u_int8_t; +typedef short int16_t; +typedef unsigned short u_int16_t; +typedef int int32_t; +typedef unsigned int u_int32_t; +#ifdef __STDC__ +typedef long long int64_t; +typedef unsigned long long u_int64_t; +#else +typedef long int64_t; +typedef unsigned long u_int64_t; +#endif + +typedef int32_t register_t; + +#endif /* _HPPA_TYPES_H_ */ |