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-rw-r--r--sys/arch/m68k/include/cacheops.h18
-rw-r--r--sys/arch/m68k/include/cacheops_30.h6
-rw-r--r--sys/arch/m68k/include/cacheops_40.h78
-rw-r--r--sys/arch/m68k/include/cacheops_60.h78
-rw-r--r--sys/arch/m68k/include/db_machdep.h4
-rw-r--r--sys/arch/m68k/include/kcore.h4
-rw-r--r--sys/arch/m68k/m68k/cacheops.c64
-rw-r--r--sys/arch/m68k/m68k/db_disasm.c6
-rw-r--r--sys/arch/m68k/m68k/db_disasm.h4
-rw-r--r--sys/arch/m68k/m68k/db_memrw.c6
-rw-r--r--sys/arch/m68k/m68k/db_trace.c8
-rw-r--r--sys/arch/m68k/m68k/mappedcopy.c12
-rw-r--r--sys/arch/m68k/m68k/sunos_machdep.c6
13 files changed, 148 insertions, 146 deletions
diff --git a/sys/arch/m68k/include/cacheops.h b/sys/arch/m68k/include/cacheops.h
index 0e4cdc4e1a9..109e7164bf8 100644
--- a/sys/arch/m68k/include/cacheops.h
+++ b/sys/arch/m68k/include/cacheops.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cacheops.h,v 1.1 1997/07/06 07:46:23 downsj Exp $ */
+/* $OpenBSD: cacheops.h,v 1.2 2001/05/15 01:43:14 millert Exp $ */
/* $NetBSD: cacheops.h,v 1.1 1997/06/02 20:26:37 leo Exp $ */
/*-
@@ -123,7 +123,7 @@
#endif
void _TBIA __P((void));
-void _TBIS __P((vm_offset_t));
+void _TBIS __P((vaddr_t));
void _TBIAS __P((void));
void _TBIAU __P((void));
void _ICIA __P((void));
@@ -131,7 +131,7 @@ void _ICPA __P((void));
void _DCIA __P((void));
void _DCIS __P((void));
void _DCIU __P((void));
-void _DCIAS __P((vm_offset_t));
+void _DCIAS __P((paddr_t));
#define TBIA() _TBIA()
#define TBIS(va) _TBIS((va))
@@ -148,13 +148,13 @@ void _DCIAS __P((vm_offset_t));
void _PCIA __P((void));
void _DCFA __P((void));
-void _ICPL __P((vm_offset_t));
-void _ICPP __P((vm_offset_t));
-void _DCPL __P((vm_offset_t));
-void _DCPP __P((vm_offset_t));
+void _ICPL __P((paddr_t));
+void _ICPP __P((paddr_t));
+void _DCPL __P((paddr_t));
+void _DCPP __P((paddr_t));
void _DCPA __P((void));
-void _DCFL __P((vm_offset_t));
-void _DCFP __P((vm_offset_t));
+void _DCFL __P((paddr_t));
+void _DCFP __P((paddr_t));
#define PCIA() _PCIA()
#define DCFA() _DCFA()
diff --git a/sys/arch/m68k/include/cacheops_30.h b/sys/arch/m68k/include/cacheops_30.h
index f03af6255f3..ae43b1af09c 100644
--- a/sys/arch/m68k/include/cacheops_30.h
+++ b/sys/arch/m68k/include/cacheops_30.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cacheops_30.h,v 1.2 2001/01/15 19:50:37 deraadt Exp $ */
+/* $OpenBSD: cacheops_30.h,v 1.3 2001/05/15 01:43:14 millert Exp $ */
/* $NetBSD: cacheops_30.h,v 1.1 1997/06/02 20:26:40 leo Exp $ */
/*-
@@ -53,10 +53,10 @@ TBIA_30()
/*
* Invalidate any TLB entry for given VA (TB Invalidate Single)
*/
-void TBIS_30 __P((vm_offset_t));
+void TBIS_30 __P((vaddr_t));
extern __inline__ void
TBIS_30(va)
- vm_offset_t va;
+ vaddr_t va;
{
__asm __volatile (" pflush #0,#0,%0@;"
" movc %1,cacr" : : "a" (va), "d" (DC_CLEAR));
diff --git a/sys/arch/m68k/include/cacheops_40.h b/sys/arch/m68k/include/cacheops_40.h
index 3dd35b447fe..15b07056cca 100644
--- a/sys/arch/m68k/include/cacheops_40.h
+++ b/sys/arch/m68k/include/cacheops_40.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cacheops_40.h,v 1.2 2001/01/15 19:50:37 deraadt Exp $ */
+/* $OpenBSD: cacheops_40.h,v 1.3 2001/05/15 01:43:14 millert Exp $ */
/* $NetBSD: cacheops_40.h,v 1.1 1997/06/02 20:26:41 leo Exp $ */
/*-
@@ -50,12 +50,12 @@ TBIA_40()
/*
* Invalidate any TLB entry for given VA (TB Invalidate Single)
*/
-void TBIS_40 __P((vm_offset_t));
+void TBIS_40 __P((vaddr_t));
extern __inline__ void
TBIS_40(va)
- vm_offset_t va;
+ vaddr_t va;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register vaddr_t r_va __asm("a0") = va;
int tmp;
__asm __volatile (" movc %1, dfc;" /* select supervisor */
@@ -133,14 +133,14 @@ DCIU_40()
__asm __volatile (" .word 0xf478;"); /* cpusha dc */
}
-void DCIAS_40 __P((vm_offset_t));
+void DCIAS_40 __P((paddr_t));
extern __inline__ void
-DCIAS_40(va)
- vm_offset_t va;
+DCIAS_40(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf468;" : : "a" (r_va)); /* cpushl dc,a0@ */
+ __asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,a0@ */
}
void PCIA_40 __P((void));
@@ -158,47 +158,47 @@ DCFA_40()
}
/* invalidate instruction physical cache line */
-void ICPL_40 __P((vm_offset_t));
+void ICPL_40 __P((paddr_t));
extern __inline__ void
-ICPL_40(va)
- vm_offset_t va;
+ICPL_40(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf488;" : : "a" (r_va)); /* cinvl ic,a0@ */
+ __asm __volatile (" .word 0xf488;" : : "a" (r_pa)); /* cinvl ic,a0@ */
}
/* invalidate instruction physical cache page */
-void ICPP_40 __P((vm_offset_t));
+void ICPP_40 __P((paddr_t));
extern __inline__ void
-ICPP_40(va)
- vm_offset_t va;
+ICPP_40(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf490;" : : "a" (r_va)); /* cinvp ic,a0@ */
+ __asm __volatile (" .word 0xf490;" : : "a" (r_pa)); /* cinvp ic,a0@ */
}
/* invalidate data physical cache line */
-void DCPL_40 __P((vm_offset_t));
+void DCPL_40 __P((paddr_t));
extern __inline__ void
-DCPL_40(va)
- vm_offset_t va;
+DCPL_40(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf448;" : : "a" (r_va)); /* cinvl dc,a0@ */
+ __asm __volatile (" .word 0xf448;" : : "a" (r_pa)); /* cinvl dc,a0@ */
}
/* invalidate data physical cache page */
-void DCPP_40 __P((vm_offset_t));
+void DCPP_40 __P((paddr_t));
extern __inline__ void
-DCPP_40(va)
- vm_offset_t va;
+DCPP_40(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf450;" : : "a" (r_va)); /* cinvp dc,a0@ */
+ __asm __volatile (" .word 0xf450;" : : "a" (r_pa)); /* cinvp dc,a0@ */
}
/* invalidate data physical all */
@@ -210,23 +210,23 @@ DCPA_40()
}
/* data cache flush line */
-void DCFL_40 __P((vm_offset_t));
+void DCFL_40 __P((paddr_t));
extern __inline__ void
-DCFL_40(va)
- vm_offset_t va;
+DCFL_40(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf468;" : : "a" (r_va)); /* cpushl dc,a0@ */
+ __asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,a0@ */
}
/* data cache flush page */
-void DCFP_40 __P((vm_offset_t));
+void DCFP_40 __P((paddr_t));
extern __inline__ void
-DCFP_40(va)
- vm_offset_t va;
+DCFP_40(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf470;" : : "a" (r_va)); /* cpushp dc,a0@ */
+ __asm __volatile (" .word 0xf470;" : : "a" (r_pa)); /* cpushp dc,a0@ */
}
diff --git a/sys/arch/m68k/include/cacheops_60.h b/sys/arch/m68k/include/cacheops_60.h
index 6b1c846cab4..6dc694b1a96 100644
--- a/sys/arch/m68k/include/cacheops_60.h
+++ b/sys/arch/m68k/include/cacheops_60.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cacheops_60.h,v 1.2 2001/01/15 19:50:38 deraadt Exp $ */
+/* $OpenBSD: cacheops_60.h,v 1.3 2001/05/15 01:43:14 millert Exp $ */
/* $NetBSD: cacheops_60.h,v 1.1 1997/06/02 20:26:43 leo Exp $ */
/*-
@@ -50,12 +50,12 @@ TBIA_60()
/*
* Invalidate any TLB entry for given VA (TB Invalidate Single)
*/
-void TBIS_60 __P((vm_offset_t));
+void TBIS_60 __P((vaddr_t));
extern __inline__ void
TBIS_60(va)
- vm_offset_t va;
+ vaddr_t va;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register vaddr_t r_va __asm("a0") = va;
int tmp;
__asm __volatile (" movc %1, dfc;" /* select supervisor */
@@ -149,14 +149,14 @@ DCIU_60()
__asm __volatile (" .word 0xf478;"); /* cpusha dc */
}
-void DCIAS_60 __P((vm_offset_t));
+void DCIAS_60 __P((paddr_t));
extern __inline__ void
-DCIAS_60(va)
- vm_offset_t va;
+DCIAS_60(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf468;" : : "a" (r_va)); /* cpushl dc,a0@ */
+ __asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,a0@ */
}
void PCIA_60 __P((void));
@@ -174,47 +174,47 @@ DCFA_60()
}
/* invalidate instruction physical cache line */
-void ICPL_60 __P((vm_offset_t));
+void ICPL_60 __P((paddr_t));
extern __inline__ void
-ICPL_60(va)
- vm_offset_t va;
+ICPL_60(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf488;" : : "a" (r_va)); /* cinvl ic,a0@ */
+ __asm __volatile (" .word 0xf488;" : : "a" (r_pa)); /* cinvl ic,a0@ */
}
/* invalidate instruction physical cache page */
-void ICPP_60 __P((vm_offset_t));
+void ICPP_60 __P((paddr_t));
extern __inline__ void
-ICPP_60(va)
- vm_offset_t va;
+ICPP_60(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf490;" : : "a" (r_va)); /* cinvp ic,a0@ */
+ __asm __volatile (" .word 0xf490;" : : "a" (r_pa)); /* cinvp ic,a0@ */
}
/* invalidate data physical cache line */
-void DCPL_60 __P((vm_offset_t));
+void DCPL_60 __P((paddr_t));
extern __inline__ void
-DCPL_60(va)
- vm_offset_t va;
+DCPL_60(pa)
+ paddr_t va;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf448;" : : "a" (r_va)); /* cinvl dc,a0@ */
+ __asm __volatile (" .word 0xf448;" : : "a" (r_pa)); /* cinvl dc,a0@ */
}
/* invalidate data physical cache page */
-void DCPP_60 __P((vm_offset_t));
+void DCPP_60 __P((paddr_t));
extern __inline__ void
-DCPP_60(va)
- vm_offset_t va;
+DCPP_60(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf450;" : : "a" (r_va)); /* cinvp dc,a0@ */
+ __asm __volatile (" .word 0xf450;" : : "a" (r_pa)); /* cinvp dc,a0@ */
}
/* invalidate data physical all */
@@ -226,23 +226,23 @@ DCPA_60()
}
/* data cache flush line */
-void DCFL_60 __P((vm_offset_t));
+void DCFL_60 __P((paddr_t));
extern __inline__ void
-DCFL_60(va)
- vm_offset_t va;
+DCFL_60(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf468;" : : "a" (r_va)); /* cpushl dc,a0@ */
+ __asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,a0@ */
}
/* data cache flush page */
-void DCFP_60 __P((vm_offset_t));
+void DCFP_60 __P((paddr_t));
extern __inline__ void
-DCFP_60(va)
- vm_offset_t va;
+DCFP_60(pa)
+ paddr_t pa;
{
- register vm_offset_t r_va __asm("a0") = va;
+ register paddr_t r_pa __asm("a0") = pa;
- __asm __volatile (" .word 0xf470;" : : "a" (r_va)); /* cpushp dc,a0@ */
+ __asm __volatile (" .word 0xf470;" : : "a" (r_pa)); /* cpushp dc,a0@ */
}
diff --git a/sys/arch/m68k/include/db_machdep.h b/sys/arch/m68k/include/db_machdep.h
index fcf4b0e09dd..475e1336c79 100644
--- a/sys/arch/m68k/include/db_machdep.h
+++ b/sys/arch/m68k/include/db_machdep.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_machdep.h,v 1.5 1997/07/06 07:46:25 downsj Exp $ */
+/* $OpenBSD: db_machdep.h,v 1.6 2001/05/15 01:43:14 millert Exp $ */
/* $NetBSD: db_machdep.h,v 1.20 1997/06/26 01:26:58 thorpej Exp $ */
/*
@@ -45,7 +45,7 @@
#include <machine/psl.h>
#include <machine/trap.h>
-typedef vm_offset_t db_addr_t; /* address - unsigned */
+typedef vaddr_t db_addr_t; /* address - unsigned */
typedef long db_expr_t; /* expression - signed */
typedef struct trapframe db_regs_t;
diff --git a/sys/arch/m68k/include/kcore.h b/sys/arch/m68k/include/kcore.h
index 3685de47353..7245009a41b 100644
--- a/sys/arch/m68k/include/kcore.h
+++ b/sys/arch/m68k/include/kcore.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: kcore.h,v 1.1 1996/04/19 16:08:13 niklas Exp $ */
+/* $OpenBSD: kcore.h,v 1.2 2001/05/15 01:43:14 millert Exp $ */
/* $NetBSD: kcore.h,v 1.1 1996/03/10 21:55:18 leo Exp $ */
/*
@@ -37,7 +37,7 @@
#define NPHYS_RAM_SEGS 8
typedef struct cpu_kcore_hdr {
- vm_offset_t kernel_pa; /* Phys. address of kernel VA 0 */
+ paddr_t kernel_pa; /* Phys. address of kernel VA 0 */
st_entry_t *sysseg_pa; /* Phys. address of Sysseg */
int mmutype;
phys_ram_seg_t ram_segs[NPHYS_RAM_SEGS];
diff --git a/sys/arch/m68k/m68k/cacheops.c b/sys/arch/m68k/m68k/cacheops.c
index 9392f33b3ca..e1e0ef0dd9b 100644
--- a/sys/arch/m68k/m68k/cacheops.c
+++ b/sys/arch/m68k/m68k/cacheops.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cacheops.c,v 1.1 1997/07/06 07:46:27 downsj Exp $ */
+/* $OpenBSD: cacheops.c,v 1.2 2001/05/15 01:43:15 millert Exp $ */
/* $NetBSD: cacheops.c,v 1.1 1997/06/02 20:26:57 leo Exp $ */
/*-
@@ -316,7 +316,7 @@ void _DCFA()
}
void _TBIS(va)
- vm_offset_t va;
+ vaddr_t va;
{
switch (cputype) {
default:
@@ -343,29 +343,29 @@ void _TBIS(va)
}
}
-void _DCIAS(va)
- vm_offset_t va;
+void _DCIAS(pa)
+ paddr_t pa;
{
switch (cputype) {
default:
#ifdef M68020
case CPU_68020:
- DCIAS_20(va);
+ DCIAS_20(pa);
break;
#endif
#ifdef M68030
case CPU_68030:
- DCIAS_30(va);
+ DCIAS_30(pa);
break;
#endif
#ifdef M68040
case CPU_68040:
- DCIAS_40(va);
+ DCIAS_40(pa);
break;
#endif
#ifdef M68060
case CPU_68060:
- DCIAS_60(va);
+ DCIAS_60(pa);
break;
#endif
}
@@ -388,109 +388,109 @@ void _DCPA()
}
}
-void _ICPL(va)
- vm_offset_t va;
+void _ICPL(pa)
+ paddr_t pa;
{
switch (cputype) {
default:
#ifdef M68040
case CPU_68040:
- ICPL_40(va);
+ ICPL_40(pa);
break;
#endif
#ifdef M68060
case CPU_68060:
- ICPL_60(va);
+ ICPL_60(pa);
break;
#endif
}
}
-void _ICPP(va)
- vm_offset_t va;
+void _ICPP(pa)
+ paddr_t pa;
{
switch (cputype) {
default:
#ifdef M68040
case CPU_68040:
- ICPP_40(va);
+ ICPP_40(pa);
break;
#endif
#ifdef M68060
case CPU_68060:
- ICPP_60(va);
+ ICPP_60(pa);
break;
#endif
}
}
-void _DCPL(va)
- vm_offset_t va;
+void _DCPL(pa)
+ paddr_t pa;
{
switch (cputype) {
default:
#ifdef M68040
case CPU_68040:
- DCPL_40(va);
+ DCPL_40(pa);
break;
#endif
#ifdef M68060
case CPU_68060:
- DCPL_60(va);
+ DCPL_60(pa);
break;
#endif
}
}
-void _DCPP(va)
- vm_offset_t va;
+void _DCPP(pa)
+ paddr_t pa;
{
switch (cputype) {
default:
#ifdef M68040
case CPU_68040:
- DCPP_40(va);
+ DCPP_40(pa);
break;
#endif
#ifdef M68060
case CPU_68060:
- DCPP_60(va);
+ DCPP_60(pa);
break;
#endif
}
}
-void _DCFL(va)
- vm_offset_t va;
+void _DCFL(pa)
+ paddr_t pa;
{
switch (cputype) {
default:
#ifdef M68040
case CPU_68040:
- DCFL_40(va);
+ DCFL_40(pa);
break;
#endif
#ifdef M68060
case CPU_68060:
- DCFL_60(va);
+ DCFL_60(pa);
break;
#endif
}
}
-void _DCFP(va)
- vm_offset_t va;
+void _DCFP(pa)
+ paddr_t pa;
{
switch (cputype) {
default:
#ifdef M68040
case CPU_68040:
- DCFP_40(va);
+ DCFP_40(pa);
break;
#endif
#ifdef M68060
case CPU_68060:
- DCFP_60(va);
+ DCFP_60(pa);
break;
#endif
}
diff --git a/sys/arch/m68k/m68k/db_disasm.c b/sys/arch/m68k/m68k/db_disasm.c
index d34d4960f09..be8302f0ed1 100644
--- a/sys/arch/m68k/m68k/db_disasm.c
+++ b/sys/arch/m68k/m68k/db_disasm.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_disasm.c,v 1.6 1997/06/09 23:04:26 denny Exp $ */
+/* $OpenBSD: db_disasm.c,v 1.7 2001/05/15 01:43:15 millert Exp $ */
/* $NetBSD: db_disasm.c,v 1.19 1996/10/30 08:22:39 is Exp $ */
/*
@@ -165,9 +165,9 @@ const char *const fpcregs[3] = { "fpiar", "fpsr", "fpcr" };
static char asm_buffer[256];
static char info_buffer[256];
-vm_offset_t
+db_addr_t
db_disasm(loc, moto_syntax)
- vm_offset_t loc;
+ db_addr_t loc;
boolean_t moto_syntax;
{
u_short opc;
diff --git a/sys/arch/m68k/m68k/db_disasm.h b/sys/arch/m68k/m68k/db_disasm.h
index 7dcd41158e7..859ee0488c9 100644
--- a/sys/arch/m68k/m68k/db_disasm.h
+++ b/sys/arch/m68k/m68k/db_disasm.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_disasm.h,v 1.2 1996/04/21 22:17:47 deraadt Exp $ */
+/* $OpenBSD: db_disasm.h,v 1.3 2001/05/15 01:43:15 millert Exp $ */
/* $NetBSD: db_disasm.h,v 1.4 1996/04/01 01:38:12 briggs Exp $ */
/*
@@ -426,7 +426,7 @@ typedef struct dis_buffer dis_buffer_t;
#define PRINT_DREG(dbuf, reg) addstr(dbuf, dregs[reg])
#define PRINT_AREG(dbuf, reg) addstr(dbuf, aregs[reg])
-vm_offset_t db_disasm __P((vm_offset_t loc, boolean_t moto_syntax));
+db_addr_t db_disasm __P((db_addr_t loc, boolean_t moto_syntax));
void get_modregstr_moto __P((dis_buffer_t *dbuf, int bit, int mod, int sz, int dd));
void get_modregstr_mit __P((dis_buffer_t *dbuf, int bit, int mod, int sz, int dd));
u_long get_areg_val __P((int reg));
diff --git a/sys/arch/m68k/m68k/db_memrw.c b/sys/arch/m68k/m68k/db_memrw.c
index 7e9626c1495..6afce7cde0a 100644
--- a/sys/arch/m68k/m68k/db_memrw.c
+++ b/sys/arch/m68k/m68k/db_memrw.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_memrw.c,v 1.1 1996/04/19 16:08:17 niklas Exp $ */
+/* $OpenBSD: db_memrw.c,v 1.2 2001/05/15 01:43:15 millert Exp $ */
/* $NetBSD: db_memrw.c,v 1.1 1996/02/22 23:23:35 gwr Exp $ */
/*
@@ -52,7 +52,7 @@
*/
void
db_read_bytes(addr, size, data)
- vm_offset_t addr;
+ db_addr_t addr;
register size_t size;
register char *data;
{
@@ -79,7 +79,7 @@ db_read_bytes(addr, size, data)
*/
void
db_write_bytes(addr, size, data)
- vm_offset_t addr;
+ db_addr_t addr;
register size_t size;
register char *data;
{
diff --git a/sys/arch/m68k/m68k/db_trace.c b/sys/arch/m68k/m68k/db_trace.c
index b2c8b191e5f..93a16598504 100644
--- a/sys/arch/m68k/m68k/db_trace.c
+++ b/sys/arch/m68k/m68k/db_trace.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_trace.c,v 1.9 1998/03/01 14:12:42 niklas Exp $ */
+/* $OpenBSD: db_trace.c,v 1.10 2001/05/15 01:43:15 millert Exp $ */
/* $NetBSD: db_trace.c,v 1.20 1997/02/05 05:10:25 scottr Exp $ */
/*
@@ -87,9 +87,9 @@ db_var_short(varp, valp, op)
#define MAXINT 0x7fffffff
#if 0
-#define INKERNEL(va) (((vm_offset_t)(va)) >= VM_MIN_KERNEL_ADDRESS && \
- (((vm_offset_t)(va)) < (USRSTACK - MAXSSIZ) || \
- ((vm_offset_t)(va)) >= USRSTACK))
+#define INKERNEL(va) (((vaddr_t)(va)) >= VM_MIN_KERNEL_ADDRESS && \
+ (((vaddr_t)(va)) < (USRSTACK - MAXSSIZ) || \
+ ((vaddr_t)(va)) >= USRSTACK))
#else
/* XXX - Slight hack... */
extern int curpcb;
diff --git a/sys/arch/m68k/m68k/mappedcopy.c b/sys/arch/m68k/m68k/mappedcopy.c
index 0dfa6e56056..6bf28be9d43 100644
--- a/sys/arch/m68k/m68k/mappedcopy.c
+++ b/sys/arch/m68k/m68k/mappedcopy.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: mappedcopy.c,v 1.3 2001/05/05 21:26:37 art Exp $ */
+/* $OpenBSD: mappedcopy.c,v 1.4 2001/05/15 01:43:16 millert Exp $ */
/* $NetBSD: mappedcopy.c,v 1.1 1997/02/02 06:54:10 thorpej Exp $ */
/*
@@ -80,7 +80,8 @@ mappedcopyin(fromp, top, count)
register void *fromp, *top;
register size_t count;
{
- register vm_offset_t kva, upa;
+ register vaddr_t kva;
+ register paddr_t upa;
register size_t len;
int off, alignable;
pmap_t upmap;
@@ -93,7 +94,7 @@ mappedcopyin(fromp, top, count)
mappedcopyincount++;
#endif
- kva = (vm_offset_t)CADDR1;
+ kva = (vaddr_t)CADDR1;
off = (int)((u_long)fromp & PAGE_MASK);
alignable = (off == ((u_long)top & PAGE_MASK));
upmap = vm_map_pmap(&curproc->p_vmspace->vm_map);
@@ -131,7 +132,8 @@ mappedcopyout(fromp, top, count)
register void *fromp, *top;
register size_t count;
{
- register vm_offset_t kva, upa;
+ register vaddr_t kva;
+ register paddr_t upa;
register size_t len;
int off, alignable;
pmap_t upmap;
@@ -144,7 +146,7 @@ mappedcopyout(fromp, top, count)
mappedcopyoutcount++;
#endif
- kva = (vm_offset_t) CADDR2;
+ kva = (vaddr_t) CADDR2;
off = (int)((u_long)top & PAGE_MASK);
alignable = (off == ((u_long)fromp & PAGE_MASK));
upmap = vm_map_pmap(&curproc->p_vmspace->vm_map);
diff --git a/sys/arch/m68k/m68k/sunos_machdep.c b/sys/arch/m68k/m68k/sunos_machdep.c
index 9e595e66264..f84d7e06e8e 100644
--- a/sys/arch/m68k/m68k/sunos_machdep.c
+++ b/sys/arch/m68k/m68k/sunos_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: sunos_machdep.c,v 1.11 2000/05/28 02:24:43 art Exp $ */
+/* $OpenBSD: sunos_machdep.c,v 1.12 2001/05/15 01:43:16 millert Exp $ */
/* $NetBSD: sunos_machdep.c,v 1.12 1996/10/13 03:19:22 christos Exp $ */
/*
@@ -144,10 +144,10 @@ sunos_sendsig(catcher, sig, mask, code, type, val)
} else
fp = (struct sunos_sigframe *)frame->f_regs[SP] - 1;
#if defined(UVM)
- if ((vm_offset_t)fp <= USRSTACK - ctob(p->p_vmspace->vm_ssize))
+ if ((vaddr_t)fp <= USRSTACK - ctob(p->p_vmspace->vm_ssize))
(void)uvm_grow(p, (unsigned)fp);
#else
- if ((vm_offset_t)fp <= USRSTACK - ctob(p->p_vmspace->vm_ssize))
+ if ((vaddr_t)fp <= USRSTACK - ctob(p->p_vmspace->vm_ssize))
(void)grow(p, (unsigned)fp);
#endif
#ifdef DEBUG
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-15 04:18:01 +0000