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-rw-r--r--sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c b/sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c
index bfbcdc8a349..fbd720bde43 100644
--- a/sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c
+++ b/sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c
@@ -2207,12 +2207,16 @@ static int psp_hw_start(struct psp_context *psp)
return ret;
}
+ if (amdgpu_sriov_vf(adev) && amdgpu_in_reset(adev))
+ goto skip_pin_bo;
+
ret = psp_tmr_init(psp);
if (ret) {
DRM_ERROR("PSP tmr init failed!\n");
return ret;
}
+skip_pin_bo:
/*
* For ASICs with DF Cstate management centralized
* to PMFW, TMR setup should be performed after PMFW