diff options
| -rw-r--r-- | sys/arch/amd64/conf/GENERIC | 4 | ||||
| -rw-r--r-- | sys/arch/amd64/conf/RAMDISK | 4 | ||||
| -rw-r--r-- | sys/arch/amd64/conf/RAMDISK_CD | 4 | ||||
| -rw-r--r-- | sys/arch/i386/conf/GENERIC | 4 | ||||
| -rw-r--r-- | sys/arch/i386/conf/RAMDISKB | 4 | ||||
| -rw-r--r-- | sys/arch/i386/conf/RAMDISK_CD | 4 | ||||
| -rw-r--r-- | sys/conf/files | 6 | ||||
| -rw-r--r-- | sys/dev/ic/ciss.c | 920 | ||||
| -rw-r--r-- | sys/dev/ic/cissreg.h | 210 | ||||
| -rw-r--r-- | sys/dev/ic/cissvar.h | 59 | ||||
| -rw-r--r-- | sys/dev/pci/ciss_pci.c | 164 | ||||
| -rw-r--r-- | sys/dev/pci/files.pci | 6 |
12 files changed, 1381 insertions, 8 deletions
diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC index 0d41f32467f..49ceb213fd7 100644 --- a/sys/arch/amd64/conf/GENERIC +++ b/sys/arch/amd64/conf/GENERIC @@ -1,4 +1,4 @@ -# $OpenBSD: GENERIC,v 1.72 2005/06/17 23:50:37 deraadt Exp $ +# $OpenBSD: GENERIC,v 1.73 2005/07/06 01:52:13 mickey Exp $ # # For further information on compiling OpenBSD kernels, see the config(8) # man page. @@ -208,6 +208,8 @@ ami* at pci? # AMI MegaRAID controllers scsibus* at ami? #cac* at pci? # Compaq Smart ARRAY RAID controllers #scsibus* at cac? +#ciss* at pci? # Compaq Smart ARRAY 5* Controllers +#scsibus* at ciss? #iha* at pci? # Initio Ultra/UltraWide SCSI controllers #scsibus* at iha? isp* at pci? # Qlogic ISP [12]0x0 SCSI/FibreChannel diff --git a/sys/arch/amd64/conf/RAMDISK b/sys/arch/amd64/conf/RAMDISK index 017b25a2733..8c28a415b22 100644 --- a/sys/arch/amd64/conf/RAMDISK +++ b/sys/arch/amd64/conf/RAMDISK @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISK,v 1.25 2005/05/27 15:54:58 drahn Exp $ +# $OpenBSD: RAMDISK,v 1.26 2005/07/06 01:52:13 mickey Exp $ machine amd64 # architecture, used by config; REQUIRED @@ -135,6 +135,8 @@ ami* at pci? # AMI MegaRAID controllers scsibus* at ami? #cac* at pci? # Compaq Smart ARRAY RAID controllers #scsibus* at cac? +#ciss* at pci? # Compaq Smart ARRAY 5* Controllers +#scsibus* at ciss? #twe* at pci? # 3ware Escalade RAID controllers #scsibus* at twe? #iha* at pci? # Initio Ultra/UltraWide SCSI controllers diff --git a/sys/arch/amd64/conf/RAMDISK_CD b/sys/arch/amd64/conf/RAMDISK_CD index 787c3e4ff2e..81292ee9c87 100644 --- a/sys/arch/amd64/conf/RAMDISK_CD +++ b/sys/arch/amd64/conf/RAMDISK_CD @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISK_CD,v 1.36 2005/06/28 02:12:21 brad Exp $ +# $OpenBSD: RAMDISK_CD,v 1.37 2005/07/06 01:52:13 mickey Exp $ machine amd64 # architecture, used by config; REQUIRED @@ -152,6 +152,8 @@ ami* at pci? # AMI MegaRAID controllers scsibus* at ami? #cac* at pci? # Compaq Smart ARRAY RAID controllers #scsibus* at cac? +#ciss* at pci? # Compaq Smart ARRAY 5* Controllers +#scsibus* at ciss? #twe* at pci? # 3ware Escalade RAID controllers #scsibus* at twe? #iha* at pci? # Initio Ultra/UltraWide SCSI controllers diff --git a/sys/arch/i386/conf/GENERIC b/sys/arch/i386/conf/GENERIC index 439983fb4ea..87ccaa91b40 100644 --- a/sys/arch/i386/conf/GENERIC +++ b/sys/arch/i386/conf/GENERIC @@ -1,4 +1,4 @@ -# $OpenBSD: GENERIC,v 1.419 2005/06/27 20:45:20 deraadt Exp $ +# $OpenBSD: GENERIC,v 1.420 2005/07/06 01:52:13 mickey Exp $ # # For further information on compiling OpenBSD kernels, see the config(8) # man page. @@ -295,6 +295,8 @@ scsibus* at ami? cac* at pci? # Compaq Smart ARRAY RAID controllers cac* at eisa? scsibus* at cac? +#ciss* at pci? # Compaq Smart ARRAY 5* Controllers +#scsibus* at ciss? iha* at pci? # Initio Ultra/UltraWide SCSI controllers scsibus* at iha? isp* at pci? # Qlogic ISP [12]0x0 SCSI/FibreChannel diff --git a/sys/arch/i386/conf/RAMDISKB b/sys/arch/i386/conf/RAMDISKB index 3c6b6232ed4..d46b67e1846 100644 --- a/sys/arch/i386/conf/RAMDISKB +++ b/sys/arch/i386/conf/RAMDISKB @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISKB,v 1.82 2005/05/27 02:08:14 martin Exp $ +# $OpenBSD: RAMDISKB,v 1.83 2005/07/06 01:52:13 mickey Exp $ machine i386 # architecture, used by config; REQUIRED @@ -145,6 +145,8 @@ scsibus* at ami? cac* at pci? # Compaq Smart ARRAY RAID controllers cac* at eisa? scsibus* at cac? +#ciss* at pci? # Compaq Smart ARRAY 5* Controllers +#scsibus* at ciss? twe* at pci? # 3ware Escalade RAID controllers scsibus* at twe? iha* at pci? # Initio Ultra/UltraWide SCSI controllers diff --git a/sys/arch/i386/conf/RAMDISK_CD b/sys/arch/i386/conf/RAMDISK_CD index ec9b626908b..ab53cdce328 100644 --- a/sys/arch/i386/conf/RAMDISK_CD +++ b/sys/arch/i386/conf/RAMDISK_CD @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISK_CD,v 1.97 2005/05/27 15:55:00 drahn Exp $ +# $OpenBSD: RAMDISK_CD,v 1.98 2005/07/06 01:52:13 mickey Exp $ machine i386 # architecture, used by config; REQUIRED @@ -203,6 +203,8 @@ scsibus* at ami? cac* at pci? # Compaq Smart ARRAY RAID controllers cac* at eisa? scsibus* at cac? +#ciss* at pci? # Compaq Smart ARRAY 5* Controllers +#scsibus* at ciss? twe* at pci? # 3ware Escalade RAID controllers scsibus* at twe? iha* at pci? # Initio Ultra/UltraWide SCSI controllers diff --git a/sys/conf/files b/sys/conf/files index a2c4468c405..47f4aec2798 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -1,4 +1,4 @@ -# $OpenBSD: files,v 1.346 2005/07/03 20:13:59 drahn Exp $ +# $OpenBSD: files,v 1.347 2005/07/06 01:52:13 mickey Exp $ # $NetBSD: files,v 1.87 1996/05/19 17:17:50 jonathan Exp $ # @(#)files.newconf 7.5 (Berkeley) 5/10/93 @@ -163,6 +163,10 @@ file dev/ic/lsi64854.c lsi64854 device cac: scsi file dev/ic/cac.c cac +# Compaq Smart ARRAY 5* controllers +device ciss: scsi +file dev/ic/ciss.c ciss + # AMI MegaRAID controllers device ami: scsi file dev/ic/ami.c ami diff --git a/sys/dev/ic/ciss.c b/sys/dev/ic/ciss.c new file mode 100644 index 00000000000..349a1e31fc5 --- /dev/null +++ b/sys/dev/ic/ciss.c @@ -0,0 +1,920 @@ +/* $OpenBSD: ciss.c,v 1.1 2005/07/06 01:52:13 mickey Exp $ */ + +/* + * Copyright (c) 2005 Michael Shalayeff + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN + * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* #define CISS_DEBUG */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/buf.h> +#include <sys/ioctl.h> +#include <sys/device.h> +#include <sys/kernel.h> +#include <sys/malloc.h> +#include <sys/proc.h> +#include <sys/kthread.h> + +#include <machine/bus.h> + +#include <scsi/scsi_all.h> +#include <scsi/scsi_disk.h> +#include <scsi/scsiconf.h> + +#include <dev/ic/cissreg.h> +#include <dev/ic/cissvar.h> + +#include <dev/biovar.h> +#include "bio.h" + +#ifdef CISS_DEBUG +#define CISS_DPRINTF(m,a) if (ciss_debug & (m)) printf a +#define CISS_D_CMD 0x0001 +#define CISS_D_INTR 0x0002 +#define CISS_D_MISC 0x0004 +#define CISS_D_DMA 0x0008 +#define CISS_D_IOCTL 0x0010 +int ciss_debug = 0 + | CISS_D_CMD + | CISS_D_INTR + | CISS_D_MISC + | CISS_D_DMA + | CISS_D_IOCTL + ; +#else +#define CISS_DPRINTF(m,a) /* m, a */ +#endif + +struct cfdriver ciss_cd = { + NULL, "ciss", DV_DULL +}; + +int ciss_scsi_cmd(struct scsi_xfer *xs); +int ciss_scsi_ioctl(struct scsi_link *link, u_long cmd, + caddr_t addr, int flag, struct proc *p); +void cissminphys(struct buf *bp); + +struct scsi_adapter ciss_switch = { + ciss_scsi_cmd, cissminphys, NULL, NULL, ciss_scsi_ioctl +}; + +struct scsi_device ciss_dev = { + NULL, NULL, NULL, NULL +}; + +int ciss_scsi_raw_cmd(struct scsi_xfer *xs); + +struct scsi_adapter ciss_raw_switch = { + ciss_scsi_raw_cmd, cissminphys, NULL, NULL, +}; + +struct scsi_device ciss_raw_dev = { + NULL, NULL, NULL, NULL +}; + +#if NBIO > 0 +int ciss_ioctl(struct device *, u_long, caddr_t); +#endif +int ciss_sync(struct ciss_softc *sc); +void ciss_heartbeat(void *v); +void ciss_shutdown(void *v); +void ciss_kthread(void *v); + +struct ciss_ccb *ciss_get_ccb(struct ciss_softc *sc); +void ciss_put_ccb(struct ciss_ccb *ccb); +int ciss_cmd(struct ciss_ccb *ccb, int flags, int wait); +int ciss_done(struct ciss_ccb *ccb); +int ciss_error(struct ciss_ccb *ccb); +int ciss_inq(struct ciss_softc *sc, struct ciss_inquiry *inq); +int ciss_ldmap(struct ciss_softc *sc); + +struct ciss_ccb * +ciss_get_ccb(struct ciss_softc *sc) +{ + struct ciss_ccb *ccb; + + if ((ccb = TAILQ_LAST(&sc->sc_free_ccb, ciss_queue_head))) { + TAILQ_REMOVE(&sc->sc_free_ccb, ccb, ccb_link); + ccb->ccb_state = CISS_CCB_READY; + } + return ccb; +} + +void +ciss_put_ccb(struct ciss_ccb *ccb) +{ + struct ciss_softc *sc = ccb->ccb_sc; + + ccb->ccb_state = CISS_CCB_FREE; + TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_link); +} + +int +ciss_attach(struct ciss_softc *sc) +{ + struct ciss_ccb *ccb; + struct ciss_cmd *cmd; + struct ciss_inquiry *inq; + bus_dma_segment_t seg[1]; + int error, i, total, rseg, maxfer; + paddr_t pa; + + bus_space_read_region_4(sc->iot, sc->cfg_ioh, sc->cfgoff, + (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4); + + if (sc->cfg.signature != CISS_SIGNATURE) { + printf(": bad sign 0x%08x\n", sc->cfg.signature); + return -1; + } + + if (sc->cfg.version != CISS_VERSION) { + printf(": unsupported version 0x%08x\n", sc->cfg.version); + return -1; + } + + if (!(sc->cfg.methods & CISS_METH_SIMPL)) { + printf(": not simple 0x%08x\n", sc->cfg.methods); + return -1; + } + + sc->cfg.rmethod = CISS_METH_SIMPL; + sc->cfg.paddr_lim = 0; /* 32bit addrs */ + sc->cfg.int_delay = 0; /* disable coalescing */ + sc->cfg.int_count = 0; + strlcpy(sc->cfg.hostname, "HUMPPA", sizeof(sc->cfg.hostname)); + sc->cfg.driverf |= CISS_DRV_PRF; /* enable prefetch */ + + bus_space_write_region_4(sc->iot, sc->cfg_ioh, sc->cfgoff, + (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4); + bus_space_barrier(sc->iot, sc->cfg_ioh, sc->cfgoff, sizeof(sc->cfg), + BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); + + bus_space_write_4(sc->iot, sc->ioh, CISS_IDB, CISS_IDB_CFG); + bus_space_barrier(sc->iot, sc->ioh, CISS_IDB, 4, + BUS_SPACE_BARRIER_WRITE); + for (i = 1000000; i--; DELAY(1)) { + if (!(bus_space_read_4(sc->iot, sc->ioh, CISS_IDB) & CISS_IDB_CFG)) + break; + bus_space_barrier(sc->iot, sc->ioh, CISS_IDB, 4, + BUS_SPACE_BARRIER_READ); + } + + if (bus_space_read_4(sc->iot, sc->ioh, CISS_IDB) & CISS_IDB_CFG) { + printf(": cannot set config\n"); + return -1; + } + + bus_space_read_region_4(sc->iot, sc->cfg_ioh, sc->cfgoff, + (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4); + + if (!(sc->cfg.amethod & CISS_METH_SIMPL)) { + printf(": cannot simplify 0x%08x\n", sc->cfg.amethod); + return -1; + } + + /* i'm ready for you and i hope you're ready for me */ + for (i = 30000; i--; DELAY(1000)) { + if (bus_space_read_4(sc->iot, sc->cfg_ioh, sc->cfgoff + + offsetof(struct ciss_config, amethod)) & CISS_METH_SIMPL) + break; + bus_space_barrier(sc->iot, sc->cfg_ioh, sc->cfgoff + + offsetof(struct ciss_config, amethod), 4, + BUS_SPACE_BARRIER_READ); + } + + if (!(bus_space_read_4(sc->iot, sc->cfg_ioh, sc->cfgoff + + offsetof(struct ciss_config, amethod)) & CISS_METH_READY)) { + printf(": she never came ready for me 0x%08x\n", + sc->cfg.amethod); + return -1; + } + + sc->maxcmd = sc->cfg.maxcmd; + sc->maxsg = sc->cfg.maxsg; + if (sc->maxsg > MAXPHYS / PAGE_SIZE) + sc->maxsg = MAXPHYS / PAGE_SIZE; + i = sizeof(struct ciss_ccb) + + sizeof(ccb->ccb_cmd.sgl[0]) * (sc->maxsg - 1); + for (sc->ccblen = 0x10; sc->ccblen < i; sc->ccblen <<= 1); + + total = sc->ccblen * sc->maxcmd; + if ((error = bus_dmamem_alloc(sc->dmat, total, PAGE_SIZE, 0, + sc->cmdseg, 1, &rseg, BUS_DMA_NOWAIT))) { + printf(": cannot allocate CCBs (%d)\n", error); + return -1; + } + + if ((error = bus_dmamem_map(sc->dmat, sc->cmdseg, rseg, total, + (caddr_t *)&sc->ccbs, BUS_DMA_NOWAIT))) { + printf(": cannot map CCBs (%d)\n", error); + return -1; + } + bzero(sc->ccbs, total); + + if ((error = bus_dmamap_create(sc->dmat, total, 1, + total, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->cmdmap))) { + printf(": cannot create CCBs dmamap (%d)\n", error); + bus_dmamem_free(sc->dmat, sc->cmdseg, 1); + return -1; + } + + if ((error = bus_dmamap_load(sc->dmat, sc->cmdmap, sc->ccbs, total, + NULL, BUS_DMA_NOWAIT))) { + printf(": cannot load CCBs dmamap (%d)\n", error); + bus_dmamem_free(sc->dmat, sc->cmdseg, 1); + bus_dmamap_destroy(sc->dmat, sc->cmdmap); + return -1; + } + + TAILQ_INIT(&sc->sc_ccbq); + TAILQ_INIT(&sc->sc_ccbdone); + TAILQ_INIT(&sc->sc_free_ccb); + + maxfer = sc->maxsg * PAGE_SIZE; + for (i = 0; total; i++, total -= sc->ccblen) { + ccb = sc->ccbs + i * sc->ccblen; + cmd = &ccb->ccb_cmd; + pa = sc->cmdseg[0].ds_addr + i * sc->ccblen; + + ccb->ccb_sc = sc; + ccb->ccb_cmdpa = pa + offsetof(struct ciss_ccb, ccb_cmd); + ccb->ccb_state = CISS_CCB_FREE; + + cmd->id = htole32(i << 2); + cmd->id_hi = htole32(0); + cmd->sgin = sc->maxsg; + cmd->sglen = htole16((u_int16_t)cmd->sgin); + cmd->err_len = htole32(sizeof(ccb->ccb_err)); + pa += offsetof(struct ciss_ccb, ccb_err); + cmd->err_pa = htole64((u_int64_t)pa); + + if ((error = bus_dmamap_create(sc->dmat, maxfer, sc->maxsg, + maxfer, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, + &ccb->ccb_dmamap))) + break; + + TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_link); + } + + if (i < sc->maxcmd) { + printf(": cannot create ccb#%d dmamap (%d)\n", i, error); + if (i == 0) { + /* TODO leaking cmd's dmamaps and shitz */ + bus_dmamem_free(sc->dmat, sc->cmdseg, 1); + bus_dmamap_destroy(sc->dmat, sc->cmdmap); + return -1; + } + } + + if ((error = bus_dmamem_alloc(sc->dmat, PAGE_SIZE, PAGE_SIZE, 0, + seg, 1, &rseg, BUS_DMA_NOWAIT))) { + printf(": cannot allocate scratch buffer (%d)\n", error); + return -1; + } + + if ((error = bus_dmamem_map(sc->dmat, seg, rseg, PAGE_SIZE, + (caddr_t *)&sc->scratch, BUS_DMA_NOWAIT))) { + printf(": cannot map scratch buffer (%d)\n", error); + return -1; + } + bzero(sc->scratch, PAGE_SIZE); + + inq = sc->scratch; + if (ciss_inq(sc, inq)) { + printf(": adapter inquiry failed\n"); + bus_dmamem_free(sc->dmat, sc->cmdseg, 1); + bus_dmamap_destroy(sc->dmat, sc->cmdmap); + return -1; + } + + if (!(inq->flags & CISS_INQ_BIGMAP)) { + printf(": big map is not supported, flags=%b\n", + inq->flags, CISS_INQ_BITS); + bus_dmamem_free(sc->dmat, sc->cmdseg, 1); + bus_dmamap_destroy(sc->dmat, sc->cmdmap); + return -1; + } + + sc->maxunits = inq->numld; + sc->nbus = inq->nscsi_bus; + sc->ndrives = inq->buswidth; + printf(": %d LD%s HW rev %d FW %4.4s/%4.4s\n", + inq->numld, inq->numld == 1? "" : "s", + inq->hw_rev, inq->fw_running, inq->fw_stored); + + /* map LDs */ + if (ciss_ldmap(sc)) { + printf("%s: adapter LD map failed\n", sc->sc_dev.dv_xname); + bus_dmamem_free(sc->dmat, sc->cmdseg, 1); + bus_dmamap_destroy(sc->dmat, sc->cmdmap); + return -1; + } + +/* TODO scan all physdev */ +/* TODO scan all logdev */ + +#if 0 + if (!(sc->sc_sh = shutdownhook_establish(ciss_shutdown, sc))) { + printf(": unable to establish shutdown hook\n"); + bus_dmamem_free(sc->dmat, sc->cmdseg, 1); + bus_dmamap_destroy(sc->dmat, sc->cmdmap); + return -1; + } + + if (kthread_create(ciss_kthread, sc, NULL, "%s", sc->sc_dev.dv_xname)) { + printf(": unable to create kernel thread\n"); + shutdownhook_disestablish(sc->sc_sh); + bus_dmamem_free(sc->dmat, sc->cmdseg, 1); + bus_dmamap_destroy(sc->dmat, sc->cmdmap); + return -1; + } +#endif + + timeout_set(&sc->sc_hb, ciss_heartbeat, sc); + timeout_add(&sc->sc_hb, hz * 3); + + sc->sc_link.device = &ciss_dev; + sc->sc_link.adapter_softc = sc; + sc->sc_link.openings = sc->maxcmd / sc->maxunits; /* XXX */ + sc->sc_link.adapter = &ciss_switch; + sc->sc_link.adapter_target = sc->maxunits; + sc->sc_link.adapter_buswidth = sc->maxunits; + config_found(&sc->sc_dev, &sc->sc_link, scsiprint); + +#if 0 + sc->sc_link_raw.device = &ciss_raw_dev; + sc->sc_link_raw.adapter_softc = sc; + sc->sc_link_raw.adapter = &ciss_raw_switch; + sc->sc_link_raw.adapter_target = sc->ndrives; + sc->sc_link_raw.adapter_buswidth = sc->ndrives; + config_found(&sc->sc_dev, &sc->sc_link_raw, scsiprint); +#endif + +#if NBIO1 > 0 + if (bio_register(&sc->sc_dev, ciss_ioctl) != 0) + printf("%s: controller registration failed", + sc->sc_dev.dv_xname); +#endif + + return 0; +} + +void +ciss_shutdown(void *v) +{ + struct ciss_softc *sc = v; + + ciss_sync(sc); + timeout_del(&sc->sc_hb); +} + +void +cissminphys(struct buf *bp) +{ +#if 0 /* TOSO */ +#define CISS_MAXFER (PAGE_SIZE * (sc->maxsg + 1)) + if (bp->b_bcount > CISS_MAXFER) + bp->b_bcount = CISS_MAXFER; +#endif + minphys(bp); +} + +/* + * submit a command and optionally wait for completition. + * wait arg abuses SCSI_POLL|SCSI_NOSLEEP flags to request + * to wait (SCSI_POLL) and to allow tsleep() (!SCSI_NOSLEEP) + * instead of busy loop waiting + */ +int +ciss_cmd(struct ciss_ccb *ccb, int flags, int wait) +{ + struct ciss_softc *sc = ccb->ccb_sc; + struct ciss_cmd *cmd = &ccb->ccb_cmd; + struct ciss_ccb *ccb1; + bus_dmamap_t dmap = ccb->ccb_dmamap; + u_int32_t id; + int i, error = 0; + + if (ccb->ccb_state != CISS_CCB_READY) { + printf("%s: ccb %d not ready state=%b\n", sc->sc_dev.dv_xname, + cmd->id, ccb->ccb_state, CISS_CCB_BITS); + return (EINVAL); + } + + if (ccb->ccb_data) { + bus_dma_segment_t *sgd; + + if ((error = bus_dmamap_load(sc->dmat, dmap, ccb->ccb_data, + ccb->ccb_len, NULL, flags))) { + if (error == EFBIG) + printf("more than %d dma segs\n", sc->maxsg); + else + printf("error %d loading dma map\n", error); + ciss_put_ccb(ccb); + return (error); + } + cmd->sgin = dmap->dm_nsegs; + + sgd = dmap->dm_segs; + CISS_DPRINTF(CISS_D_DMA, ("data=%p/%u<0x%lx/%u", + ccb->ccb_data, ccb->ccb_len, sgd->ds_addr, sgd->ds_len)); + + for (i = 0; i < dmap->dm_nsegs; sgd++, i++) { + cmd->sgl[i].addr_lo = htole32(sgd->ds_addr); + cmd->sgl[i].addr_hi = + htole32((u_int64_t)sgd->ds_addr >> 32); + cmd->sgl[i].len = htole32(sgd->ds_len); + cmd->sgl[i].flags = htole32(0); + if (i) + CISS_DPRINTF(CISS_D_DMA, + (",0x%lx/%u", sgd->ds_addr, sgd->ds_len)); + } + + CISS_DPRINTF(CISS_D_DMA, ("> ")); + + bus_dmamap_sync(sc->dmat, dmap, 0, dmap->dm_mapsize, + BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); + } else + cmd->sgin = 0; + cmd->sglen = htole16((u_int16_t)cmd->sgin); + bzero(&ccb->ccb_err, sizeof(ccb->ccb_err)); + + bus_dmamap_sync(sc->dmat, sc->cmdmap, 0, sc->cmdmap->dm_mapsize, + BUS_DMASYNC_PREWRITE); + + if ((wait & (SCSI_POLL|SCSI_NOSLEEP)) == (SCSI_POLL|SCSI_NOSLEEP)) + bus_space_write_4(sc->iot, sc->ioh, CISS_IMR, + bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) | sc->iem); + + TAILQ_INSERT_TAIL(&sc->sc_ccbq, ccb, ccb_link); + ccb->ccb_state = CISS_CCB_ONQ; + CISS_DPRINTF(CISS_D_CMD, ("submit=0x%x ", cmd->id)); + bus_space_write_4(sc->iot, sc->ioh, CISS_INQ, ccb->ccb_cmdpa); + + if (wait) { + CISS_DPRINTF(CISS_D_CMD, ("waiting ")); + + for (;;) { + if (!(wait & SCSI_NOSLEEP)) { + ccb->ccb_state = CISS_CCB_POLL; + tsleep(ccb, PRIBIO + 1, "ciss_cmd", 0); + /* handle FAIL TODO */ + if (ccb->ccb_state != CISS_CCB_ONQ) + continue; + ccb1 = ccb; + } else { + DELAY(1); + + if (!(bus_space_read_4(sc->iot, sc->ioh, + CISS_ISR) & sc->iem)) { + CISS_DPRINTF(CISS_D_CMD, ("N")); + continue; + } + + if ((id = bus_space_read_4(sc->iot, sc->ioh, + CISS_OUTQ)) == 0xffffffff) { + CISS_DPRINTF(CISS_D_CMD, ("Q")); + continue; + } + + CISS_DPRINTF(CISS_D_CMD, ("got=0x%x ", id)); + ccb1 = sc->ccbs + (id >> 2) * sc->ccblen; + ccb1->ccb_cmd.id = htole32(id); + } + + error = ciss_done(ccb1); + if (ccb1 == ccb) + break; + } + + CISS_DPRINTF(CISS_D_CMD, ("done %d:%d", + ccb->ccb_err.cmd_stat, ccb->ccb_err.scsi_stat)); + } + + if ((wait & (SCSI_POLL|SCSI_NOSLEEP)) == (SCSI_POLL|SCSI_NOSLEEP)) + bus_space_write_4(sc->iot, sc->ioh, CISS_IMR, + bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) & ~sc->iem); + + return (error); +} + +int +ciss_done(struct ciss_ccb *ccb) /* TODO */ +{ + struct ciss_softc *sc = ccb->ccb_sc; + struct scsi_xfer *xs = ccb->ccb_xs; + ciss_lock_t lock; + int error = 0; + + CISS_DPRINTF(CISS_D_CMD, ("ciss_done(%p) ", ccb)); + + if (ccb->ccb_state != CISS_CCB_ONQ) { + printf("%s: unqueued ccb %p ready, state=%b\n", + sc->sc_dev.dv_xname, ccb, ccb->ccb_state, CISS_CCB_BITS); + return 1; + } + + lock = CISS_LOCK(sc); + ccb->ccb_state = CISS_CCB_READY; + TAILQ_REMOVE(&sc->sc_ccbq, ccb, ccb_link); + + if (ccb->ccb_cmd.id & CISS_CMD_ERR) + error = ciss_error(ccb); + + if (ccb->ccb_data) { + bus_dmamap_sync(sc->dmat, ccb->ccb_dmamap, 0, + ccb->ccb_dmamap->dm_mapsize, (xs->flags & SCSI_DATA_IN) ? + BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); + bus_dmamap_unload(sc->dmat, ccb->ccb_dmamap); + ccb->ccb_xs = NULL; + ccb->ccb_data = NULL; + } + + ciss_put_ccb(ccb); + + if (xs) { + xs->resid = 0; + xs->flags |= ITSDONE; + CISS_DPRINTF(CISS_D_CMD, ("scsi_done(%p) ", xs)); + scsi_done(xs); + } + CISS_UNLOCK(sc, lock); + + return error; +} + +int +ciss_error(struct ciss_ccb *ccb) +{ + struct ciss_softc *sc = ccb->ccb_sc; + struct ciss_error *err = &ccb->ccb_err; + struct scsi_xfer *xs = ccb->ccb_xs; + int rv; + + switch ((rv = letoh16(err->cmd_stat))) { + case CISS_ERR_OK: + break; + + case CISS_ERR_INVCMD: + printf("%s: invalid cmd 0x%x: 0x%x is not valid @ 0x%x[%d]\n", + sc->sc_dev.dv_xname, ccb->ccb_cmd.id, + err->err_info, err->err_type[3], err->err_type[2]); + if (xs) { + bzero(&xs->sense, sizeof(xs->sense)); + xs->sense.error_code = SSD_ERRCODE_VALID | 0x70; + xs->sense.flags = SKEY_ILLEGAL_REQUEST; + xs->sense.add_sense_code = 0x24; /* ill field */ + xs->error = XS_SENSE; + } + break; + + case CISS_ERR_TMO: + xs->error = XS_TIMEOUT; + break; + + default: + if (xs) { + switch (err->scsi_stat) { + case SCSI_CHECK: + xs->error = XS_SENSE; + bcopy(&err->sense[0], &xs->sense, + sizeof(xs->sense)); + break; + + case SCSI_BUSY: + xs->error = XS_BUSY; + break; + + default: + printf("%s: cmd_stat %x scsi_stat 0x%x\n", + sc->sc_dev.dv_xname, rv, err->scsi_stat); + xs->error = XS_DRIVER_STUFFUP; + break; + } + xs->resid = letoh32(err->resid); + } + } + ccb->ccb_cmd.id &= htole32(~3); + + return rv; +} + +int +ciss_inq(struct ciss_softc *sc, struct ciss_inquiry *inq) +{ + struct ciss_ccb *ccb; + struct ciss_cmd *cmd; + + inq = sc->scratch; + ccb = ciss_get_ccb(sc); + ccb->ccb_len = sizeof(*inq); + ccb->ccb_data = inq; + cmd = &ccb->ccb_cmd; + cmd->tgt = htole32(CISS_CMD_MODE_PERIPH); + cmd->tgt2 = 0; + cmd->cdblen = 10; + cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL | CISS_CDB_IN; + cmd->tmo = htole16(0); + bzero(&cmd->cdb[0], sizeof(cmd->cdb)); + cmd->cdb[0] = CISS_CMD_CTRL_GET; + cmd->cdb[6] = CISS_CMS_CTRL_CTRL; + cmd->cdb[7] = sizeof(*inq) >> 8; /* biiiig endian */ + cmd->cdb[8] = sizeof(*inq) & 0xff; + + return ciss_cmd(ccb, BUS_DMA_NOWAIT, SCSI_POLL|SCSI_NOSLEEP); +} + +int +ciss_ldmap(struct ciss_softc *sc) +{ + struct ciss_ccb *ccb; + struct ciss_cmd *cmd; + struct ciss_ldmap *lmap; + int total, error; + + lmap = sc->scratch; + lmap->size = htobe32(sc->maxunits * sizeof(lmap->map)); + total = sizeof(*lmap) + (sc->maxunits - 1) * sizeof(lmap->map); + ccb = ciss_get_ccb(sc); + ccb->ccb_len = total; + ccb->ccb_data = lmap; + cmd = &ccb->ccb_cmd; + cmd->tgt = CISS_CMD_MODE_PERIPH; + cmd->tgt2 = 0; + cmd->cdblen = 12; + cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL | CISS_CDB_IN; + cmd->tmo = htole16(30); + bzero(&cmd->cdb[0], sizeof(cmd->cdb)); + cmd->cdb[0] = CISS_CMD_LDMAP; + cmd->cdb[8] = total >> 8; /* biiiig endian */ + cmd->cdb[9] = total & 0xff; + + if ((error = ciss_cmd(ccb, BUS_DMA_NOWAIT, SCSI_POLL|SCSI_NOSLEEP))) + return error; + +printf("lmap %x:%x ", lmap->map[0].tgt, lmap->map[0].tgt2); + + return 0; +} + +int +ciss_sync(struct ciss_softc *sc) /* TODO */ +{ +#if 0 + struct ciss_ccb *ccb; + struct ciss_cmd *cmd; + + inq = sc->scratch; + ccb = ciss_get_ccb(sc); + ccb->ccb_len = sizeof(*inq); + ccb->ccb_data = inq; + cmd = &ccb->ccb_cmd; + cmd->tgt = CISS_CMD_MODE_PERIPH; + cmd->tgt2 = 0; + cmd->cdblen = 10; + cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL | CISS_CDB_IN; + cmd->tmo = 0; + bzero(&cmd->cdb[0], sizeof(cmd->cdb)); + cmd->cdb[0] = CISS_CMD_CTRL_GET; + cmd->cdb[6] = CISS_CMS_CTRL_CTRL; + cmd->cdb[7] = sizeof(*inq) >> 8; /* biiiig endian */ + cmd->cdb[8] = sizeof(*inq) & 0xff; + + return ciss_cmd(ccb, BUS_DMA_NOWAIT, SCSI_POLL|SCSI_NOSLEEP); +#else + return 0; +#endif +} + +int +ciss_scsi_raw_cmd(struct scsi_xfer *xs) /* TODO */ +{ + struct scsi_link *link = xs->sc_link; + struct ciss_rawsoftc *rsc = link->adapter_softc; + struct ciss_softc *sc = rsc->sc_softc; + struct ciss_ccb *ccb; + struct ciss_cmd *cmd; + ciss_lock_t lock; + int error; + + CISS_DPRINTF(CISS_D_CMD, ("ciss_scsi_raw_cmd ")); + + if (xs->cmdlen > CISS_MAX_CDB) { + CISS_DPRINTF(CISS_D_CMD, ("CDB too big %p ", xs)); + bzero(&xs->sense, sizeof(xs->sense)); + xs->sense.error_code = SSD_ERRCODE_VALID | 0x70; + xs->sense.flags = SKEY_ILLEGAL_REQUEST; + xs->sense.add_sense_code = 0x20; /* illcmd, 0x24 illfield */ + xs->error = XS_SENSE; + scsi_done(xs); + return (COMPLETE); + } + + lock = CISS_LOCK(sc); + error = 0; + xs->error = XS_NOERROR; + + /* TODO check this target has not yet employed w/ any volume */ + + ccb = ciss_get_ccb(sc); + cmd = &ccb->ccb_cmd; + ccb->ccb_len = xs->datalen; + ccb->ccb_data = xs->data; + ccb->ccb_xs = xs; + + + cmd->cdblen = xs->cmdlen; + cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL; + if (xs->flags & SCSI_DATA_IN) + cmd->flags |= CISS_CDB_IN; + else if (xs->flags & SCSI_DATA_OUT) + cmd->flags |= CISS_CDB_OUT; + cmd->tmo = xs->timeout < 1000? 1 : xs->timeout / 1000; + bzero(&cmd->cdb[0], sizeof(cmd->cdb)); + bcopy(xs->cmd, &cmd->cdb[0], CISS_MAX_CDB); + + if (ciss_cmd(ccb, BUS_DMA_WAITOK, + xs->flags & (SCSI_POLL|SCSI_NOSLEEP))) { + xs->error = XS_DRIVER_STUFFUP; + scsi_done(xs); + CISS_UNLOCK(sc, lock); + return (COMPLETE); + } + + CISS_UNLOCK(sc, lock); + return xs->flags & SCSI_POLL? COMPLETE : SUCCESSFULLY_QUEUED; +} + +int +ciss_scsi_cmd(struct scsi_xfer *xs) +{ + struct scsi_link *link = xs->sc_link; + struct ciss_softc *sc = link->adapter_softc; + u_int8_t target = link->target; + struct ciss_ccb *ccb; + struct ciss_cmd *cmd; + int error; + ciss_lock_t lock; + + CISS_DPRINTF(CISS_D_CMD, ("ciss_scsi_cmd ")); + + if (xs->cmdlen > CISS_MAX_CDB) { + CISS_DPRINTF(CISS_D_CMD, ("CDB too big %p ", xs)); + bzero(&xs->sense, sizeof(xs->sense)); + xs->sense.error_code = SSD_ERRCODE_VALID | 0x70; + xs->sense.flags = SKEY_ILLEGAL_REQUEST; + xs->sense.add_sense_code = 0x20; /* illcmd, 0x24 illfield */ + xs->error = XS_SENSE; + scsi_done(xs); + return (COMPLETE); + } + + lock = CISS_LOCK(sc); + error = 0; + xs->error = XS_NOERROR; + + ccb = ciss_get_ccb(sc); + cmd = &ccb->ccb_cmd; + ccb->ccb_len = xs->datalen; + ccb->ccb_data = xs->data; + ccb->ccb_xs = xs; + cmd->tgt = CISS_CMD_MODE_LD | target; + cmd->tgt2 = 0; + cmd->cdblen = xs->cmdlen; + cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL; + if (xs->flags & SCSI_DATA_IN) + cmd->flags |= CISS_CDB_IN; + else if (xs->flags & SCSI_DATA_OUT) + cmd->flags |= CISS_CDB_OUT; + cmd->tmo = xs->timeout < 1000? 1 : xs->timeout / 1000; + bzero(&cmd->cdb[0], sizeof(cmd->cdb)); + bcopy(xs->cmd, &cmd->cdb[0], CISS_MAX_CDB); + + if (ciss_cmd(ccb, BUS_DMA_WAITOK, + xs->flags & (SCSI_POLL|SCSI_NOSLEEP))) { + xs->error = XS_DRIVER_STUFFUP; + scsi_done(xs); + CISS_UNLOCK(sc, lock); + return (COMPLETE); + } + + CISS_UNLOCK(sc, lock); + return xs->flags & SCSI_POLL? COMPLETE : SUCCESSFULLY_QUEUED; +} + +int +ciss_intr(void *v) +{ + struct ciss_softc *sc = v; + struct ciss_ccb *ccb; + ciss_lock_t lock; + u_int32_t id; + int hit = 0; + + CISS_DPRINTF(CISS_D_INTR, ("intr ")); + + if (!(bus_space_read_4(sc->iot, sc->ioh, CISS_ISR) & sc->iem)) + return 0; + + lock = CISS_LOCK(sc); + while ((id = bus_space_read_4(sc->iot, sc->ioh, CISS_OUTQ)) != + 0xffffffff) { + + ccb = sc->ccbs + (id >> 2) * sc->ccblen; + ccb->ccb_cmd.id = htole32(id); + if (ccb->ccb_state == CISS_CCB_POLL) { + ccb->ccb_state = CISS_CCB_ONQ; + wakeup(ccb); + } else + ciss_done(ccb); + + hit = 1; + } + CISS_UNLOCK(sc, lock); + + CISS_DPRINTF(CISS_D_INTR, ("exit ")); + return hit; +} + +void +ciss_heartbeat(void *v) +{ + struct ciss_softc *sc = v; + u_int32_t hb; + + hb = bus_space_read_4(sc->iot, sc->cfg_ioh, + sc->cfgoff + offsetof(struct ciss_config, heartbeat)); + if (hb == sc->heartbeat) + panic("ciss: dead"); /* XX reset! */ + else + sc->heartbeat = hb; + + timeout_add(&sc->sc_hb, hz * 3); +} + +void +ciss_kthread(void *v) +{ + struct ciss_softc *sc = v; + ciss_lock_t lock; + + for (;;) { + tsleep(sc, PRIBIO, sc->sc_dev.dv_xname, 0); + + lock = CISS_LOCK(sc); + + + + CISS_UNLOCK(sc, lock); + } +} + +int +ciss_scsi_ioctl(struct scsi_link *link, u_long cmd, + caddr_t addr, int flag, struct proc *p) +{ +#if NBIO > 0 + return ciss_ioctl(link->adapter_softc, cmd, addr); +#else + return ENOTTY; +#endif +} + +#if NBIO > 0 +int +ciss_ioctl(struct device *dev, u_long cmd, caddr_t addr) /* TODO */ +{ + struct ciss_softc *sc = (struct ciss_softc *)dev; + int error; + + switch (cmd) { + case BIOCPING: + case BIOCCAPABILITIES: + case BIOCALARM: + case BIOCBLINK: + case BIOCSTARTSTOP: + case BIOCSTATUS: + case BIOCSCSICMD: + default: + CISS_DPRINTF(CISS_D_IOCTL, ("%s: invalid ioctl\n", + sc->sc_dev.dv_xname)); + error = ENOTTY; + } + + return error; +} +#endif diff --git a/sys/dev/ic/cissreg.h b/sys/dev/ic/cissreg.h new file mode 100644 index 00000000000..81516ac9b0c --- /dev/null +++ b/sys/dev/ic/cissreg.h @@ -0,0 +1,210 @@ +/* $OpenBSD: cissreg.h,v 1.1 2005/07/06 01:52:13 mickey Exp $ */ + +/* + * Copyright (c) 2005 Michael Shalayeff + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN + * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#define CISS_IDB 0x20 +#define CISS_IDB_CFG 0x01 +#define CISS_ISR 0x30 +#define CISS_IMR 0x34 +#define CISS_READYENAB 4 +#define CISS_READYENA 8 +#define CISS_INQ 0x40 +#define CISS_OUTQ 0x44 +#define CISS_CFG_BAR 0xb4 +#define CISS_CFG_OFF 0xb8 + +#define CISS_DRVMAP_SIZE (128 / 8) + +#define CISS_CMD_CTRL_GET 0x26 +#define CISS_CMD_CTRL_SET 0x27 +/* sub-commands for GET/SET */ +#define CISS_CMS_CTRL_LDID 0x10 +#define CISS_CMS_CTRL_CTRL 0x11 +#define CISS_CMS_CTRL_LDSTAT 0x12 +#define CISS_CMS_CTRL_PDID 0x15 +#define CISS_CMS_CTRL_PDBLINK 0x16 +#define CISS_CMS_CTRL_PDBLSENS 0x17 +#define CISS_CMS_CTRL_FLUSH 0xc2 +#define CISS_CMS_CTRL_ACCEPT 0xe0 + +#define CISS_CMD_LDMAP 0xc2 +#define CISS_CMD_PDMAP 0xc3 + +struct ciss_softc; + +struct ciss_config { + u_int32_t signature; +#define CISS_SIGNATURE (*(u_int32_t *)"CISS") + u_int32_t version; +#define CISS_VERSION 1 + u_int32_t methods; +#define CISS_METH_READY 0x0001 +#define CISS_METH_SIMPL 0x0002 +#define CISS_METH_PERF 0x0004 +#define CISS_METH_EMQ 0x0008 + u_int32_t amethod; + u_int32_t rmethod; + u_int32_t paddr_lim; + u_int32_t int_delay; + u_int32_t int_count; + u_int32_t maxcmd; + u_int32_t scsibus; +#define CISS_BUS_U2 0x0001 +#define CISS_BUS_U3 0x0002 +#define CISS_BUS_FC1 0x0100 +#define CISS_BUS_FC2 0x0200 + u_int32_t troff; + u_int8_t hostname[16]; + u_int32_t heartbeat; + u_int32_t driverf; +#define CISS_DRV_UATT 0x0001 +#define CISS_DRV_QINI 0x0002 +#define CISS_DRV_LCKINT 0x0004 +#define CISS_DRV_QTAGS 0x0008 +#define CISS_DRV_ALPHA 0x0010 +#define CISS_DRV_LUNS 0x0020 +#define CISS_DRV_MSGRQ 0x0080 +#define CISS_DRV_DBRD 0x0100 +#define CISS_DRV_PRF 0x0200 + u_int32_t maxsg; +} __packed; + +struct ciss_inquiry { + u_int8_t numld; + u_int8_t sign[4]; + u_int8_t fw_running[4]; + u_int8_t fw_stored[4]; + u_int8_t hw_rev; + u_int8_t resv0[12]; + u_int16_t pci_vendor; + u_int16_t pci_product; + u_int8_t resv1[10]; + u_int8_t market_rev; + u_int8_t flags; +#define CISS_INQ_WIDE 0x08 +#define CISS_INQ_BIGMAP 0x80 +#define CISS_INQ_BITS "\020\04WIDE\010BIGMAP" + u_int8_t resv2[2]; + u_int8_t nscsi_bus; + u_int8_t resv3[4]; + u_int8_t clk[4]; /* unaligned dumbness */ + u_int8_t buswidth; + u_int8_t disks[CISS_DRVMAP_SIZE]; + u_int8_t extdisks[CISS_DRVMAP_SIZE]; + u_int8_t nondisks[CISS_DRVMAP_SIZE]; +} __packed; + +struct ciss_ldmap { + u_int32_t size; + u_int32_t resv; + struct { + u_int32_t tgt; + u_int32_t tgt2; + } map[1]; +} __packed; + +struct ciss_cmd { + u_int8_t resv0; /* 00 */ + u_int8_t sgin; /* 01: #sg in the cmd */ + u_int16_t sglen; /* 02: #sg total */ + u_int32_t id; /* 04: cmd id << 2 and status bits */ +#define CISS_CMD_ERR 0x02 + u_int32_t id_hi; /* 08: not used */ + u_int32_t tgt; /* 0c: tgt:bus:mode or lun:mode */ +#define CISS_CMD_MODE_PERIPH 0x00000000 +#define CISS_CMD_MODE_LD 0x40000000 +#define CISS_CMD_TGT_MASK 0x40ffffff +#define CISS_CMD_BUS_MASK 0x3f000000 +#define CISS_CMD_BUS_SHIFT 24 + u_int32_t tgt2; /* 10: scsi-3 address bytes */ + + u_int8_t cdblen; /* 14: valid length of cdb */ + u_int8_t flags; /* 15 */ +#define CISS_CDB_CMD 0x00 +#define CISS_CDB_MSG 0x01 +#define CISS_CDB_NOTAG 0x00 +#define CISS_CDB_SIMPL 0x20 +#define CISS_CDB_QHEAD 0x28 +#define CISS_CDB_ORDR 0x30 +#define CISS_CDB_AUTO 0x38 +#define CISS_CDB_IN 0x80 +#define CISS_CDB_OUT 0x40 + u_int16_t tmo; /* 16: timeout in seconds */ +#define CISS_MAX_CDB 12 + u_int8_t cdb[16];/* 18 */ + + u_int64_t err_pa; /* 28: pa(struct ciss_error *) */ + u_int32_t err_len;/* 30 */ + + struct { /* 34 */ + u_int32_t addr_lo; + u_int32_t addr_hi; + u_int32_t len; + u_int32_t flags; +#define CISS_SG_EXT 0x0001 + } sgl[1]; +} __packed; + +struct ciss_error { + u_int8_t scsi_stat; /* SCSI_OK etc */ + u_int8_t senselen; + u_int16_t cmd_stat; +#define CISS_ERR_OK 0 +#define CISS_ERR_TGTST 1 /* target status */ +#define CISS_ERR_UNRUN 2 +#define CISS_ERR_OVRUN 3 +#define CISS_ERR_INVCMD 4 +#define CISS_ERR_PROTE 5 +#define CISS_ERR_HWERR 6 +#define CISS_ERR_CLOSS 7 +#define CISS_ERR_ABRT 8 +#define CISS_ERR_FABRT 9 +#define CISS_ERR_UABRT 10 +#define CISS_ERR_TMO 11 +#define CISS_ERR_NABRT 12 + u_int32_t resid; + u_int8_t err_type[4]; + u_int32_t err_info; + u_int8_t sense[32]; +} __packed; + +struct ciss_ccb { + TAILQ_ENTRY(ciss_ccb) ccb_link; + struct ciss_softc *ccb_sc; + paddr_t ccb_cmdpa; + enum { + CISS_CCB_FREE = 0x01, + CISS_CCB_READY = 0x02, + CISS_CCB_ONQ = 0x04, + CISS_CCB_PREQ = 0x08, + CISS_CCB_POLL = 0x10, + CISS_CCB_FAIL = 0x80 +#define CISS_CCB_BITS "\020\01FREE\02READY\03ONQ\04PREQ\05POLL\010FAIL" + } ccb_state; + + struct scsi_xfer *ccb_xs; + size_t ccb_len; + void *ccb_data; + bus_dmamap_t ccb_dmamap; + + struct ciss_error ccb_err; + struct ciss_cmd ccb_cmd; /* followed by sgl */ +}; + +typedef TAILQ_HEAD(ciss_queue_head, ciss_ccb) ciss_queue_head; + diff --git a/sys/dev/ic/cissvar.h b/sys/dev/ic/cissvar.h new file mode 100644 index 00000000000..85ba61730a8 --- /dev/null +++ b/sys/dev/ic/cissvar.h @@ -0,0 +1,59 @@ +/* $OpenBSD: cissvar.h,v 1.1 2005/07/06 01:52:13 mickey Exp $ */ + +/* + * Copyright (c) 2005 Michael Shalayeff + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN + * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +struct ciss_softc { + struct device sc_dev; + struct scsi_link sc_link; + struct scsi_link *sc_link_raw; + struct timeout sc_hb; + void *sc_ih; + void *sc_sh; + struct proc *sc_thread; + + u_int sc_flags; + int ccblen, maxcmd, maxsg, nbus, ndrives, maxunits; + ciss_queue_head sc_free_ccb, sc_ccbq, sc_ccbdone; + + bus_space_tag_t iot; + bus_space_handle_t ioh, cfg_ioh; + bus_dma_tag_t dmat; + bus_dmamap_t cmdmap; + bus_dma_segment_t cmdseg[1]; + void *ccbs; + void *scratch; + + struct ciss_config cfg; + int cfgoff; + u_int32_t iem; + u_int32_t heartbeat; +}; + +struct ciss_rawsoftc { + struct scsi_link sc_link; + struct ciss_softc *sc_softc; + u_int8_t sc_channel; +}; + +/* XXX These have to become spinlocks in case of SMP */ +#define CISS_LOCK(sc) splbio() +#define CISS_UNLOCK(sc, lock) splx(lock) +typedef int ciss_lock_t; + +int ciss_attach(struct ciss_softc *sc); +int ciss_intr(void *v); diff --git a/sys/dev/pci/ciss_pci.c b/sys/dev/pci/ciss_pci.c new file mode 100644 index 00000000000..81e2a975114 --- /dev/null +++ b/sys/dev/pci/ciss_pci.c @@ -0,0 +1,164 @@ +/* $OpenBSD: ciss_pci.c,v 1.1 2005/07/06 01:52:13 mickey Exp $ */ + +/* + * Copyright (c) 2005 Michael Shalayeff + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN + * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/malloc.h> +#include <sys/device.h> + +#include <dev/pci/pcidevs.h> +#include <dev/pci/pcivar.h> + +#include <machine/bus.h> + +#include <scsi/scsi_all.h> +#include <scsi/scsi_disk.h> +#include <scsi/scsiconf.h> + +#include <dev/ic/cissreg.h> +#include <dev/ic/cissvar.h> + +#define CISS_BAR 0x10 + +int ciss_pci_find_device(void *); +int ciss_pci_match(struct device *, void *, void *); +void ciss_pci_attach(struct device *, struct device *, void *); + +struct cfattach ciss_pci_ca = { + sizeof(struct ciss_softc), ciss_pci_match, ciss_pci_attach +}; + +const struct pci_matchid ciss_pci_devices[] = { + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA532 }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5300 }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5300_2 }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5312 }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5i }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5i_2 }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA641 }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA642 }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6400 }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6400EM }, + { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6422 }, + { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAV100 }, + { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP800 }, + { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP600 }, + { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE400 }, +}; +#define CISS_PCI_NDEVS sizeof(ciss_pci_devices)/sizeof(ciss_pci_devices[0]) + +int +ciss_pci_match(struct device *parent, void *match, void *aux) +{ + struct pci_attach_args *pa = aux; + + return pci_matchbyid(pa, ciss_pci_devices, CISS_PCI_NDEVS); +} + +void +ciss_pci_attach(struct device *parent, struct device *self, void *aux) +{ + struct ciss_softc *sc = (struct ciss_softc *)self; + struct pci_attach_args *pa = aux; + bus_size_t size, cfgsz; + pci_intr_handle_t ih; + const char *intrstr; + int cfg_bar; + + if (pci_mapreg_map(pa, CISS_BAR, PCI_MAPREG_TYPE_MEM, 0, + &sc->iot, &sc->ioh, NULL, &size, 0)) { + printf(": can't map controller i/o space\n"); + return; + } + sc->dmat = pa->pa_dmat; + + sc->iem = CISS_READYENA; + if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_COMPAQ && + (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPAQ_CSA5i || + PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPAQ_CSA532 || + PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPAQ_CSA5312)) + sc->iem = CISS_READYENAB; + + cfg_bar = bus_space_read_2(sc->iot, sc->ioh, CISS_CFG_BAR); + sc->cfgoff = bus_space_read_4(sc->iot, sc->ioh, CISS_CFG_OFF); + if (cfg_bar != CISS_BAR) { + if (pci_mapreg_map(pa, cfg_bar, PCI_MAPREG_TYPE_MEM, 0, + NULL, &sc->cfg_ioh, NULL, &cfgsz, 0)) { + printf(": can't map controller config space\n"); + bus_space_unmap(sc->iot, sc->ioh, size); + return; + } + } else { + sc->cfg_ioh = sc->ioh; + cfgsz = size; + } + + if (sc->cfgoff + sizeof(struct ciss_config) > cfgsz) { + printf(": unfit config space\n"); + bus_space_unmap(sc->iot, sc->ioh, size); + if (cfg_bar != CISS_BAR) + bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz); + return; + } + + /* disable interrupts until ready */ + bus_space_write_4(sc->iot, sc->ioh, CISS_IMR, + bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) | sc->iem); + + /* enable bus mastering (should not it be mi?) */ + pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, + pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | + PCI_COMMAND_MASTER_ENABLE); + + if (pci_intr_map(pa, &ih)) { + printf(": can't map interrupt\n"); + bus_space_unmap(sc->iot, sc->ioh, size); + if (cfg_bar != CISS_BAR) + bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz); + return; + } + intrstr = pci_intr_string(pa->pa_pc, ih); + sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ciss_intr, sc, + sc->sc_dev.dv_xname); + if (!sc->sc_ih) { + printf(": can't establish interrupt"); + if (intrstr) + printf(" at %s", intrstr); + printf("\n"); + bus_space_unmap(sc->iot, sc->ioh, size); + if (cfg_bar != CISS_BAR) + bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz); + } + + printf(": %s\n%s", intrstr, sc->sc_dev.dv_xname); + + if (ciss_attach(sc)) { + pci_intr_disestablish(pa->pa_pc, sc->sc_ih); + sc->sc_ih = NULL; + bus_space_unmap(sc->iot, sc->ioh, size); + if (cfg_bar != CISS_BAR) + bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz); + return; + } + + /* enable interrupts now */ + bus_space_write_4(sc->iot, sc->ioh, CISS_IMR, + bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) & ~sc->iem); +} diff --git a/sys/dev/pci/files.pci b/sys/dev/pci/files.pci index 2441a6248e6..141d37ba316 100644 --- a/sys/dev/pci/files.pci +++ b/sys/dev/pci/files.pci @@ -1,4 +1,4 @@ -# $OpenBSD: files.pci,v 1.178 2005/05/27 02:13:51 martin Exp $ +# $OpenBSD: files.pci,v 1.179 2005/07/06 01:52:13 mickey Exp $ # $NetBSD: files.pci,v 1.20 1996/09/24 17:47:15 christos Exp $ # # Config file and device description for machine-independent PCI code. @@ -163,6 +163,10 @@ file dev/ic/aac.c aac attach cac at pci with cac_pci file dev/pci/cac_pci.c cac_pci +# Compaq Smart ARRAY 5* Controllers +attach ciss at pci with ciss_pci +file dev/pci/ciss_pci.c ciss_pci + # Qlogic ISP 10x0 (PCI) family # device declaration in sys/conf/files attach isp at pci with isp_pci |