diff options
| -rw-r--r-- | sys/dev/pci/pciide.c | 54 |
1 files changed, 30 insertions, 24 deletions
diff --git a/sys/dev/pci/pciide.c b/sys/dev/pci/pciide.c index 18207613f78..740e36d1419 100644 --- a/sys/dev/pci/pciide.c +++ b/sys/dev/pci/pciide.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pciide.c,v 1.40 2001/01/08 19:54:09 jeremy Exp $ */ +/* $OpenBSD: pciide.c,v 1.41 2001/01/18 22:09:12 chris Exp $ */ /* $NetBSD: pciide.c,v 1.48 1999/11/28 20:05:18 bouyer Exp $ */ /* @@ -2009,27 +2009,29 @@ apollo_chip_map(sc, pa) old_udma_conf), DEBUG_PROBE); - pci_conf_write(sc->sc_pc, sc->sc_tag, - old_udma_conf | (APO_UDMA_PIO_MODE(0, 0) | APO_UDMA_EN(0, 0) | - APO_UDMA_EN_MTH(0, 0) | APO_UDMA_CLK66(0)), - APO_UDMA); - udma_conf = pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA); - WDCDEBUG_PRINT(("apollo_chip_map: APO_UDMA now 0x%x\n", udma_conf), - DEBUG_PROBE); - if ((udma_conf & (APO_UDMA_PIO_MODE(0, 0) | APO_UDMA_EN(0, 0) | - APO_UDMA_EN_MTH(0, 0))) == - (APO_UDMA_PIO_MODE(0, 0) | APO_UDMA_EN(0, 0) | - APO_UDMA_EN_MTH(0, 0))) { - if ((udma_conf & APO_UDMA_CLK66(0)) == - APO_UDMA_CLK66(0)) { - printf("%s: Ultra/66 capable\n", - sc->sc_wdcdev.sc_dev.dv_xname); - sc->sc_wdcdev.UDMA_cap = 4; + if (rev >= 6) { + pci_conf_write(sc->sc_pc, sc->sc_tag, + old_udma_conf | (APO_UDMA_PIO_MODE(0, 0) | APO_UDMA_EN(0, 0) + | APO_UDMA_EN_MTH(0, 0) | APO_UDMA_CLK66(0)), + APO_UDMA); + udma_conf = pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA); + WDCDEBUG_PRINT(("apollo_chip_map: APO_UDMA now 0x%x\n", + udma_conf), DEBUG_PROBE); + if ((udma_conf & (APO_UDMA_PIO_MODE(0, 0) | APO_UDMA_EN(0, 0) | + APO_UDMA_EN_MTH(0, 0))) == + (APO_UDMA_PIO_MODE(0, 0) | APO_UDMA_EN(0, 0) | + APO_UDMA_EN_MTH(0, 0))) { + if ((udma_conf & APO_UDMA_CLK66(0)) == + APO_UDMA_CLK66(0)) { + printf("%s: Ultra/66 capable\n", + sc->sc_wdcdev.sc_dev.dv_xname); + sc->sc_wdcdev.UDMA_cap = 4; + } + } else { + sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_UDMA; } - } else { - sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_UDMA; + pci_conf_write(sc->sc_pc, sc->sc_tag, old_udma_conf, APO_UDMA); } - pci_conf_write(sc->sc_pc, sc->sc_tag, old_udma_conf, APO_UDMA); for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) { cp = &sc->pciide_channels[channel]; @@ -2760,6 +2762,7 @@ acer_chip_map(sc, pa) int channel; pcireg_t cr, interface; bus_size_t cmdsize, ctlsize; + pcireg_t rev = PCI_REVISION(pa->pa_class); if (pciide_chipen(sc, pa) == 0) return; @@ -2767,14 +2770,18 @@ acer_chip_map(sc, pa) printf(": DMA"); pciide_mapreg_dma(sc, pa); - if (sc->sc_dma_ok) - sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA; + if (sc->sc_dma_ok) { + sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA; + if (rev >= 0x20) + sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA; + } sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 | WDC_CAPABILITY_MODE; sc->sc_wdcdev.PIO_cap = 4; sc->sc_wdcdev.DMA_cap = 2; - sc->sc_wdcdev.UDMA_cap = 2; + if (sc->sc_wdcdev.cap & WDC_CAPABILITY_UDMA) + sc->sc_wdcdev.UDMA_cap = 2; sc->sc_wdcdev.set_modes = acer_setup_channel; sc->sc_wdcdev.channels = sc->wdc_chanarray; sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS; @@ -2783,7 +2790,6 @@ acer_chip_map(sc, pa) (pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_CDRC) | ACER_CDRC_DMA_EN) & ~ACER_CDRC_FIFO_DISABLE); - /* Enable "microsoft register bits" R/W. */ pciide_pci_write(sc->sc_pc, sc->sc_tag, ACER_CCAR3, pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_CCAR3) | ACER_CCAR3_PI); |