diff options
| -rw-r--r-- | sys/dev/mii/files.mii | 6 | ||||
| -rw-r--r-- | sys/dev/mii/nsgphy.c | 422 | ||||
| -rw-r--r-- | sys/dev/mii/nsgphyreg.h | 169 |
3 files changed, 596 insertions, 1 deletions
diff --git a/sys/dev/mii/files.mii b/sys/dev/mii/files.mii index 3db8a4112f6..3dd46a49b88 100644 --- a/sys/dev/mii/files.mii +++ b/sys/dev/mii/files.mii @@ -1,4 +1,4 @@ -# $OpenBSD: files.mii,v 1.16 2001/04/13 00:25:02 mjacob Exp $ +# $OpenBSD: files.mii,v 1.17 2001/06/08 02:19:30 nate Exp $ # $NetBSD: files.mii,v 1.13 1998/11/05 00:36:48 thorpej Exp $ file dev/mii/mii.c mii @@ -92,3 +92,7 @@ file dev/mii/xmphy.c xmphy device amphy: mii_phy attach amphy at mii file dev/mii/amphy.c amphy + +device nsgphy: mii_phy +attach nsgphy at mii +file dev/mii/nsgphy.c nsgphy diff --git a/sys/dev/mii/nsgphy.c b/sys/dev/mii/nsgphy.c new file mode 100644 index 00000000000..42c410b06df --- /dev/null +++ b/sys/dev/mii/nsgphy.c @@ -0,0 +1,422 @@ +/* $OpenBSD: nsgphy.c,v 1.1 2001/06/08 02:19:30 nate Exp $ */ +/* + * Copyright (c) 2001 Wind River Systems + * Copyright (c) 2001 + * Bill Paul <wpaul@bsdi.com>. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Bill Paul. + * 4. Neither the name of the author nor the names of any co-contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * Driver for the National Semiconductor DP83891 and DP83861 + * 10/100/1000 PHYs. + * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf + * + * The DP83891 is the older NatSemi gigE PHY which isn't being sold + * anymore. The DP83861 is its replacement, which is an 'enhanced' + * firmware driven component. The major difference between the + * two is that the 83891 can't generate interrupts, while the + * 83861 can. (I think it wasn't originally designed to do this, but + * it can now thanks to firmware updates.) The 83861 also allows + * access to its internal RAM via indirect register access. + */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/device.h> +#include <sys/malloc.h> +#include <sys/socket.h> + +#include <net/if.h> +#include <net/if_media.h> + +#include <dev/mii/mii.h> +#include <dev/mii/miivar.h> +#include <dev/mii/miidevs.h> + +#include <dev/mii/nsgphyreg.h> + +int nsgphymatch __P((struct device*, void *, void *)); +void nsgphyattach __P((struct device *, struct device *, void *)); + +struct cfattach nsgphy_ca = { + sizeof(struct mii_softc), nsgphymatch, nsgphyattach, mii_phy_detach, + mii_phy_activate +}; + +struct cfdriver nsgphy_cd = { + NULL, "nsgphy", DV_DULL +}; + +int nsgphy_service __P((struct mii_softc *, struct mii_data *, int)); +void nsgphy_status __P((struct mii_softc *)); + +static int nsgphy_mii_phy_auto __P((struct mii_softc *, int)); +extern void mii_phy_auto_timeout __P((void *)); + +int + +nsgphymatch(parent, match, aux) + struct device *parent; + void *match; + void *aux; +{ + struct mii_attach_args *ma = aux; + + if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_NATSEMI && + (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83891 || + MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83861)) + return (10); + + return (0); +} + +void +nsgphyattach(parent, self, aux) + struct device *parent; + struct device *self; + void *aux; +{ + struct mii_softc *sc = (struct mii_softc *)self; + struct mii_attach_args *ma = aux; + struct mii_data *mii = ma->mii_data; + + printf(": %s, rev. %d\n", MII_STR_NATSEMI_DP83861, + MII_REV(ma->mii_id2)); + + sc->mii_inst = mii->mii_instance; + sc->mii_phy = ma->mii_phyno; + sc->mii_service = nsgphy_service; + sc->mii_status = nsgphy_status; + sc->mii_pdata = mii; + sc->mii_flags = mii->mii_flags; + + mii_phy_reset(sc); + + sc->mii_capabilities = + PHY_READ(sc, MII_BMSR) & ma->mii_capmask; + if (sc->mii_capabilities & BMSR_EXTSTAT) + sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); + printf("%s: ", sc->mii_dev.dv_xname); + if ((sc->mii_capabilities & BMSR_MEDIAMASK) || + (sc->mii_extcapabilities & EXTSR_MEDIAMASK)) + mii_phy_add_media(sc); + +#if 0 + strap = PHY_READ(sc, MII_GPHYTER_STRAP); + printf("%s: strapped to %s mode", sc->mii_dev.dv_xname, + (strap & STRAP_MS_VAL) ? "master" : "slave"); + if (strap & STRAP_NC_MODE) + printf(", pre-C5 BCM5400 compat enabled"); + printf("\n"); +#endif + +#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) + + ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), + BMCR_ISO); + ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0, sc->mii_inst), + NSGPHY_S1000); + ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX, sc->mii_inst), + NSGPHY_S1000|NSGPHY_BMCR_FDX); + ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, + sc->mii_inst), BMCR_LOOP|BMCR_S100); + +#undef ADD +} + +int +nsgphy_service(sc, mii, cmd) + struct mii_softc *sc; + struct mii_data *mii; + int cmd; +{ + struct ifmedia_entry *ife = mii->mii_media.ifm_cur; + int reg; + + if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0) + return (ENXIO); + + switch (cmd) { + case MII_POLLSTAT: + /* + * If we're not polling our PHY instance, just return. + */ + if (IFM_INST(ife->ifm_media) != sc->mii_inst) + return (0); + break; + + case MII_MEDIACHG: + /* + * If the media indicates a different PHY instance, + * isolate ourselves. + */ + if (IFM_INST(ife->ifm_media) != sc->mii_inst) { + reg = PHY_READ(sc, MII_BMCR); + PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); + return (0); + } + + /* + * If the interface is not up, don't do anything. + */ + if ((mii->mii_ifp->if_flags & IFF_UP) == 0) + break; + + switch (IFM_SUBTYPE(ife->ifm_media)) { + case IFM_AUTO: + (void) nsgphy_mii_phy_auto(sc, 0); + break; + case IFM_1000_TX: + if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { + PHY_WRITE(sc, NSGPHY_MII_BMCR, + NSGPHY_BMCR_FDX|NSGPHY_BMCR_SPD1); + } else { + PHY_WRITE(sc, NSGPHY_MII_BMCR, + NSGPHY_BMCR_SPD1); + } + PHY_WRITE(sc, NSGPHY_MII_ANAR, NSGPHY_SEL_TYPE); + + /* + * When setting the link manually, one side must + * be the master and the other the slave. However + * ifmedia doesn't give us a good way to specify + * this, so we fake it by using one of the LINK + * flags. If LINK0 is set, we program the PHY to + * be a master, otherwise it's a slave. + */ + if ((mii->mii_ifp->if_flags & IFF_LINK0)) { + PHY_WRITE(sc, NSGPHY_MII_1000CTL, + NSGPHY_1000CTL_MSE|NSGPHY_1000CTL_MSC); + } else { + PHY_WRITE(sc, NSGPHY_MII_1000CTL, + NSGPHY_1000CTL_MSE); + } + break; + case IFM_100_T4: + /* + * XXX Not supported as a manual setting right now. + */ + return (EINVAL); + case IFM_NONE: + PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); + break; + default: + /* + * BMCR data is stored in the ifmedia entry. + */ + PHY_WRITE(sc, MII_ANAR, + mii_anar(ife->ifm_media)); + PHY_WRITE(sc, MII_BMCR, ife->ifm_data); + break; + } + break; + + case MII_TICK: + /* + * If we're not currently selected, just return. + */ + if (IFM_INST(ife->ifm_media) != sc->mii_inst) + return (0); + + /* + * Only used for autonegotiation. + */ + if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) + return (0); + + /* + * Is the interface even up? + */ + if ((mii->mii_ifp->if_flags & IFF_UP) == 0) + return (0); + + /* + * Only retry autonegotiation every 5 seconds. + * Actually, for gigE PHYs, we should wait longer, since + * 5 seconds is the mimimum time the documentation + * says to wait for a 1000mbps link to be established. + */ + if (++sc->mii_ticks != 10) + return (0); + + sc->mii_ticks = 0; + + /* + * Check to see if we have link. + */ + reg = PHY_READ(sc, NSGPHY_MII_PHYSUP); + if (reg & NSGPHY_PHYSUP_LNKSTS) + break; + + mii_phy_reset(sc); + if (nsgphy_mii_phy_auto(sc, 0) == EJUSTRETURN) + return(0); + break; + case MII_DOWN: + mii_phy_down(sc); + return (0); + } + + /* Update the media status. */ + mii_phy_status(sc); + + /* Callback if something changed. */ + mii_phy_update(sc, cmd); + return (0); +} + +void +nsgphy_status(sc) + struct mii_softc *sc; +{ + struct mii_data *mii = sc->mii_pdata; + int bmsr, bmcr, physup, anlpar, gstat; + + mii->mii_media_status = IFM_AVALID; + mii->mii_media_active = IFM_ETHER; + + bmsr = PHY_READ(sc, NSGPHY_MII_BMSR) | PHY_READ(sc, NSGPHY_MII_BMSR); + physup = PHY_READ(sc, NSGPHY_MII_PHYSUP); + if (physup & NSGPHY_PHYSUP_LNKSTS) + mii->mii_media_status |= IFM_ACTIVE; + + bmcr = PHY_READ(sc, NSGPHY_MII_BMCR); + + if (bmcr & NSGPHY_BMCR_LOOP) + mii->mii_media_active |= IFM_LOOP; + + if (bmcr & NSGPHY_BMCR_AUTOEN) { + if ((bmsr & NSGPHY_BMSR_ACOMP) == 0) { + /* Erg, still trying, I guess... */ + mii->mii_media_active |= IFM_NONE; + return; + } + anlpar = PHY_READ(sc, NSGPHY_MII_ANLPAR); + gstat = PHY_READ(sc, NSGPHY_MII_1000STS); + if (gstat & NSGPHY_1000STS_LPFD) + mii->mii_media_active |= IFM_1000_TX|IFM_FDX; + else if (gstat & NSGPHY_1000STS_LPHD) + mii->mii_media_active |= IFM_1000_TX|IFM_HDX; + else if (anlpar & NSGPHY_ANLPAR_100T4) + mii->mii_media_active |= IFM_100_T4; + else if (anlpar & NSGPHY_ANLPAR_100FDX) + mii->mii_media_active |= IFM_100_TX|IFM_FDX; + else if (anlpar & NSGPHY_ANLPAR_100HDX) + mii->mii_media_active |= IFM_100_TX; + else if (anlpar & NSGPHY_ANLPAR_10FDX) + mii->mii_media_active |= IFM_10_T|IFM_FDX; + else if (anlpar & NSGPHY_ANLPAR_10HDX) + mii->mii_media_active |= IFM_10_T|IFM_HDX; + else + mii->mii_media_active |= IFM_NONE; + return; + } + + switch(bmcr & (NSGPHY_BMCR_SPD1|NSGPHY_BMCR_SPD0)) { + case NSGPHY_S1000: + mii->mii_media_active |= IFM_1000_TX; + break; + case NSGPHY_S100: + mii->mii_media_active |= IFM_100_TX; + break; + case NSGPHY_S10: + mii->mii_media_active |= IFM_10_T; + break; + default: + break; + } + + if (bmcr & NSGPHY_BMCR_FDX) + mii->mii_media_active |= IFM_FDX; + else + mii->mii_media_active |= IFM_HDX; + + return; +} + + +static int +nsgphy_mii_phy_auto(mii, waitfor) + struct mii_softc *mii; + int waitfor; +{ + int bmsr, ktcr = 0, i; + + if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { + mii_phy_reset(mii); + PHY_WRITE(mii, NSGPHY_MII_BMCR, 0); + DELAY(1000); + ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL); + PHY_WRITE(mii, NSGPHY_MII_1000CTL, ktcr | + (NSGPHY_1000CTL_AFD|NSGPHY_1000CTL_AHD)); + ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL); + DELAY(1000); + PHY_WRITE(mii, NSGPHY_MII_ANAR, + BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA); + DELAY(1000); + PHY_WRITE(mii, NSGPHY_MII_BMCR, + NSGPHY_BMCR_AUTOEN | NSGPHY_BMCR_STARTNEG); + } + + if (waitfor) { + /* Wait 500ms for it to complete. */ + for (i = 0; i < 500; i++) { + if ((bmsr = PHY_READ(mii, NSGPHY_MII_BMSR)) & + NSGPHY_BMSR_ACOMP) + return (0); + DELAY(1000); +#if 0 + if ((bmsr & BMSR_ACOMP) == 0) + printf("%s: autonegotiation failed to complete\n", + mii->mii_dev.dv_xname); +#endif + } + + /* + * Don't need to worry about clearing MIIF_DOINGAUTO. + * If that's set, a timeout is pending, and it will + * clear the flag. + */ + return (EIO); + } + + /* + * Just let it finish asynchronously. This is for the benefit of + * the tick handler driving autonegotiation. Don't want 500ms + * delays all the time while the system is running! + */ + if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { + mii->mii_flags |= MIIF_DOINGAUTO; + timeout(mii_phy_auto_timeout, mii, hz >> 1); + } + return (EJUSTRETURN); +} diff --git a/sys/dev/mii/nsgphyreg.h b/sys/dev/mii/nsgphyreg.h new file mode 100644 index 00000000000..415d6925e78 --- /dev/null +++ b/sys/dev/mii/nsgphyreg.h @@ -0,0 +1,169 @@ +/* $OpenBSD: nsgphyreg.h,v 1.1 2001/06/08 02:19:30 nate Exp $ */ +/* + * Copyright (c) 2001 Wind River Systems + * Copyright (c) 2001 + * Bill Paul <wpaul@bsdi.com>. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Bill Paul. + * 4. Neither the name of the author nor the names of any co-contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _DEV_MII_NSGPHYREG_H_ +#define _DEV_MII_NSGPHYREG_H_ + +/* + * NatSemi DP83891 registers + */ + +#define NSGPHY_MII_BMCR 0x00 +#define NSGPHY_BMCR_RESET 0x8000 +#define NSGPHY_BMCR_LOOP 0x4000 +#define NSGPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */ +#define NSGPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */ +#define NSGPHY_BMCR_PDOWN 0x0800 /* Power down */ +#define NSGPHY_BMCR_ISO 0x0400 /* Isolate */ +#define NSGPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */ +#define NSGPHY_BMCR_FDX 0x0100 /* Duplex mode */ +#define NSGPHY_BMCR_CTEST 0x0080 /* Collision test enable */ +#define NSGPHY_BMCR_SPD1 0x0040 /* Speed select, upper bit */ + +#define NSGPHY_S1000 NSGPHY_BMCR_SPD1 /* 1000mbps */ +#define NSGPHY_S100 NSGPHY_BMCR_SPD0 /* 100mpbs */ +#define NSGPHY_S10 0 /* 10mbps */ + +#define NSGPHY_MII_BMSR 0x01 +#define NSGPHY_BMSR_100BT4 0x8000 /* 100baseT4 support */ +#define NSGPHY_BMSR_100FDX 0x4000 /* 100baseTX full duplex */ +#define NSGPHY_BMSR_100HDX 0x2000 /* 100baseTX half duplex */ +#define NSGPHY_BMSR_10FDX 0x1000 /* 10baseT full duplex */ +#define NSGPHY_BMSR_10HDX 0x0800 /* 10baseT half duplex */ +#define NSGPHY_BMSR_100T2FDX 0x0400 /* 100baseT2 full duplex */ +#define NSGPHY_BMSR_100T2HDX 0x0200 /* 100baseT2 full duplex */ +#define NSGPHY_BMSR_EXTSTS 0x0100 /* 1000baseT Extended status present */ +#define NSGPHY_BMSR_PRESUB 0x0040 /* Preamble surpression */ +#define NSGPHY_BMSR_ACOMP 0x0020 /* Autoneg complete */ +#define NSGPHY_BMSR_RFAULT 0x0010 /* Remote fault condition occured */ +#define NSGPHY_BMSR_ANEG 0x0008 /* Autoneg capable */ +#define NSGPHY_BMSR_LINK 0x0004 /* Link status */ +#define NSGPHY_BMSR_JABBER 0x0002 /* Jabber detected */ +#define NSGPHY_BMSR_EXT 0x0001 /* Extended capability */ + +#define NSGPHY_MII_ANAR 0x04 +#define NSGPHY_ANAR_NP 0x8000 /* Next page */ +#define NSGPHY_ANAR_RF 0x2000 /* Remote fault */ +#define NSGPHY_ANAR_ASP 0x0800 /* Asymetric Pause */ +#define NSGPHY_ANAR_PC 0x0400 /* Pause capable */ +#define NSGPHY_ANAR_100T4 0x0200 /* 100baseT4 support */ +#define NSGPHY_ANAR_100FDX 0x0100 /* 100baseTX full duplex support */ +#define NSGPHY_ANAR_100HDX 0x0080 /* 100baseTX half duplex support */ +#define NSGPHY_ANAR_10FDX 0x0040 /* 10baseT full duplex support */ +#define NSGPHY_ANAR_10HDX 0x0020 /* 10baseT half duplex support */ +#define NSGPHY_ANAR_SEL 0x001F /* selector field, 00001=Ethernet */ + +#define NSGPHY_MII_ANLPAR 0x05 +#define NSGPHY_ANLPAR_NP 0x8000 /* Next page */ +#define NSGPHY_ANLPAR_RF 0x2000 /* Remote fault */ +#define NSGPHY_ANLPAR_ASP 0x0800 /* Asymetric Pause */ +#define NSGPHY_ANLPAR_PC 0x0400 /* Pause capable */ +#define NSGPHY_ANLPAR_100T4 0x0200 /* 100baseT4 support */ +#define NSGPHY_ANLPAR_100FDX 0x0100 /* 100baseTX full duplex support */ +#define NSGPHY_ANLPAR_100HDX 0x0080 /* 100baseTX half duplex support */ +#define NSGPHY_ANLPAR_10FDX 0x0040 /* 10baseT full duplex support */ +#define NSGPHY_ANLPAR_10HDX 0x0020 /* 10baseT half duplex support */ +#define NSGPHY_ANLPAR_SEL 0x001F /* selector field, 00001=Ethernet */ + +#define NSGPHY_SEL_TYPE 0x0001 /* ethernet */ + +#define NSGPHY_MII_ANER 0x06 +#define NSGPHY_ANER_PDF 0x0010 /* Parallel detection fault */ +#define NSGPHY_ANER_LPNP 0x0008 /* Link partner can next page */ +#define NSGPHY_ANER_NP 0x0004 /* Local PHY can next page */ +#define NSGPHY_ANER_RX 0x0002 /* Next page received */ +#define NSGPHY_ANER_LPAN 0x0001 /* Link partner autoneg capable */ + +#define NSGPHY_MII_NEXTP 0x07 /* Next page */ +#define NSGPHY_NEXTP_NP 0x8000 /* Next page indication */ +#define NSGPHY_NEXTP_MP 0x2000 /* Message page */ +#define NSGPHY_NEXTP_ACK2 0x1000 /* Acknowledge 2 */ +#define NSGPHY_NEXTP_TOGGLE 0x0800 /* Toggle */ +#define NSGPHY_NEXTP_CODE 0x07FF /* Code field */ + +#define NSGPHY_MII_NEXTP_LP 0x08 /* Next page of link partner */ +#define NSGPHY_NEXTPLP_NP 0x8000 /* Next page indication */ +#define NSGPHY_NEXTPLP_MP 0x2000 /* Message page */ +#define NSGPHY_NEXTPLP_ACK2 0x1000 /* Acknowledge 2 */ +#define NSGPHY_NEXTPLP_TOGGLE 0x0800 /* Toggle */ +#define NSGPHY_NEXTPLP_CODE 0x07FF /* Code field */ + +#define NSGPHY_MII_1000CTL 0x09 /* 1000baseT control */ +#define NSGPHY_1000CTL_TST 0xE000 /* test modes */ +#define NSGPHY_1000CTL_MSE 0x1000 /* Master/Slave config enable */ +#define NSGPHY_1000CTL_MSC 0x0800 /* Master/Slave setting */ +#define NSGPHY_1000CTL_RD 0x0400 /* Port type: Repeater/DTE */ +#define NSGPHY_1000CTL_AFD 0x0200 /* Advertise full duplex */ +#define NSGPHY_1000CTL_AHD 0x0100 /* Advertise half duplex */ + +#define NSGPHY_MII_1000STS 0x0A /* 1000baseT status */ +#define NSGPHY_1000STS_MSF 0x8000 /* Master/slave fault */ +#define NSGPHY_1000STS_MSR 0x4000 /* Master/slave result */ +#define NSGPHY_1000STS_LRS 0x2000 /* Local receiver status */ +#define NSGPHY_1000STS_RRS 0x1000 /* Remote receiver status */ +#define NSGPHY_1000STS_LPFD 0x0800 /* Link partner can FD */ +#define NSGPHY_1000STS_LPHD 0x0400 /* Link partner can HD */ +#define NSGPHY_1000STS_ASM_DIR 0x0200 /* Asymetric pause capable */ +#define NSGPHY_1000STS_IEC 0x00FF /* Idle error count */ + +#define NSGPHY_MII_EXTSTS 0x0F /* Extended status */ +#define NSGPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */ +#define NSGPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */ +#define NSGPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */ +#define NSGPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */ + +#define NSGPHY_MII_STRAPOPT 0x10 /* Strap options */ +#define NSGPHY_STRAPOPT_PHYADDR 0xF800 /* PHY address */ +#define NSGPHY_STRAPOPT_COMPAT 0x0400 /* Broadcom compat mode */ +#define NSGPHY_STRAPOPT_MMSE 0x0200 /* Manual master/slave enable */ +#define NSGPHY_STRAPOPT_ANEG 0x0100 /* Autoneg enable */ +#define NSGPHY_STRAPOPT_MMSV 0x0080 /* Manual master/slave setting */ +#define NSGPHY_STRAPOPT_1000HDX 0x0010 /* Advertise 1000 half-duplex */ +#define NSGPHY_STRAPOPT_1000FDX 0x0008 /* Advertise 1000 full-duplex */ +#define NSGPHY_STRAPOPT_100_ADV 0x0004 /* Advertise 100 full/half-duplex */ +#define NSGPHY_STRAPOPT_SPDSEL 0x0003 /* speed selection */ + +#define NSGPHY_MII_PHYSUP 0x11 /* PHY support/current status */ +#define NSGPHY_PHYSUP_SPDSTS 0x0018 /* speed status */ +#define NSGPHY_PHYSUP_LNKSTS 0x0004 /* link status */ +#define NSGPHY_PHYSUP_DUPSTS 0x0002 /* duplex status 1 == full */ +#define NSGPHY_PHYSUP_10BT 0x0001 /* 10baseT resolved */ + +#define NSGPHY_SPDSTS_1000 0x0010 +#define NSGPHY_SPDSTS_100 0x0008 +#define NSGPHY_SPDSTS_10 0x0000 + +#endif /* _DEV_NSGPHY_MIIREG_H_ */ |