diff options
| -rw-r--r-- | sys/arch/mvme68k/dev/flash.c | 26 | ||||
| -rw-r--r-- | sys/arch/mvme68k/dev/flashreg.h | 3 | ||||
| -rw-r--r-- | sys/arch/mvme68k/dev/if_le.c | 323 | ||||
| -rw-r--r-- | sys/arch/mvme68k/dev/ipic.c | 11 | ||||
| -rw-r--r-- | sys/arch/mvme68k/dev/mc.c | 36 | ||||
| -rw-r--r-- | sys/arch/mvme68k/dev/mcreg.h | 31 | ||||
| -rw-r--r-- | sys/arch/mvme68k/dev/scc.h | 9 | ||||
| -rw-r--r-- | sys/arch/mvme68k/dev/zs.c | 439 |
8 files changed, 473 insertions, 405 deletions
diff --git a/sys/arch/mvme68k/dev/flash.c b/sys/arch/mvme68k/dev/flash.c index 5e928cb4b55..9437260f0c2 100644 --- a/sys/arch/mvme68k/dev/flash.c +++ b/sys/arch/mvme68k/dev/flash.c @@ -1,4 +1,4 @@ -/* $OpenBSD: flash.c,v 1.5 1996/04/28 11:11:50 deraadt Exp $ */ +/* $OpenBSD: flash.c,v 1.6 2000/01/29 04:11:25 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -84,6 +84,7 @@ int flasherasezone __P((struct flashsoftc *sc, int addr)); struct flashii intel_flashii[] = { { "28F008SA", FLII_INTEL_28F008SA, 1024*1024, 64*1024 }, { "28F008SA-L", FLII_INTEL_28F008SA_L, 1024*1024, 64*1024 }, + { "28F016SA", FLII_INTEL_28F016SA, 1024*1024, 64*1024 }, { NULL }, }; @@ -92,8 +93,8 @@ struct flashmanu { u_char manu; struct flashii *flashii; } flashmanu[] = { - { "intel", FLMANU_INTEL, intel_flashii }, - { NULL } + { "intel", FLMANU_INTEL, intel_flashii }, + { NULL, 0, NULL } }; int @@ -118,13 +119,20 @@ flashmatch(parent, cf, args) if (cputyp == CPU_167) return (0); #endif +#ifdef MVME177 + /* + * XXX: 177 has no flash. + */ + if (cputyp == CPU_177) + return (0); +#endif if (badpaddr(ca->ca_paddr, 1)) return (0); - /* - * XXX: need to determine if it is flash or rom - */ + if (!mc_hasflash()) + return 0; + return (1); } @@ -146,6 +154,11 @@ flashattach(parent, self, args) mc_enableflashwrite(1); break; #endif +#ifdef MVME172 + case CPU_172: + mc_enableflashwrite(1); + break; +#endif } /* read manufacturer and product identifier from flash */ @@ -154,7 +167,6 @@ flashattach(parent, self, args) sc->sc_manu = sc->sc_vaddr[0]; sc->sc_ii = sc->sc_vaddr[1]; sc->sc_vaddr[0] = FLCMD_RESET; - for (manu = 0; flashmanu[manu].name; manu++) if (flashmanu[manu].manu == sc->sc_manu) break; diff --git a/sys/arch/mvme68k/dev/flashreg.h b/sys/arch/mvme68k/dev/flashreg.h index 3a01cd2d99c..b5ee8f8a459 100644 --- a/sys/arch/mvme68k/dev/flashreg.h +++ b/sys/arch/mvme68k/dev/flashreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: flashreg.h,v 1.4 1996/04/28 11:03:20 deraadt Exp $ */ +/* $OpenBSD: flashreg.h,v 1.5 2000/01/29 04:11:25 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -55,6 +55,7 @@ #define FLII_INTEL_28F020 0xbd #define FLII_INTEL_28F008SA 0xa1 #define FLII_INTEL_28F008SA_L 0xa2 +#define FLII_INTEL_28F016SA 0xa0 struct flashii { char *name; diff --git a/sys/arch/mvme68k/dev/if_le.c b/sys/arch/mvme68k/dev/if_le.c index bf6702229bf..0e74b8c095d 100644 --- a/sys/arch/mvme68k/dev/if_le.c +++ b/sys/arch/mvme68k/dev/if_le.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_le.c,v 1.13 2000/01/24 05:20:53 smurph Exp $ */ +/* $OpenBSD: if_le.c,v 1.14 2000/01/29 04:11:25 smurph Exp $ */ /*- * Copyright (c) 1982, 1992, 1993 @@ -67,8 +67,8 @@ #include <mvme68k/dev/vme.h> /* autoconfiguration driver */ -void leattach(struct device *, struct device *, void *); -int lematch(struct device *, void *, void *); +void leattach(struct device *, struct device *, void *); +int lematch(struct device *, void *, void *); struct cfattach le_ca = { sizeof(struct le_softc), lematch, leattach @@ -87,18 +87,18 @@ struct am7990_softc *sc; u_char cmd; u_short addr; { - int i; - u_char rcmd = 0; - u_char rcmd2= 0; + int i; + u_char rcmd = 0; + u_char rcmd2= 0; struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; - - rcmd = addr; - rcmd = rcmd << 3; - rcmd |= cmd; - for(i=0;i<8;i++){ - reg1->ler1_ear=((cmd|(addr<<1))>>i); - CDELAY; - } + + rcmd = addr; + rcmd = rcmd << 3; + rcmd |= cmd; + for (i=0;i<8;i++) { + reg1->ler1_ear=((cmd|(addr<<1))>>i); + CDELAY; + } } /* read nvram one bit at a time */ @@ -107,47 +107,47 @@ nvram_read(sc, nvram_addr) struct am7990_softc *sc; u_char nvram_addr; { - u_short val = 0, mask = 0x04000; - u_int16_t wbit; - /* these used by macros DO NOT CHANGE!*/ - int i; + u_short val = 0, mask = 0x04000; + u_int16_t wbit; + /* these used by macros DO NOT CHANGE!*/ + int i; struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; - ((struct le_softc *)sc)->csr = 0x4f; - ENABLE_NVRAM; - nvram_cmd(sc, NVRAM_RCL, 0); - DISABLE_NVRAM; - CDELAY; - ENABLE_NVRAM; - nvram_cmd(sc, NVRAM_READ, nvram_addr); - for (wbit=0; wbit<15; wbit++) { - (reg1->ler1_ear & 0x01) ? (val = (val | mask)) : (val = (val & (~mask))); - mask = mask>>1; - CDELAY; - } - (reg1->ler1_ear & 0x01) ? (val = (val | 0x8000)) : (val = (val & 0x7FFF)); - CDELAY; - DISABLE_NVRAM; - return (val); + ((struct le_softc *)sc)->csr = 0x4f; + ENABLE_NVRAM; + nvram_cmd(sc, NVRAM_RCL, 0); + DISABLE_NVRAM; + CDELAY; + ENABLE_NVRAM; + nvram_cmd(sc, NVRAM_READ, nvram_addr); + for (wbit=0; wbit<15; wbit++) { + (reg1->ler1_ear & 0x01) ? (val = (val | mask)) : (val = (val & (~mask))); + mask = mask>>1; + CDELAY; + } + (reg1->ler1_ear & 0x01) ? (val = (val | 0x8000)) : (val = (val & 0x7FFF)); + CDELAY; + DISABLE_NVRAM; + return (val); } void vleetheraddr(sc) struct am7990_softc *sc; { - u_char * cp = sc->sc_arpcom.ac_enaddr; - u_int16_t ival[3]; - u_char i; - - for (i=0; i<3; i++) { - ival[i] = nvram_read(sc, i); - } - memcpy(cp, &ival[0], 6); + u_char * cp = sc->sc_arpcom.ac_enaddr; + u_int16_t ival[3]; + u_char i; + + for (i=0; i<3; i++) { + ival[i] = nvram_read(sc, i); + } + memcpy(cp, &ival[0], 6); } hide void lewrcsr(sc, port, val) - struct am7990_softc *sc; - u_int16_t port, val; +struct am7990_softc *sc; +u_int16_t port, val; { register struct lereg1 *ler1 = (struct lereg1 *)((struct le_softc *)sc)->sc_r1; @@ -157,8 +157,8 @@ lewrcsr(sc, port, val) hide void vlewrcsr(sc, port, val) - struct am7990_softc *sc; - u_int16_t port, val; +struct am7990_softc *sc; +u_int16_t port, val; { register struct vlereg1 *ler1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; @@ -168,8 +168,8 @@ vlewrcsr(sc, port, val) hide u_int16_t lerdcsr(sc, port) - struct am7990_softc *sc; - u_int16_t port; +struct am7990_softc *sc; +u_int16_t port; { register struct lereg1 *ler1 = (struct lereg1 *)((struct le_softc *)sc)->sc_r1; u_int16_t val; @@ -181,8 +181,8 @@ lerdcsr(sc, port) hide u_int16_t vlerdcsr(sc, port) - struct am7990_softc *sc; - u_int16_t port; +struct am7990_softc *sc; +u_int16_t port; { register struct vlereg1 *ler1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; u_int16_t val; @@ -195,21 +195,21 @@ vlerdcsr(sc, port) /* init MVME376, set ipl and vec */ void vleinit(sc) - struct am7990_softc *sc; +struct am7990_softc *sc; { register struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; - u_char vec = ((struct le_softc *)sc)->sc_vec; - u_char ipl = ((struct le_softc *)sc)->sc_ipl; - ((struct le_softc *)sc)->csr = 0x4f; - WRITE_CSR_AND( ~ipl ); - SET_VEC(vec); + u_char vec = ((struct le_softc *)sc)->sc_vec; + u_char ipl = ((struct le_softc *)sc)->sc_ipl; + ((struct le_softc *)sc)->csr = 0x4f; + WRITE_CSR_AND( ~ipl ); + SET_VEC(vec); return; } /* MVME376 hardware reset */ void vlereset(sc) - struct am7990_softc *sc; +struct am7990_softc *sc; { register struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; RESET_HW; @@ -222,27 +222,27 @@ vlereset(sc) int vle_intr(sc) - register void *sc; +register void *sc; { register struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; - int rc; - rc = am7990_intr(sc); - ENABLE_INTR; - return (rc); + int rc; + rc = am7990_intr(sc); + ENABLE_INTR; + return (rc); } void vle_copytobuf_contig(sc, from, boff, len) - struct am7990_softc *sc; - void *from; - int boff, len; +struct am7990_softc *sc; +void *from; +int boff, len; { volatile caddr_t buf = sc->sc_mem; - /* - * Do the cache stuff - */ - dma_cachectl(buf + boff, len); + /* + * Do the cache stuff + */ + dma_cachectl(buf + boff, len); /* * Just call bcopy() to do the work. */ @@ -251,14 +251,14 @@ vle_copytobuf_contig(sc, from, boff, len) void vle_zerobuf_contig(sc, boff, len) - struct am7990_softc *sc; - int boff, len; +struct am7990_softc *sc; +int boff, len; { volatile caddr_t buf = sc->sc_mem; - /* - * Do the cache stuff - */ - dma_cachectl(buf + boff, len); + /* + * Do the cache stuff + */ + dma_cachectl(buf + boff, len); /* * Just let bzero() do the work */ @@ -267,11 +267,14 @@ vle_zerobuf_contig(sc, boff, len) int lematch(parent, vcf, args) - struct device *parent; - void *vcf, *args; +struct device *parent; +void *vcf, *args; { struct cfdata *cf = vcf; struct confargs *ca = args; + /* check physical addr for bogus MVME162 addr @0xffffd200. wierd XXX - smurph */ + if (cputyp == CPU_162 && ca->ca_paddr == (void *)0xffffd200) + return (0); return (!badvaddr(ca->ca_vaddr, 2)); } @@ -283,9 +286,9 @@ lematch(parent, vcf, args) */ void leattach(parent, self, aux) - struct device *parent; - struct device *self; - void *aux; +struct device *parent; +struct device *self; +void *aux; { register struct le_softc *lesc = (struct le_softc *)self; struct am7990_softc *sc = &lesc->sc_am7990; @@ -297,7 +300,7 @@ leattach(parent, self, aux) /* XXX the following declarations should be elsewhere */ extern void myetheraddr(u_char *); - + lebustype = ca->ca_bustype; /* Are we the boot device? */ @@ -305,71 +308,71 @@ leattach(parent, self, aux) bootdv = self; switch (lebustype) { - case BUS_VMES: - /* - * get the first avaliable etherbuf. MVME376 uses its own dual-ported - * RAM for etherbuf. It is set by dip switches on board. We support - * the four Motorola address locations, however, the board can be set up - * at any other address. We must map this space into the extio map. - * XXX-smurph. - */ - switch ((int)ca->ca_paddr) { - case 0xFFFF1200: - addr = (caddr_t)0xFD6C0000; - break; - case 0xFFFF1400: - addr = (caddr_t)0xFD700000; - break; - case 0xFFFF1600: - addr = (caddr_t)0xFD740000; - break; - case 0xFFFFD200: - addr = (caddr_t)0xFD780000; - break; - default: - panic("le: invalid address"); - } - sc->sc_mem = (void *)mapiodev(addr, VLEMEMSIZE); - if (sc->sc_mem == NULL) - panic("\nle: no more memory in external I/O map\n"); - lesc->sc_r1 = (void *)ca->ca_vaddr; - lesc->sc_ipl = ca->ca_ipl; - lesc->sc_vec = ca->ca_vec; - sc->sc_memsize = VLEMEMSIZE; - sc->sc_conf3 = LE_C3_BSWP; - sc->sc_addr = kvtop(sc->sc_mem); - sc->sc_hwreset = vlereset; - sc->sc_rdcsr = vlerdcsr; - sc->sc_wrcsr = vlewrcsr; - sc->sc_hwinit = vleinit; - sc->sc_copytodesc = vle_copytobuf_contig; - sc->sc_copyfromdesc = am7990_copyfrombuf_contig; - sc->sc_copytobuf = vle_copytobuf_contig; - sc->sc_copyfrombuf = am7990_copyfrombuf_contig; - sc->sc_zerobuf = am7990_zerobuf_contig; - /* get ether address */ - vleetheraddr(sc); - break; - case BUS_PCC: - sc->sc_mem = etherbuf; - lesc->sc_r1 = (void *)ca->ca_vaddr; - sc->sc_conf3 = LE_C3_BSWP /*| LE_C3_ACON | LE_C3_BCON*/; - sc->sc_addr = kvtop(sc->sc_mem); - sc->sc_memsize = LEMEMSIZE; - sc->sc_rdcsr = lerdcsr; - sc->sc_wrcsr = lewrcsr; - sc->sc_hwreset = NULL; - sc->sc_hwinit = NULL; - sc->sc_copytodesc = am7990_copytobuf_contig; - sc->sc_copyfromdesc = am7990_copyfrombuf_contig; - sc->sc_copytobuf = am7990_copytobuf_contig; - sc->sc_copyfrombuf = am7990_copyfrombuf_contig; - sc->sc_zerobuf = am7990_zerobuf_contig; - /* get ether address */ - myetheraddr(sc->sc_arpcom.ac_enaddr); - break; - default: - panic("\nle: unknown bus type.\n"); + case BUS_VMES: + /* + * get the first avaliable etherbuf. MVME376 uses its own dual-ported + * RAM for etherbuf. It is set by dip switches on board. We support + * the four Motorola address locations, however, the board can be set up + * at any other address. We must map this space into the extio map. + * XXX-smurph. + */ + switch ((int)ca->ca_paddr) { + case 0xFFFF1200: + addr = (caddr_t)0xFD6C0000; + break; + case 0xFFFF1400: + addr = (caddr_t)0xFD700000; + break; + case 0xFFFF1600: + addr = (caddr_t)0xFD740000; + break; + case 0xFFFFD200: + addr = (caddr_t)0xFD780000; + break; + default: + panic("le: invalid address"); + } + sc->sc_mem = (void *)mapiodev(addr, VLEMEMSIZE); + if (sc->sc_mem == NULL) + panic("\nle: no more memory in external I/O map\n"); + lesc->sc_r1 = (void *)ca->ca_vaddr; + lesc->sc_ipl = ca->ca_ipl; + lesc->sc_vec = ca->ca_vec; + sc->sc_memsize = VLEMEMSIZE; + sc->sc_conf3 = LE_C3_BSWP; + sc->sc_addr = kvtop(sc->sc_mem); + sc->sc_hwreset = vlereset; + sc->sc_rdcsr = vlerdcsr; + sc->sc_wrcsr = vlewrcsr; + sc->sc_hwinit = vleinit; + sc->sc_copytodesc = vle_copytobuf_contig; + sc->sc_copyfromdesc = am7990_copyfrombuf_contig; + sc->sc_copytobuf = vle_copytobuf_contig; + sc->sc_copyfrombuf = am7990_copyfrombuf_contig; + sc->sc_zerobuf = am7990_zerobuf_contig; + /* get ether address */ + vleetheraddr(sc); + break; + case BUS_PCC: + sc->sc_mem = etherbuf; + lesc->sc_r1 = (void *)ca->ca_vaddr; + sc->sc_conf3 = LE_C3_BSWP /*| LE_C3_ACON | LE_C3_BCON*/; + sc->sc_addr = kvtop(sc->sc_mem); + sc->sc_memsize = LEMEMSIZE; + sc->sc_rdcsr = lerdcsr; + sc->sc_wrcsr = lewrcsr; + sc->sc_hwreset = NULL; + sc->sc_hwinit = NULL; + sc->sc_copytodesc = am7990_copytobuf_contig; + sc->sc_copyfromdesc = am7990_copyfrombuf_contig; + sc->sc_copytobuf = am7990_copytobuf_contig; + sc->sc_copyfrombuf = am7990_copyfrombuf_contig; + sc->sc_zerobuf = am7990_zerobuf_contig; + /* get ether address */ + myetheraddr(sc->sc_arpcom.ac_enaddr); + break; + default: + panic("\nle: unknown bus type.\n"); } evcnt_attach(&sc->sc_dev, "intr", &lesc->sc_intrcnt); evcnt_attach(&sc->sc_dev, "errs", &lesc->sc_errcnt); @@ -383,21 +386,21 @@ leattach(parent, self, aux) /* connect the interrupt */ switch (lebustype) { - case BUS_VMES: - lesc->sc_ih.ih_fn = vle_intr; - lesc->sc_ih.ih_arg = sc; - lesc->sc_ih.ih_ipl = pri; - vmeintr_establish(ca->ca_vec + 0, &lesc->sc_ih); - break; - case BUS_PCC: - lesc->sc_ih.ih_fn = am7990_intr; - lesc->sc_ih.ih_arg = sc; - lesc->sc_ih.ih_ipl = pri; - pccintr_establish(PCCV_LE, &lesc->sc_ih); - ((struct pccreg *)ca->ca_master)->pcc_leirq = pri | PCC_IRQ_IEN; - break; + case BUS_VMES: + lesc->sc_ih.ih_fn = vle_intr; + lesc->sc_ih.ih_arg = sc; + lesc->sc_ih.ih_ipl = pri; + vmeintr_establish(ca->ca_vec + 0, &lesc->sc_ih); + break; + case BUS_PCC: + lesc->sc_ih.ih_fn = am7990_intr; + lesc->sc_ih.ih_arg = sc; + lesc->sc_ih.ih_ipl = pri; + pccintr_establish(PCCV_LE, &lesc->sc_ih); + ((struct pccreg *)ca->ca_master)->pcc_leirq = pri | PCC_IRQ_IEN; + break; } } - + diff --git a/sys/arch/mvme68k/dev/ipic.c b/sys/arch/mvme68k/dev/ipic.c index a6a4279d162..22bbce577b3 100644 --- a/sys/arch/mvme68k/dev/ipic.c +++ b/sys/arch/mvme68k/dev/ipic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ipic.c,v 1.5 1996/11/23 21:45:58 kstailey Exp $ */ +/* $OpenBSD: ipic.c,v 1.6 2000/01/29 04:11:25 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -165,7 +165,14 @@ ipicattach(parent, self, args) sc->sc_ipspace = (caddr_t)IPIC_IPSPACE; sc->sc_nip = 2; - printf(": rev %d\n", sc->sc_ipic->ipic_chiprev); + /* + * Bug in IP2 chip. ipic_chiprev should be 0x01 if + * the MC chip is rev 1. XXX - smurph + */ + if (sys_mc->mc_chiprev == 0x01) + printf(": rev 1\n"); + else + printf(": rev %d\n", sc->sc_ipic->ipic_chiprev); sc->sc_ipic->ipic_reset = IPIC_RESET; delay(2); diff --git a/sys/arch/mvme68k/dev/mc.c b/sys/arch/mvme68k/dev/mc.c index d5ca0024c18..ee7465826f2 100644 --- a/sys/arch/mvme68k/dev/mc.c +++ b/sys/arch/mvme68k/dev/mc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mc.c,v 1.6 2000/01/06 03:21:42 smurph Exp $ */ +/* $OpenBSD: mc.c,v 1.7 2000/01/29 04:11:25 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -32,7 +32,7 @@ */ /* - * VME162 MCchip + * VME162/VME172 MCchip */ #include <sys/param.h> #include <sys/conf.h> @@ -213,9 +213,33 @@ mc_enableflashwrite(on) { struct mcsoftc *sc = (struct mcsoftc *) mc_cd.cd_devs[0]; volatile u_char *ena, x; - - ena = (u_char *)sc->sc_vaddr + - (on ? MC_ENAFLASHWRITE_OFFSET : MC_DISFLASHWRITE_OFFSET); - x = *ena; + /* + * Check MC chip revision, as the way to enable flash writes + * has been changed from a memory location in BBRAM to a + * bit in the Flash Control Reg. XXX - smurph + */ + if (sc->sc_mc->mc_chiprev == 0x01) { + if (on) + sc->sc_mc->mc_flashctl |= MC_FLASHCTL_WRITE; + else + sc->sc_mc->mc_flashctl &= ~MC_FLASHCTL_WRITE; + } else { + ena = (u_char *)sc->sc_vaddr + + (on ? MC_ENAFLASHWRITE_OFFSET : MC_DISFLASHWRITE_OFFSET); + x = *ena; + } +} +/* + * Function to check if we booted from flash or prom. + * If we booted from PROM, flash mem is avaliable. + */ +int +mc_hasflash(void) +{ + struct mcsoftc *sc = (struct mcsoftc *) mc_cd.cd_devs[0]; + if (sc->sc_mc->mc_input & MC_INPUT_PROM) + return 1; + else + return 0; } #endif diff --git a/sys/arch/mvme68k/dev/mcreg.h b/sys/arch/mvme68k/dev/mcreg.h index 5b0a88e8014..cee26cb8764 100644 --- a/sys/arch/mvme68k/dev/mcreg.h +++ b/sys/arch/mvme68k/dev/mcreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mcreg.h,v 1.4 2000/01/06 03:21:42 smurph Exp $ */ +/* $OpenBSD: mcreg.h,v 1.5 2000/01/29 04:11:25 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -71,15 +71,23 @@ struct mcreg { #define MC_MEMOPTIONS_DRAM4M2 0x04 #define MC_MEMOPTIONS_DRAM8M 0x05 #define MC_MEMOPTIONS_DRAM16M 0x07 -/*0x01*/ volatile u_char mc_sramsize; -/*0x01*/ volatile u_char mc_resv1; -/*0x01*/ volatile u_char mc_ieerr; -/*0x01*/ volatile u_char mc_resv2; -/*0x01*/ volatile u_char mc_ieirq; -/*0x01*/ volatile u_char mc_iefailirq; -/*0x01*/ volatile u_char mc_ncrerr; -/*0x01*/ volatile u_char mc_input; -/*0x01*/ volatile u_char mc_ver; +/*0x26*/ volatile u_char mc_sramsize; +/*0x27*/ volatile u_char mc_resv1; +/*0x28*/ volatile u_char mc_ieerr; +/*0x29*/ volatile u_char mc_resv2; +/*0x2A*/ volatile u_char mc_ieirq; +/*0x2B*/ volatile u_char mc_iefailirq; +/*0x2C*/ volatile u_char mc_ncrerr; +/*0x2D*/ volatile u_char mc_input; + #define MC_INPUT_USR1 0x80 + #define MC_INPUT_USR2 0x40 + #define MC_INPUT_USR3 0x20 + #define MC_INPUT_USR4 0x10 + #define MC_INPUT_PROM 0x08 + #define MC_INPUT_BUG3 0x04 + #define MC_INPUT_BUG2 0x02 + #define MC_INPUT_BUG1 0x01 +/*0x2E*/ volatile u_char mc_ver; /*0x01*/ volatile u_char mc_ncrirq; /*0x01*/ volatile u_long mc_t3cmp; /*0x01*/ volatile u_long mc_t3count; @@ -88,6 +96,7 @@ struct mcreg { /*0x01*/ volatile u_char mc_busclock; /*0x01*/ volatile u_char mc_promtime; /*0x01*/ volatile u_char mc_flashctl; + #define MC_FLASHCTL_WRITE 0x08 /*0x01*/ volatile u_char mc_abortirq; /*0x01*/ volatile u_char mc_resetctl; /*0x01*/ volatile u_char mc_watchdogctl; @@ -163,3 +172,5 @@ extern struct mcreg *sys_mc; void mc_enableflashwrite __P((int on)); #define MC_ENAFLASHWRITE_OFFSET 0xcc000 #define MC_DISFLASHWRITE_OFFSET 0xc8000 +int mc_hasflash __P((void)); + diff --git a/sys/arch/mvme68k/dev/scc.h b/sys/arch/mvme68k/dev/scc.h index c494d413455..ca406f08aa7 100644 --- a/sys/arch/mvme68k/dev/scc.h +++ b/sys/arch/mvme68k/dev/scc.h @@ -1,4 +1,4 @@ -/* $OpenBSD: scc.h,v 1.3 1996/04/28 11:03:29 deraadt Exp $ */ +/* $OpenBSD: scc.h,v 1.4 2000/01/29 04:11:25 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -63,10 +63,12 @@ struct sccregs { u_char s_val[16]; }; +int mc_rev1_bug = 0; + #define ZREAD0(scc) ((*((scc)->s_cr))) #define ZREAD(scc, n) ((*((scc)->s_cr)) = n, (*((scc)->s_cr))) #if 1 -#define ZREADD(scc) (ZWRITE0((scc), 8), ZREAD0((scc))) +#define ZREADD(scc) mc_rev1_bug ? (ZWRITE0((scc), 8), ZREAD0((scc))) : ((*((scc)->s_dr))) #else #define ZREADD(scc) ((*((scc)->s_dr))) #endif @@ -75,7 +77,8 @@ struct sccregs { #define ZWRITE(scc, n, v) (ZWRITE0(scc, (u_char)n), \ ZWRITE0(scc, (scc)->s_val[n] = (u_char)(v))) #if 1 -#define ZWRITED(scc, v) (ZWRITE0((scc), 8), ZWRITE0((scc), (u_char)(v))) +#define ZWRITED(scc, v) mc_rev1_bug ? ((ZWRITE0((scc), 8), ZWRITE0((scc), (u_char)(v)))) : \ + (((*((scc)->s_dr)) = (u_char)(v))) #else #define ZWRITED(scc, v) ((*((scc)->s_dr)) = (u_char)(v)) #endif diff --git a/sys/arch/mvme68k/dev/zs.c b/sys/arch/mvme68k/dev/zs.c index 862752153d4..3b428dd8e29 100644 --- a/sys/arch/mvme68k/dev/zs.c +++ b/sys/arch/mvme68k/dev/zs.c @@ -1,6 +1,7 @@ -/* $OpenBSD: zs.c,v 1.7 2000/01/27 03:28:38 smurph Exp $ */ +/* $OpenBSD: zs.c,v 1.8 2000/01/29 04:11:25 smurph Exp $ */ /* + * Copyright (c) 2000 Steve Murphree, Jr. * Copyright (c) 1995 Theo de Raadt * Copyright (c) 1993 Paul Mackerras. * All rights reserved. @@ -62,6 +63,7 @@ #include <mvme68k/dev/mcreg.h> #endif + #include "zs.h" #define NZSLINE (NZS*2) @@ -69,29 +71,29 @@ #define RECV_BUF 512 #define ERROR_DET 0xed -#define TS_DRAIN TS_FLUSH/* waiting for output to drain */ +#define TS_DRAIN TS_FLUSH /* waiting for output to drain */ #define splzs() spl4() struct zs { - short flags; /* see below */ - char rr0; /* holds previous CTS, DCD state */ - u_char imask; /* mask for input chars */ - int nzs_open; /* # opens as /dev/zsn */ - struct tty *tty; /* link to tty structure */ - struct sccregs scc; /* SCC shadow registers */ - u_char *rcv_get; - u_char *rcv_put; - u_char *rcv_end; - volatile int rcv_count; - int rcv_len; - char *send_ptr; - int send_count; - int sent_count; - volatile char modem_state; - volatile char modem_change; - volatile short hflags; - char rcv_buf[RECV_BUF]; + short flags; /* see below */ + char rr0; /* holds previous CTS, DCD state */ + u_char imask; /* mask for input chars */ + int nzs_open; /* # opens as /dev/zsn */ + struct tty *tty; /* link to tty structure */ + struct sccregs scc; /* SCC shadow registers */ + u_char *rcv_get; + u_char *rcv_put; + u_char *rcv_end; + volatile int rcv_count; + int rcv_len; + char *send_ptr; + int send_count; + int sent_count; + volatile char modem_state; + volatile char modem_change; + volatile short hflags; + char rcv_buf[RECV_BUF]; }; /* Bits in flags */ @@ -108,37 +110,37 @@ struct zs { #define ZH_RXOVF 8 /* receiver buffer overflow */ struct zssoftc { - struct device sc_dev; - struct zs sc_zs[2]; - struct evcnt sc_intrcnt; - struct intrhand sc_ih; + struct device sc_dev; + struct zs sc_zs[2]; + struct evcnt sc_intrcnt; + struct intrhand sc_ih; #if NPCC > 0 - struct pccreg *sc_pcc; + struct pccreg *sc_pcc; #endif #if NMC > 0 - struct mcreg *sc_mc; + struct mcreg *sc_mc; #endif - int sc_flags; + int sc_flags; }; #define ZSSF_85230 1 struct tty *zs_tty[NZSLINE]; -struct termios zs_cons_termios; -int zs_cons_unit = 0; -int zs_is_console = 0; -struct sccregs *zs_cons_scc; +struct termios zs_cons_termios; +int zs_cons_unit = 0; +int zs_is_console = 0; +struct sccregs *zs_cons_scc; -int zsopen __P((dev_t, int, int, struct proc *)); -void zsstart __P((struct tty *)); -int zsparam __P((struct tty *, struct termios *)); -int zsirq __P((int unit)); -int zsregs __P((void *va, int unit, volatile u_char **crp, - volatile u_char **drp)); -int zspclk __P((void)); +int zsopen __P((dev_t, int, int, struct proc *)); +void zsstart __P((struct tty *)); +int zsparam __P((struct tty *, struct termios *)); +int zsirq __P((int unit)); +int zsregs __P((void *va, int unit, volatile u_char **crp, + volatile u_char **drp)); +int zspclk __P((void)); -u_long sir_zs; -void zs_softint __P((void)); +u_long sir_zs; +void zs_softint __P((void)); #define zsunit(dev) (minor(dev) >> 1) #define zsside(dev) (minor(dev) & 1) @@ -146,8 +148,8 @@ void zs_softint __P((void)); /* * Autoconfiguration stuff. */ -void zsattach __P((struct device *, struct device *, void *)); -int zsmatch __P((struct device *, void *, void *)); +void zsattach __P((struct device *, struct device *, void *)); +int zsmatch __P((struct device *, void *, void *)); struct cfattach zs_ca = { sizeof(struct zssoftc), zsmatch, zsattach @@ -159,34 +161,31 @@ struct cfdriver zs_cd = { int zsmatch(parent, vcf, args) - struct device *parent; - void *vcf, *args; +struct device *parent; +void *vcf, *args; { struct cfdata *cf = vcf; struct confargs *ca = args; - unsigned char *zstest = (unsigned char *)ca->ca_vaddr; - /* - * If zs1 is in the config, we must test to see if it really exists. - * Some 162s only have one scc device, but the memory location for - * the second scc still checks valid and every byte contains 0xFF. So - * this is what we test with for now. XXX - smurph - */ - if (!badvaddr(ca->ca_vaddr, 1)) - if (*zstest == 0xFF) - return(0); - else - return(1); - else - return(0); -#if 0 - return (!badvaddr(ca->ca_vaddr, 1)); -#endif + unsigned char *zstest = (unsigned char *)ca->ca_vaddr; + /* + * If zs1 is in the config, we must test to see if it really exists. + * Some 162s only have one scc device, but the memory location for + * the second scc still checks valid and every byte contains 0xFF. So + * this is what we test with for now. XXX - smurph + */ + if (!badvaddr(ca->ca_vaddr, 1)) + if (*zstest == 0xFF) + return (0); + else + return (1); + else + return (0); } void zsattach(parent, self, args) - struct device *parent, *self; - void *args; +struct device *parent, *self; +void *args; { struct zssoftc *sc; struct zs *zp, *zc; @@ -195,7 +194,7 @@ zsattach(parent, self, args) volatile u_char *scc_cr, *scc_dr; struct confargs *ca = args; int zs_level = ca->ca_ipl; - int size; + int size; static int initirq = 0; /* connect the interrupt */ @@ -206,16 +205,23 @@ zsattach(parent, self, args) sc->sc_ih.ih_ipl = zs_level; switch (ca->ca_bustype) { #if NPCC > 0 - case BUS_PCC: - pccintr_establish(PCCV_ZS, &sc->sc_ih); - sc->sc_pcc = (struct pccreg *)ca->ca_master; - break; + case BUS_PCC: + pccintr_establish(PCCV_ZS, &sc->sc_ih); + sc->sc_pcc = (struct pccreg *)ca->ca_master; + break; #endif #if NMC > 0 - case BUS_MC: - mcintr_establish(MCV_ZS, &sc->sc_ih); - sc->sc_mc = (struct mcreg *)ca->ca_master; - break; + case BUS_MC: + if (sys_mc->mc_chiprev == 0x01) + /* + * MC rev 0x01 has a bug and can not access scc regs directly. + * Macros will do the right thing based on the value of + * mc_rev1_bug - XXX smurph + */ + mc_rev1_bug = 1; /* defined in scc.h */ + mcintr_establish(MCV_ZS, &sc->sc_ih); + sc->sc_mc = (struct mcreg *)ca->ca_master; + break; #endif } @@ -268,24 +274,24 @@ zsattach(parent, self, args) */ switch (ca->ca_bustype) { #if NPCC > 0 - case BUS_PCC: - ir = sc->sc_pcc->pcc_zsirq; - if ((ir & PCC_IRQ_IPL) != 0 && (ir & PCC_IRQ_IPL) != zs_level) - panic("zs configured at different IPLs"); - if (initirq) + case BUS_PCC: + ir = sc->sc_pcc->pcc_zsirq; + if ((ir & PCC_IRQ_IPL) != 0 && (ir & PCC_IRQ_IPL) != zs_level) + panic("zs configured at different IPLs"); + if (initirq) + break; + sc->sc_pcc->pcc_zsirq = zs_level | PCC_IRQ_IEN | PCC_ZS_PCCVEC; break; - sc->sc_pcc->pcc_zsirq = zs_level | PCC_IRQ_IEN | PCC_ZS_PCCVEC; - break; #endif #if NMC > 0 - case BUS_MC: - ir = sc->sc_mc->mc_zsirq; - if ((ir & MC_IRQ_IPL) != 0 && (ir & MC_IRQ_IPL) != zs_level) - panic("zs configured at different IPLs"); - if (initirq) + case BUS_MC: + ir = sc->sc_mc->mc_zsirq; + if ((ir & MC_IRQ_IPL) != 0 && (ir & MC_IRQ_IPL) != zs_level) + panic("zs configured at different IPLs"); + if (initirq) + break; + sc->sc_mc->mc_zsirq = zs_level | MC_IRQ_IEN; break; - sc->sc_mc->mc_zsirq = zs_level | MC_IRQ_IEN; - break; #endif } initirq = 1; @@ -295,7 +301,7 @@ zsattach(parent, self, args) void zs_ttydef(zp) - struct zs *zp; +struct zs *zp; { struct tty *tp = zp->tty; @@ -320,7 +326,7 @@ zs_ttydef(zp) struct tty * zstty(dev) - dev_t dev; +dev_t dev; { if (minor(dev) < NZSLINE) return (zs_tty[minor(dev)]); @@ -330,9 +336,9 @@ zstty(dev) /* ARGSUSED */ int zsopen(dev, flag, mode, p) - dev_t dev; - int flag, mode; - struct proc *p; +dev_t dev; +int flag, mode; +struct proc *p; { register struct tty *tp; int error; @@ -340,7 +346,7 @@ zsopen(dev, flag, mode, p) struct zssoftc *sc; if (zsunit(dev) >= zs_cd.cd_ndevs || - (sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(dev)]) == NULL) + (sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(dev)]) == NULL) return (ENODEV); zp = &sc->sc_zs[zsside(dev)]; @@ -371,9 +377,9 @@ zsopen(dev, flag, mode, p) int zsclose(dev, flag, mode, p) - dev_t dev; - int flag, mode; - struct proc *p; +dev_t dev; +int flag, mode; +struct proc *p; { struct zs *zp; struct tty *tp; @@ -381,7 +387,7 @@ zsclose(dev, flag, mode, p) int s; if (zsunit(dev) > zs_cd.cd_ndevs || - (sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(dev)]) == NULL) + (sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(dev)]) == NULL) return (ENODEV); zp = &sc->sc_zs[zsside(dev)]; tp = zp->tty; @@ -389,8 +395,8 @@ zsclose(dev, flag, mode, p) (*linesw[tp->t_line].l_close) (tp, flag); s = splzs(); if ((zp->flags & ZS_CONSOLE) == 0 && (tp->t_cflag & HUPCL) != 0) - ZBIC(&zp->scc, 5, 0x82); /* drop DTR, RTS */ - ZBIC(&zp->scc, 3, 1); /* disable receiver */ + ZBIC(&zp->scc, 5, 0x82); /* drop DTR, RTS */ + ZBIC(&zp->scc, 3, 1); /* disable receiver */ splx(s); ttyclose(tp); zp->nzs_open = 0; @@ -400,9 +406,9 @@ zsclose(dev, flag, mode, p) /*ARGSUSED*/ int zsread(dev, uio, flag) - dev_t dev; - struct uio *uio; - int flag; +dev_t dev; +struct uio *uio; +int flag; { struct zssoftc *sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(dev)]; struct zs *zp = &sc->sc_zs[zsside(dev)]; @@ -414,9 +420,9 @@ zsread(dev, uio, flag) /*ARGSUSED*/ int zswrite(dev, uio, flag) - dev_t dev; - struct uio *uio; - int flag; +dev_t dev; +struct uio *uio; +int flag; { struct zssoftc *sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(dev)]; struct zs *zp = &sc->sc_zs[zsside(dev)]; @@ -427,10 +433,10 @@ zswrite(dev, uio, flag) int zsioctl(dev, cmd, data, flag, p) - dev_t dev; - caddr_t data; - int cmd, flag; - struct proc *p; +dev_t dev; +caddr_t data; +int cmd, flag; +struct proc *p; { struct zssoftc *sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(dev)]; struct zs *zp = &sc->sc_zs[zsside(dev)]; @@ -447,38 +453,38 @@ zsioctl(dev, cmd, data, flag, p) error = 0; s = splzs(); switch (cmd) { - case TIOCSDTR: - ZBIS(scc, 5, 0x80); - break; - case TIOCCDTR: - ZBIC(scc, 5, 0x80); - break; - case TIOCSBRK: - splx(s); - zs_drain(zp); - s = splzs(); - ZBIS(scc, 5, 0x10); - spltty(); - zs_unblock(tp); - break; - case TIOCCBRK: - ZBIC(scc, 5, 0x10); - break; - case TIOCMGET: - *(int *) data = zscc_mget(scc); - break; - case TIOCMSET: - zscc_mset(scc, *(int *) data); - zscc_mclr(scc, ~*(int *) data); - break; - case TIOCMBIS: - zscc_mset(scc, *(int *) data); - break; - case TIOCMBIC: - zscc_mclr(scc, *(int *) data); - break; - default: - error = ENOTTY; + case TIOCSDTR: + ZBIS(scc, 5, 0x80); + break; + case TIOCCDTR: + ZBIC(scc, 5, 0x80); + break; + case TIOCSBRK: + splx(s); + zs_drain(zp); + s = splzs(); + ZBIS(scc, 5, 0x10); + spltty(); + zs_unblock(tp); + break; + case TIOCCBRK: + ZBIC(scc, 5, 0x10); + break; + case TIOCMGET: + *(int *) data = zscc_mget(scc); + break; + case TIOCMSET: + zscc_mset(scc, *(int *) data); + zscc_mclr(scc, ~*(int *) data); + break; + case TIOCMBIS: + zscc_mset(scc, *(int *) data); + break; + case TIOCMBIC: + zscc_mclr(scc, *(int *) data); + break; + default: + error = ENOTTY; } splx(s); return (error); @@ -486,8 +492,8 @@ zsioctl(dev, cmd, data, flag, p) int zsparam(tp, t) - struct tty *tp; - struct termios *t; +struct tty *tp; +struct termios *t; { struct zssoftc *sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(tp->t_dev)]; struct zs *zp = &sc->sc_zs[zsside(tp->t_dev)]; @@ -511,7 +517,7 @@ zsparam(tp, t) void zsstart(tp) - struct tty *tp; +struct tty *tp; { struct zssoftc *sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(tp->t_dev)]; struct zs *zp = &sc->sc_zs[zsside(tp->t_dev)]; @@ -535,8 +541,8 @@ zsstart(tp) } zsstop(tp, flag) - struct tty *tp; - int flag; +struct tty *tp; +int flag; { struct zssoftc *sc = (struct zssoftc *) zs_cd.cd_devs[zsunit(tp->t_dev)]; struct zs *zp = &sc->sc_zs[zsside(tp->t_dev)]; @@ -562,7 +568,7 @@ zsstop(tp, flag) } zs_init(zp) - struct zs *zp; +struct zs *zp; { register int s; @@ -576,8 +582,8 @@ zs_init(zp) } zscc_init(zp, par) - struct zs *zp; - struct termios *par; +struct zs *zp; +struct termios *par; { struct sccregs *scc; @@ -596,8 +602,8 @@ zscc_init(zp, par) int zscc_params(scc, par) - struct sccregs *scc; - struct termios *par; +struct sccregs *scc; +struct termios *par; { unsigned divisor, speed; int spd, imask, ints; @@ -615,21 +621,21 @@ zscc_params(scc, par) ZWRITE(scc, 12, divisor); ZWRITE(scc, 13, divisor >> 8); switch (par->c_cflag & CSIZE) { - case CS5: - spd = 0; - imask = 0x1F; - break; - case CS6: - spd = 0x40; - imask = 0x3F; - break; - case CS7: - spd = 0x20; - imask = 0x7F; - break; - default: - spd = 0x60; - imask = 0xFF; + case CS5: + spd = 0; + imask = 0x1F; + break; + case CS6: + spd = 0x40; + imask = 0x3F; + break; + case CS7: + spd = 0x20; + imask = 0x7F; + break; + default: + spd = 0x60; + imask = 0xFF; } ZWRITE(scc, 5, (scc->s_val[5] & ~0x60) | spd); ZWRITE(scc, 3, (scc->s_val[3] & ~0xC0) | (spd << 1)); @@ -659,7 +665,7 @@ zscc_params(scc, par) } zscc_mget(scc) - register struct sccregs *scc; +register struct sccregs *scc; { int bits = 0, rr0; @@ -678,8 +684,8 @@ zscc_mget(scc) } zscc_mset(scc, bits) - register struct sccregs *scc; - int bits; +register struct sccregs *scc; +int bits; { if ((bits & TIOCM_LE) != 0) ZBIS(scc, 3, SCC_RCVEN); @@ -690,8 +696,8 @@ zscc_mset(scc, bits) } zscc_mclr(scc, bits) - register struct sccregs *scc; - int bits; +register struct sccregs *scc; +int bits; { if ((bits & TIOCM_LE) != 0) ZBIC(scc, 3, SCC_RCVEN); @@ -702,7 +708,7 @@ zscc_mclr(scc, bits) } zs_drain(zp) - register struct zs *zp; +register struct zs *zp; { register int s; @@ -710,7 +716,7 @@ zs_drain(zp) /* wait for Tx buffer empty and All sent bits to be set */ s = splzs(); while ((ZREAD0(&zp->scc) & SCC_TXRDY) == 0 || - (ZREAD(&zp->scc, 1) & 1) == 0) { + (ZREAD(&zp->scc, 1) & 1) == 0) { splx(s); DELAY(100); s = splzs(); @@ -719,7 +725,7 @@ zs_drain(zp) } zs_unblock(tp) - register struct tty *tp; +register struct tty *tp; { tp->t_state &= ~TS_DRAIN; if (tp->t_outq.c_cc != 0) @@ -731,7 +737,7 @@ zs_unblock(tp) */ int zsirq(unit) - int unit; +int unit; { struct zssoftc *sc = (struct zssoftc *) zs_cd.cd_devs[unit]; register struct zs *zp = &sc->sc_zs[0]; @@ -760,7 +766,7 @@ zsirq(unit) } zs_txint(zp) - register struct zs *zp; +register struct zs *zp; { struct tty *tp = zp->tty; struct sccregs *scc; @@ -787,7 +793,7 @@ zs_txint(zp) } zs_rxint(zp) - register struct zs *zp; +register struct zs *zp; { register int stat, c, n, extra; u_char *put; @@ -834,7 +840,7 @@ zs_rxint(zp) /* Ext/status interrupt */ zs_extint(zp) - register struct zs *zp; +register struct zs *zp; { int rr0; struct tty *tp = zp->tty; @@ -879,7 +885,7 @@ zs_softint() /* check for tx done */ spltty(); if (tp != NULL && zp->send_count == 0 - && (tp->t_state & TS_BUSY) != 0) { + && (tp->t_state & TS_BUSY) != 0) { tp->t_state &= ~(TS_BUSY | TS_FLUSH); ndflush(&tp->t_outq, zp->sent_count); if (tp->t_outq.c_cc <= tp->t_lowat) { @@ -918,6 +924,7 @@ zs_softint() if (tp == NULL || (tp->t_state & TS_ISOPEN) == 0) continue; if (zp->nzs_open == 0) { + } else { if ((stat & 0x10) != 0) c |= TTY_PE; @@ -960,17 +967,17 @@ zs_softint() /* probe for the SCC; should check hardware */ zscnprobe(cp) - struct consdev *cp; +struct consdev *cp; { int maj; switch (cputyp) { - case CPU_147: - case CPU_162: - break; - default: - cp->cn_pri = CN_DEAD; - return (0); + case CPU_147: + case CPU_162: + break; + default: + cp->cn_pri = CN_DEAD; + return (0); } /* locate the major number */ @@ -978,7 +985,7 @@ zscnprobe(cp) if (cdevsw[maj].d_open == zsopen) break; - /* initialize required fields */ + /* initialize required fields */ cp->cn_dev = makedev(maj, 0); cp->cn_pri = CN_INTERNAL; /* better than PROM console */ @@ -1007,7 +1014,7 @@ zscninit() /* Polling routine for console input from a serial port. */ int zscngetc(dev) - dev_t dev; +dev_t dev; { register struct sccregs *scc = zs_cons_scc; int c, s, stat; @@ -1028,8 +1035,8 @@ zscngetc(dev) } zscnputc(dev, c) - dev_t dev; - int c; +dev_t dev; +int c; { register struct sccregs *scc = zs_cons_scc; int s; @@ -1042,8 +1049,8 @@ zscnputc(dev, c) } zs_cnsetup(unit, tiop) - int unit; - struct termios *tiop; +int unit; +struct termios *tiop; { volatile u_char *scc_cr, *scc_dr; struct sccregs *scc; @@ -1084,10 +1091,10 @@ zs_cnsetup(unit, tiop) } #ifdef MVME147 -u_long zs_cons_addrs_147[] = { ZS0_PHYS_147, ZS1_PHYS_147 }; +u_long zs_cons_addrs_147[] = { ZS0_PHYS_147, ZS1_PHYS_147}; #endif #ifdef MVME162 -u_long zs_cons_addrs_162[] = { ZS0_PHYS_162, ZS1_PHYS_162 }; +u_long zs_cons_addrs_162[] = { ZS0_PHYS_162, ZS1_PHYS_162}; #endif /* @@ -1099,9 +1106,9 @@ u_long zs_cons_addrs_162[] = { ZS0_PHYS_162, ZS1_PHYS_162 }; */ int zsregs(va, unit, crp, drp) - void *va; - int unit; - volatile u_char **crp, **drp; +void *va; +int unit; +volatile u_char **crp, **drp; { #ifdef MVME147 volatile struct scc_147 *scc_adr_147; @@ -1114,24 +1121,24 @@ zsregs(va, unit, crp, drp) switch (cputyp) { #ifdef MVME147 - case CPU_147: - if (!va) - va = (void *)IIOV(zs_cons_addrs_147[zsunit(unit)]); - scc_adr_147 = (volatile struct scc_147 *)va; - scc_cr = &scc_adr_147->cr; - scc_dr = &scc_adr_147->dr; - size = sizeof(struct scc_147); - break; + case CPU_147: + if (!va) + va = (void *)IIOV(zs_cons_addrs_147[zsunit(unit)]); + scc_adr_147 = (volatile struct scc_147 *)va; + scc_cr = &scc_adr_147->cr; + scc_dr = &scc_adr_147->dr; + size = sizeof(struct scc_147); + break; #endif #ifdef MVME162 - case CPU_162: - if (!va) - va = (void *)IIOV(zs_cons_addrs_162[zsunit(unit)]); - scc_adr_162 = (volatile struct scc_162 *)va; - scc_cr = &scc_adr_162->cr; - scc_dr = &scc_adr_162->dr; - size = sizeof(struct scc_162); - break; + case CPU_162: + if (!va) + va = (void *)IIOV(zs_cons_addrs_162[zsunit(unit)]); + scc_adr_162 = (volatile struct scc_162 *)va; + scc_cr = &scc_adr_162->cr; + scc_dr = &scc_adr_162->dr; + size = sizeof(struct scc_162); + break; #endif } @@ -1145,12 +1152,12 @@ zspclk() { switch (cputyp) { #ifdef MVME147 - case CPU_147: - return (PCLK_FREQ_147); + case CPU_147: + return (PCLK_FREQ_147); #endif #ifdef MVME162 - case CPU_162: - return (PCLK_FREQ_162); + case CPU_162: + return (PCLK_FREQ_162); #endif } } |