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-rw-r--r--sys/arch/luna88k/luna88k/m8820x.c120
-rw-r--r--sys/arch/m88k/include/cmmu.h7
-rw-r--r--sys/arch/m88k/include/pmap.h7
-rw-r--r--sys/arch/m88k/m88k/pmap.c126
-rw-r--r--sys/arch/mvme88k/mvme88k/m88110.c63
-rw-r--r--sys/arch/mvme88k/mvme88k/m8820x.c60
6 files changed, 14 insertions, 369 deletions
diff --git a/sys/arch/luna88k/luna88k/m8820x.c b/sys/arch/luna88k/luna88k/m8820x.c
index 29ff7989def..02f00e3521a 100644
--- a/sys/arch/luna88k/luna88k/m8820x.c
+++ b/sys/arch/luna88k/luna88k/m8820x.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: m8820x.c,v 1.3 2004/08/02 08:34:57 miod Exp $ */
+/* $OpenBSD: m8820x.c,v 1.4 2004/08/04 15:54:35 miod Exp $ */
/*
* Copyright (c) 2004, Miodrag Vallat.
*
@@ -105,8 +105,6 @@
*/
#define BROKEN_MMU_MASK
-#undef SHADOW_BATC /* don't use BATCs for now XXX nivas */
-
#ifdef DEBUG
unsigned int m8820x_debuglevel;
#define dprintf(_X_) \
@@ -130,10 +128,7 @@ void m8820x_cmmu_parity_enable(void);
unsigned m8820x_cmmu_cpu_number(void);
void m8820x_cmmu_set_sapr(unsigned, unsigned);
void m8820x_cmmu_set_uapr(unsigned);
-void m8820x_cmmu_set_pair_batc_entry(unsigned, unsigned, unsigned);
void m8820x_cmmu_flush_tlb(unsigned, unsigned, vaddr_t, vsize_t);
-void m8820x_cmmu_pmap_activate(unsigned, unsigned,
- u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]);
void m8820x_cmmu_flush_cache(int, paddr_t, psize_t);
void m8820x_cmmu_flush_inst_cache(int, paddr_t, psize_t);
void m8820x_cmmu_flush_data_cache(int, paddr_t, psize_t);
@@ -153,9 +148,7 @@ struct cmmu_p cmmu8820x = {
m8820x_cmmu_cpu_number,
m8820x_cmmu_set_sapr,
m8820x_cmmu_set_uapr,
- m8820x_cmmu_set_pair_batc_entry,
m8820x_cmmu_flush_tlb,
- m8820x_cmmu_pmap_activate,
m8820x_cmmu_flush_cache,
m8820x_cmmu_flush_inst_cache,
m8820x_cmmu_flush_data_cache,
@@ -195,16 +188,8 @@ struct m8820x_cmmu {
vaddr_t cmmu_addr; /* address range */
vaddr_t cmmu_addr_mask; /* address mask */
int cmmu_addr_match;/* return value of address comparison */
-#ifdef SHADOW_BATC
- unsigned batc[BATC_MAX];
-#endif
};
-#ifdef SHADOW_BATC
-/* CMMU(cpu,data) is the cmmu struct for the named cpu's indicated cmmu. */
-#define CMMU(cpu, data) cpu_cmmu[(cpu)].pair[(data) ? DATA_CMMU : INST_CMMU]
-#endif
-
/*
* Structure for accessing MMUS properly
*/
@@ -605,16 +590,6 @@ m8820x_cmmu_init()
((0x00000 << PG_BITS) | CACHE_WT | CACHE_GLOBAL |
CACHE_INH) & ~APR_V;
-#ifdef SHADOW_BATC
- m8820x_cmmu[cmmu_num].batc[0] =
- m8820x_cmmu[cmmu_num].batc[1] =
- m8820x_cmmu[cmmu_num].batc[2] =
- m8820x_cmmu[cmmu_num].batc[3] =
- m8820x_cmmu[cmmu_num].batc[4] =
- m8820x_cmmu[cmmu_num].batc[5] =
- m8820x_cmmu[cmmu_num].batc[6] =
- m8820x_cmmu[cmmu_num].batc[7] = 0;
-#endif
cr[CMMU_BWP0] = cr[CMMU_BWP1] =
cr[CMMU_BWP2] = cr[CMMU_BWP3] =
cr[CMMU_BWP4] = cr[CMMU_BWP5] =
@@ -774,47 +749,17 @@ m8820x_cmmu_set_uapr(ap)
int cpu = cpu_number();
CMMU_LOCK;
- /* this functionality also mimiced in m8820x_cmmu_pmap_activate() */
m8820x_cmmu_set(CMMU_UAPR, ap, ACCESS_VAL, cpu, 0, CMMU_ACS_USER, 0);
CMMU_UNLOCK;
splx(s);
}
/*
- * Set batc entry number entry_no to value in
- * the data and instruction cache for the named CPU.
- *
- * Except for the cmmu_init, this function and m8820x_cmmu_pmap_activate
- * are the only functions which may set the batc values.
- */
-void
-m8820x_cmmu_set_pair_batc_entry(cpu, entry_no, value)
- unsigned cpu, entry_no;
- unsigned value; /* the value to stuff into the batc */
-{
- CMMU_LOCK;
-
- m8820x_cmmu_set(CMMU_BWP(entry_no), value, MODE_VAL | ACCESS_VAL,
- cpu, DATA_CMMU, CMMU_ACS_USER, 0);
-#ifdef SHADOW_BATC
- CMMU(cpu,DATA_CMMU)->batc[entry_no] = value;
-#endif
- m8820x_cmmu_set(CMMU_BWP(entry_no), value, MODE_VAL | ACCESS_VAL,
- cpu, INST_CMMU, CMMU_ACS_USER, 0);
-#ifdef SHADOW_BATC
- CMMU(cpu,INST_CMMU)->batc[entry_no] = value;
-#endif
-
- CMMU_UNLOCK;
-}
-
-/*
* Functions that invalidate TLB entries.
*/
/*
* flush any tlb
- * Some functionality mimiced in m8820x_cmmu_pmap_activate.
*/
void
m8820x_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr,
@@ -864,47 +809,6 @@ m8820x_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr,
}
/*
- * New fast stuff for pmap_activate.
- * Does what a few calls used to do.
- * Only called from pmap_activate().
- */
-void
-m8820x_cmmu_pmap_activate(cpu, uapr, i_batc, d_batc)
- unsigned cpu, uapr;
- u_int32_t i_batc[BATC_MAX];
- u_int32_t d_batc[BATC_MAX];
-{
- int entry_no;
-
- CMMU_LOCK;
-
- /* the following is from m8820x_cmmu_set_uapr */
- m8820x_cmmu_set(CMMU_UAPR, uapr, ACCESS_VAL,
- cpu, 0, CMMU_ACS_USER, 0);
-
- for (entry_no = 0; entry_no < BATC_MAX; entry_no++) {
- m8820x_cmmu_set(CMMU_BWP(entry_no), i_batc[entry_no],
- MODE_VAL | ACCESS_VAL, cpu, INST_CMMU, CMMU_ACS_USER, 0);
- m8820x_cmmu_set(CMMU_BWP(entry_no), d_batc[entry_no],
- MODE_VAL | ACCESS_VAL, cpu, DATA_CMMU, CMMU_ACS_USER, 0);
-#ifdef SHADOW_BATC
- CMMU(cpu,INST_CMMU)->batc[entry_no] = i_batc[entry_no];
- CMMU(cpu,DATA_CMMU)->batc[entry_no] = d_batc[entry_no];
-#endif
- }
-
- /*
- * Flush the user TLB.
- * IF THE KERNEL WILL EVER CARE ABOUT THE BATC ENTRIES,
- * THE SUPERVISOR TLBs SHOULD BE FLUSHED AS WELL.
- */
- m8820x_cmmu_set(CMMU_SCR, CMMU_FLUSH_USER_ALL, ACCESS_VAL,
- cpu, 0, CMMU_ACS_USER, 0);
-
- CMMU_UNLOCK;
-}
-
-/*
* Functions that invalidate caches.
*
* Cache invalidates require physical addresses. Care must be exercised when
@@ -1438,28 +1342,6 @@ m8820x_cmmu_show_translation(address, supervisor_flag, verbose_flag, cmmu_num)
else
value = m8820x_cmmu[cmmu_num].cmmu_regs[CMMU_UAPR];
-#ifdef SHADOW_BATC
- {
- int i;
- union batcu batc;
- for (i = 0; i < 8; i++) {
- batc.bits = m8820x_cmmu[cmmu_num].batc[i];
- if (batc.field.v == 0) {
- if (verbose_flag>1)
- db_printf("cmmu #%d batc[%d] invalid.\n", cmmu_num, i);
- } else {
- db_printf("cmmu#%d batc[%d] v%08x p%08x", cmmu_num, i,
- batc.field.lba << 18, batc.field.pba);
- if (batc.field.s) db_printf(", supervisor");
- if (batc.field.wt) db_printf(", wt.th");
- if (batc.field.g) db_printf(", global");
- if (batc.field.ci) db_printf(", cache inhibit");
- if (batc.field.wp) db_printf(", write protect");
- }
- }
- }
-#endif /* SHADOW_BATC */
-
/******* SEE WHAT A PROBE SAYS (if not a thread) ***********/
{
union ssr ssr;
diff --git a/sys/arch/m88k/include/cmmu.h b/sys/arch/m88k/include/cmmu.h
index 72da0e1d2a4..8bbaf4b840b 100644
--- a/sys/arch/m88k/include/cmmu.h
+++ b/sys/arch/m88k/include/cmmu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cmmu.h,v 1.3 2004/08/02 08:34:59 miod Exp $ */
+/* $OpenBSD: cmmu.h,v 1.4 2004/08/04 15:54:37 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1992 Carnegie Mellon University
@@ -59,10 +59,7 @@ struct cmmu_p {
unsigned (*cmmu_cpu_number_func)(void);
void (*cmmu_set_sapr_func)(unsigned, unsigned);
void (*cmmu_set_uapr_func)(unsigned);
- void (*cmmu_set_pair_batc_entry_func)(unsigned, unsigned, unsigned);
void (*cmmu_flush_tlb_func)(unsigned, unsigned, vaddr_t, vsize_t);
- void (*cmmu_pmap_activate_func)(unsigned, unsigned,
- u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]);
void (*cmmu_flush_cache_func)(int, paddr_t, psize_t);
void (*cmmu_flush_inst_cache_func)(int, paddr_t, psize_t);
void (*cmmu_flush_data_cache_func)(int, paddr_t, psize_t);
@@ -87,9 +84,7 @@ extern struct cmmu_p *cmmu;
#define cmmu_cpu_number (cmmu->cmmu_cpu_number_func)
#define cmmu_set_sapr(a, b) (cmmu->cmmu_set_sapr_func)(a, b)
#define cmmu_set_uapr(a) (cmmu->cmmu_set_uapr_func)(a)
-#define cmmu_set_pair_batc_entry(a, b, c) (cmmu->cmmu_set_pair_batc_entry_func)(a, b, c)
#define cmmu_flush_tlb(a, b, c, d) (cmmu->cmmu_flush_tlb_func)(a, b, c, d)
-#define cmmu_pmap_activate(a, b, c, d) (cmmu->cmmu_pmap_activate_func)(a, b, c, d)
#define cmmu_flush_cache(a, b, c) (cmmu->cmmu_flush_cache_func)(a, b, c)
#define cmmu_flush_inst_cache(a, b, c) (cmmu->cmmu_flush_inst_cache_func)(a, b, c)
#define cmmu_flush_data_cache(a, b, c) (cmmu->cmmu_flush_data_cache_func)(a, b, c)
diff --git a/sys/arch/m88k/include/pmap.h b/sys/arch/m88k/include/pmap.h
index 695dbd14fdb..683a49e0313 100644
--- a/sys/arch/m88k/include/pmap.h
+++ b/sys/arch/m88k/include/pmap.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.h,v 1.2 2004/07/26 11:08:19 miod Exp $ */
+/* $OpenBSD: pmap.h,v 1.3 2004/08/04 15:54:37 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1991 Carnegie Mellon University
@@ -22,7 +22,6 @@
* PMAP structure
*/
-/* #define PMAP_USE_BATC */
struct pmap {
sdt_entry_t *pm_stab; /* virtual pointer to sdt */
u_int32_t pm_apr;
@@ -31,10 +30,6 @@ struct pmap {
u_int32_t pm_cpus;
struct simplelock pm_lock;
struct pmap_statistics pm_stats; /* pmap statistics */
-#ifdef PMAP_USE_BATC
- u_int32_t pm_ibatc[BATC_MAX]; /* instruction BATCs */
- u_int32_t pm_dbatc[BATC_MAX]; /* data BATCs */
-#endif
};
#define PMAP_NULL ((pmap_t) 0)
diff --git a/sys/arch/m88k/m88k/pmap.c b/sys/arch/m88k/m88k/pmap.c
index 9e5e429bacf..53d405b0a53 100644
--- a/sys/arch/m88k/m88k/pmap.c
+++ b/sys/arch/m88k/m88k/pmap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.c,v 1.3 2004/08/02 08:34:59 miod Exp $ */
+/* $OpenBSD: pmap.c,v 1.4 2004/08/04 15:54:38 miod Exp $ */
/*
* Copyright (c) 2001-2004, Miodrag Vallat
* Copyright (c) 1998-2001 Steve Murphree, Jr.
@@ -176,20 +176,6 @@ pg_to_pvh(struct vm_page *pg)
SPLX(spl); \
} while (0)
-#ifdef PMAP_USE_BATC
-
-/*
- * number of BATC entries used
- */
-int batc_used;
-
-/*
- * keep track BATC mapping
- */
-batc_entry_t batc_entry[BATC_MAX];
-
-#endif /* PMAP_USE_BATC */
-
vaddr_t kmapva = 0;
/*
@@ -409,10 +395,6 @@ pmap_map(vaddr_t virt, paddr_t start, paddr_t end, vm_prot_t prot, u_int cmode)
u_int num_phys_pages;
pt_entry_t template, *pte;
paddr_t page;
-#ifdef PMAP_USE_BATC
- u_int32_t batctmp;
- int i;
-#endif
#ifdef DEBUG
if (pmap_con_dbg & CD_MAP)
@@ -433,65 +415,9 @@ pmap_map(vaddr_t virt, paddr_t start, paddr_t end, vm_prot_t prot, u_int cmode)
template |= PG_M;
#endif
-#ifdef PMAP_USE_BATC
- batctmp = BATC_SO | BATC_V;
- if (template & CACHE_WT)
- batctmp |= BATC_WT;
- if (template & CACHE_GLOBAL)
- batctmp |= BATC_GLOBAL;
- if (template & CACHE_INH)
- batctmp |= BATC_INH;
- if (template & PG_PROT)
- batctmp |= BATC_PROT;
-#endif
-
page = trunc_page(start);
npages = atop(round_page(end) - page);
for (num_phys_pages = npages; num_phys_pages != 0; num_phys_pages--) {
-#ifdef PMAP_USE_BATC
-
-#ifdef DEBUG
- if ((pmap_con_dbg & (CD_MAP | CD_FULL)) == (CD_MAP | CD_FULL))
- printf("(pmap_map: %x) num_phys_pg=%x, virt=%x, "
- "align V=%d, page=%x, align P=%d\n",
- curproc, num_phys_pages, virt,
- BATC_BLK_ALIGNED(virt), page,
- BATC_BLK_ALIGNED(page));
-#endif
-
- if (BATC_BLK_ALIGNED(virt) && BATC_BLK_ALIGNED(page) &&
- num_phys_pages >= BATC_BLKBYTES/PAGE_SIZE &&
- batc_used < BATC_MAX ) {
- /*
- * map by BATC
- */
- batctmp |= M88K_BTOBLK(virt) << BATC_VSHIFT;
- batctmp |= M88K_BTOBLK(page) << BATC_PSHIFT;
-
- for (i = 0; i < MAX_CPUS; i++)
- if (cpu_sets[i])
- cmmu_set_pair_batc_entry(i, batc_used,
- batctmp);
- batc_entry[batc_used] = batctmp;
-#ifdef DEBUG
- if (pmap_con_dbg & CD_MAP) {
- printf("(pmap_map: %x) BATC used=%d, data=%x\n", curproc, batc_used, batctmp);
- for (i = 0; i < BATC_BLKBYTES; i += PAGE_SIZE) {
- pte = pmap_pte(kernel_pmap, virt + i);
- if (PDT_VALID(pte))
- printf("(pmap_map: %x) va %x is already mapped: pte %x\n",
- curproc, virt + i, *pte);
- }
- }
-#endif
- batc_used++;
- virt += BATC_BLKBYTES;
- page += BATC_BLKBYTES;
- num_phys_pages -= BATC_BLKBYTES/PAGE_SIZE;
- continue;
- }
-#endif /* PMAP_USE_BATC */
-
if ((pte = pmap_pte(kernel_pmap, virt)) == PT_ENTRY_NULL)
pte = pmap_expand_kmap(virt,
VM_PROT_READ | VM_PROT_WRITE);
@@ -943,9 +869,6 @@ pmap_create(void)
sdt_entry_t *segdt;
paddr_t stpa;
u_int s;
-#ifdef PMAP_USE_BATC
- int i;
-#endif
pmap = pool_get(&pmappool, PR_WAITOK);
bzero(pmap, sizeof(*pmap));
@@ -1004,14 +927,6 @@ pmap_create(void)
simple_lock_init(&pmap->pm_lock);
pmap->pm_cpus = 0;
-#ifdef PMAP_USE_BATC
- /* initialize block address translation cache */
- for (i = 0; i < BATC_MAX; i++) {
- pmap->pm_ibatc[i].bits = 0;
- pmap->pm_dbatc[i].bits = 0;
- }
-#endif
-
return pmap;
}
@@ -1935,10 +1850,7 @@ pmap_unwire(pmap_t pmap, vaddr_t v)
* PMAP_LOCK, PMAP_UNLOCK
* pmap_pte
*
- * If BATC mapping is enabled and the specified pmap is kernel_pmap,
- * batc_entry is scanned to find out the mapping.
- *
- * Then the routine calls pmap_pte to get a (virtual) pointer to
+ * The routine calls pmap_pte to get a (virtual) pointer to
* the page table entry (PTE) associated with the given virtual
* address. If the page table does not exist, or if the PTE is not valid,
* then 0 address is returned. Otherwise, the physical page address from
@@ -1952,29 +1864,11 @@ pmap_extract(pmap_t pmap, vaddr_t va, paddr_t *pap)
int spl;
boolean_t rv = FALSE;
-#ifdef PMAP_USE_BATC
- int i;
-#endif
-
#ifdef DIAGNOSTIC
if (pmap == PMAP_NULL)
panic("pmap_extract: pmap is NULL");
#endif
-#ifdef PMAP_USE_BATC
- /*
- * check BATC first
- */
- if (pmap == kernel_pmap && batc_used != 0)
- for (i = batc_used - 1; i != 0; i--)
- if (batc_entry[i].lba == M88K_BTOBLK(va)) {
- if (pap != NULL)
- *pap = (batc_entry[i].pba << BATC_BLKSHIFT) |
- (va & BATC_BLKMASK);
- return TRUE;
- }
-#endif
-
PMAP_LOCK(pmap, spl);
pte = pmap_pte(pmap, va);
@@ -2114,9 +2008,6 @@ pmap_activate(struct proc *p)
{
pmap_t pmap = vm_map_pmap(&p->p_vmspace->vm_map);
int cpu = cpu_number();
-#ifdef PMAP_USE_BATC
- int n;
-#endif
#ifdef DEBUG
if (pmap_con_dbg & CD_ACTIVATE)
@@ -2129,22 +2020,9 @@ pmap_activate(struct proc *p)
*/
simple_lock(&pmap->pm_lock);
-#ifdef PMAP_USE_BATC
- /*
- * cmmu_pmap_activate will set the uapr and the batc entries,
- * then flush the *USER* TLB. IF THE KERNEL WILL EVER CARE
- * ABOUT THE BATC ENTRIES, THE SUPERVISOR TLBs SHOULB BE
- * FLUSHED AS WELL.
- */
- cmmu_pmap_activate(cpu, pmap->pm_apr,
- pmap->pm_ibatc, pmap->pm_dbatc);
- for (n = 0; n < BATC_MAX; n++)
- *(register_t *)&batc_entry[n] = pmap->pm_ibatc[n].bits;
-#else
cmmu_set_uapr(pmap->pm_apr);
cmmu_flush_tlb(cpu, FALSE, VM_MIN_ADDRESS,
VM_MAX_ADDRESS - VM_MIN_ADDRESS);
-#endif /* PMAP_USE_BATC */
/*
* Mark that this cpu is using the pmap.
diff --git a/sys/arch/mvme88k/mvme88k/m88110.c b/sys/arch/mvme88k/mvme88k/m88110.c
index 543baca087c..a4e7d09fd79 100644
--- a/sys/arch/mvme88k/mvme88k/m88110.c
+++ b/sys/arch/mvme88k/mvme88k/m88110.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: m88110.c,v 1.17 2004/08/02 08:35:00 miod Exp $ */
+/* $OpenBSD: m88110.c,v 1.18 2004/08/04 15:54:38 miod Exp $ */
/*
* Copyright (c) 1998 Steve Murphree, Jr.
* All rights reserved.
@@ -96,10 +96,7 @@ void m88110_cmmu_parity_enable(void);
unsigned m88110_cmmu_cpu_number(void);
void m88110_cmmu_set_sapr(unsigned, unsigned);
void m88110_cmmu_set_uapr(unsigned);
-void m88110_cmmu_set_pair_batc_entry(unsigned, unsigned, unsigned);
void m88110_cmmu_flush_tlb(unsigned, unsigned, vaddr_t, vsize_t);
-void m88110_cmmu_pmap_activate(unsigned, unsigned,
- u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]);
void m88110_cmmu_flush_cache(int, paddr_t, psize_t);
void m88110_cmmu_flush_inst_cache(int, paddr_t, psize_t);
void m88110_cmmu_flush_data_cache(int, paddr_t, psize_t);
@@ -119,9 +116,7 @@ struct cmmu_p cmmu88110 = {
m88110_cmmu_cpu_number,
m88110_cmmu_set_sapr,
m88110_cmmu_set_uapr,
- m88110_cmmu_set_pair_batc_entry,
m88110_cmmu_flush_tlb,
- m88110_cmmu_pmap_activate,
m88110_cmmu_flush_cache,
m88110_cmmu_flush_inst_cache,
m88110_cmmu_flush_data_cache,
@@ -235,7 +230,10 @@ m88110_cmmu_init(void)
/* clear BATCs */
for (i = 0; i < 8; i++) {
- m88110_cmmu_set_pair_batc_entry(0, i, 0);
+ set_dir(i);
+ set_dbp(0);
+ set_iir(i);
+ set_ibp(0);
}
/* clear PATCs */
@@ -344,30 +342,12 @@ m88110_cmmu_set_uapr(unsigned ap)
CMMU_LOCK;
set_iuap(ap);
set_duap(ap);
+
set_icmd(CMMU_ICMD_INV_UATC);
set_dcmd(CMMU_DCMD_INV_UATC);
- mc88110_inval_inst();
- CMMU_UNLOCK;
-}
-
-/*
- * Set batc entry number entry_no to value in
- * the data and instruction cache for the named CPU.
- *
- * Except for the cmmu_init, this function and m88110_cmmu_pmap_activate
- * are the only functions which may set the batc values.
- */
-void
-m88110_cmmu_set_pair_batc_entry(unsigned cpu, unsigned entry_no, unsigned value)
-{
- CMMU_LOCK;
-
- set_dir(entry_no);
- set_dbp(value);
-
- set_iir(entry_no);
- set_ibp(value);
+ /* We need to at least invalidate the TIC, as it is va-addressed */
+ mc88110_inval_inst();
CMMU_UNLOCK;
}
@@ -377,7 +357,6 @@ m88110_cmmu_set_pair_batc_entry(unsigned cpu, unsigned entry_no, unsigned value)
/*
* flush any tlb
- * Some functionality mimiced in m88110_cmmu_pmap_activate.
*/
void
m88110_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr,
@@ -399,32 +378,6 @@ m88110_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr,
}
/*
- * New fast stuff for pmap_activate.
- * Does what a few calls used to do.
- * Only called from pmap.c's pmap_activate().
- */
-void
-m88110_cmmu_pmap_activate(unsigned cpu, unsigned uapr,
- u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX])
-{
- m88110_cmmu_set_uapr(uapr);
-
- /*
- for (entry_no = 0; entry_no < 8; entry_no++) {
- m88110_cmmu_set_batc_entry(cpu, entry_no, 0, i_batc[entry_no]);
- m88110_cmmu_set_batc_entry(cpu, entry_no, 1, d_batc[entry_no]);
- }
- */
- /*
- * Flush the user TLB.
- * IF THE KERNEL WILL EVER CARE ABOUT THE BATC ENTRIES,
- * THE SUPERVISOR TLBs SHOULD BE FLUSHED AS WELL.
- */
- set_icmd(CMMU_ICMD_INV_UATC);
- set_dcmd(CMMU_DCMD_INV_UATC);
-}
-
-/*
* Functions that invalidate caches.
*
* Cache invalidates require physical addresses. Care must be exercised when
diff --git a/sys/arch/mvme88k/mvme88k/m8820x.c b/sys/arch/mvme88k/mvme88k/m8820x.c
index 20b65def78f..8011a7e5abc 100644
--- a/sys/arch/mvme88k/mvme88k/m8820x.c
+++ b/sys/arch/mvme88k/mvme88k/m8820x.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: m8820x.c,v 1.37 2004/08/04 13:16:14 miod Exp $ */
+/* $OpenBSD: m8820x.c,v 1.38 2004/08/04 15:54:38 miod Exp $ */
/*
* Copyright (c) 2004, Miodrag Vallat.
*
@@ -120,10 +120,7 @@ void m8820x_cmmu_parity_enable(void);
unsigned m8820x_cmmu_cpu_number(void);
void m8820x_cmmu_set_sapr(unsigned, unsigned);
void m8820x_cmmu_set_uapr(unsigned);
-void m8820x_cmmu_set_pair_batc_entry(unsigned, unsigned, unsigned);
void m8820x_cmmu_flush_tlb(unsigned, unsigned, vaddr_t, vsize_t);
-void m8820x_cmmu_pmap_activate(unsigned, unsigned,
- u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]);
void m8820x_cmmu_flush_cache(int, paddr_t, psize_t);
void m8820x_cmmu_flush_inst_cache(int, paddr_t, psize_t);
void m8820x_cmmu_flush_data_cache(int, paddr_t, psize_t);
@@ -143,9 +140,7 @@ struct cmmu_p cmmu8820x = {
m8820x_cmmu_cpu_number,
m8820x_cmmu_set_sapr,
m8820x_cmmu_set_uapr,
- m8820x_cmmu_set_pair_batc_entry,
m8820x_cmmu_flush_tlb,
- m8820x_cmmu_pmap_activate,
m8820x_cmmu_flush_cache,
m8820x_cmmu_flush_inst_cache,
m8820x_cmmu_flush_data_cache,
@@ -833,37 +828,17 @@ m8820x_cmmu_set_uapr(unsigned ap)
int cpu = cpu_number();
CMMU_LOCK;
- /* this functionality also mimiced in m8820x_cmmu_pmap_activate() */
m8820x_cmmu_set(CMMU_UAPR, ap, 0, cpu, 0, 0);
CMMU_UNLOCK;
splx(s);
}
/*
- * Set batc entry number entry_no to value in
- * the data and instruction cache for the named CPU.
- *
- * Except for the cmmu_init, this function and m8820x_cmmu_pmap_activate
- * are the only functions which may set the batc values.
- */
-void
-m8820x_cmmu_set_pair_batc_entry(unsigned cpu, unsigned entry_no, unsigned value)
-{
- CMMU_LOCK;
-
- m8820x_cmmu_set(CMMU_BWP(entry_no), value, MODE_VAL, cpu, DATA_CMMU, 0);
- m8820x_cmmu_set(CMMU_BWP(entry_no), value, MODE_VAL, cpu, INST_CMMU, 0);
-
- CMMU_UNLOCK;
-}
-
-/*
* Functions that invalidate TLB entries.
*/
/*
* flush any tlb
- * Some functionality mimiced in m8820x_cmmu_pmap_activate.
*/
void
m8820x_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr,
@@ -908,39 +883,6 @@ m8820x_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr,
}
/*
- * New fast stuff for pmap_activate.
- * Does what a few calls used to do.
- * Only called from pmap_activate().
- */
-void
-m8820x_cmmu_pmap_activate(unsigned cpu, unsigned uapr, u_int32_t i_batc[],
- u_int32_t d_batc[])
-{
- int entry_no;
-
- CMMU_LOCK;
-
- /* the following is from m8820x_cmmu_set_uapr */
- m8820x_cmmu_set(CMMU_UAPR, uapr, 0, cpu, 0, 0);
-
- for (entry_no = 0; entry_no < BATC_MAX; entry_no++) {
- m8820x_cmmu_set(CMMU_BWP(entry_no), i_batc[entry_no],
- MODE_VAL, cpu, INST_CMMU, 0);
- m8820x_cmmu_set(CMMU_BWP(entry_no), d_batc[entry_no],
- MODE_VAL, cpu, DATA_CMMU, 0);
- }
-
- /*
- * Flush the user TLB.
- * IF THE KERNEL WILL EVER CARE ABOUT THE BATC ENTRIES,
- * THE SUPERVISOR TLBs SHOULD BE FLUSHED AS WELL.
- */
- m8820x_cmmu_set(CMMU_SCR, CMMU_FLUSH_USER_ALL, 0, cpu, 0, 0);
-
- CMMU_UNLOCK;
-}
-
-/*
* Functions that invalidate caches.
*
* Cache invalidates require physical addresses. Care must be exercised when