diff options
| -rw-r--r-- | sys/arch/sun3/include/param.h | 70 | ||||
| -rw-r--r-- | sys/arch/sun3/include/psl.h | 115 |
2 files changed, 70 insertions, 115 deletions
diff --git a/sys/arch/sun3/include/param.h b/sys/arch/sun3/include/param.h index 4bdfc44ed70..e51b4777790 100644 --- a/sys/arch/sun3/include/param.h +++ b/sys/arch/sun3/include/param.h @@ -148,10 +148,78 @@ #define sun3_btop(x) ((unsigned)(x) >> PGSHIFT) #define sun3_ptob(x) ((unsigned)(x) << PGSHIFT) -/* XXX - Does this really belong here? -gwr */ #include <machine/psl.h> #if defined(_KERNEL) && !defined(_LOCORE) + +#ifndef __GNUC__ +/* No inline, use real function in locore.s */ +extern int _spl(int new); +#else /* GNUC */ +/* + * Define an inline function for PSL manipulation. + * This is as close to a macro as one can get. + * If not optimizing, the one in locore.s is used. + * (See the GCC extensions info document.) + */ +extern __inline__ int _spl(int new) +{ + register int old; + + __asm __volatile ( + "clrl %0; movew sr,%0; movew %1,sr" : + "&=d" (old) : "di" (new)); + return (old); +} +#endif /* GNUC */ + +/* + * The rest of this is sun3 specific, because other ports may + * need to do special things in spl0() (i.e. simulate SIR). + * Suns have a REAL interrupt register, so spl0() and splx(s) + * have no need to check for any simulated interrupts, etc. + */ + +#define spl0() _spl(PSL_S|PSL_IPL0) +#define spl1() _spl(PSL_S|PSL_IPL1) +#define spl2() _spl(PSL_S|PSL_IPL2) +#define spl3() _spl(PSL_S|PSL_IPL3) +#define spl4() _spl(PSL_S|PSL_IPL4) +#define spl5() _spl(PSL_S|PSL_IPL5) +#define spl6() _spl(PSL_S|PSL_IPL6) +#define spl7() _spl(PSL_S|PSL_IPL7) +#define splx(x) _spl(x) + +/* IPL used by soft interrupts: netintr(), softclock() */ +#define splsoftclock() spl1() +#define splsoftnet() spl1() + +/* Highest block device (strategy) IPL. */ +#define splbio() spl2() + +/* Highest network interface IPL. */ +#define splnet() spl3() + +/* Highest tty device IPL. */ +#define spltty() spl4() + +/* Requirement: imp >= (highest network, tty, or disk IPL) */ +#define splimp() spl4() + +/* Intersil clock hardware interrupts (hard-wired at 5) */ +#define splclock() spl5() +#define splstatclock() splclock() + +/* Zilog Serial hardware interrupts (hard-wired at 6) */ +#define splzs() spl6() + +/* Block out all interrupts (except NMI of course). */ +#define splhigh() spl7() +#define splsched() spl7() + +/* Get current sr value (debug, etc.) */ +extern int getsr __P((void)); + extern void _delay __P((unsigned)); #define delay(us) _delay((us)<<8) #define DELAY(n) delay(n) diff --git a/sys/arch/sun3/include/psl.h b/sys/arch/sun3/include/psl.h index d3daa930e6c..880325d1fe4 100644 --- a/sys/arch/sun3/include/psl.h +++ b/sys/arch/sun3/include/psl.h @@ -1,116 +1,3 @@ -/* $OpenBSD: psl.h,v 1.6 1997/01/16 04:04:10 kstailey Exp $ */ -/* $NetBSD: psl.h,v 1.10 1996/11/20 18:57:17 gwr Exp $ */ +/* $OpenBSD: psl.h,v 1.7 1997/02/14 17:49:35 kstailey Exp $ */ -/*- - * Copyright (c) 1996 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Gordon W. Ross. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef PSL_C #include <m68k/psl.h> - -/* Could define this in the common <m68k/psl.h> instead. */ - -#if defined(_KERNEL) && !defined(_LOCORE) - -#ifndef __GNUC__ -/* No inline, use real function in locore.s */ -extern int _spl(int new); -#else /* GNUC */ -/* - * Define an inline function for PSL manipulation. - * This is as close to a macro as one can get. - * If not optimizing, the one in locore.s is used. - * (See the GCC extensions info document.) - */ -extern __inline__ int _spl(int new) -{ - register int old; - - __asm __volatile ( - "clrl %0; movew sr,%0; movew %1,sr" : - "&=d" (old) : "di" (new)); - return (old); -} -#endif /* GNUC */ - -/* - * The rest of this is sun3 specific, because other ports may - * need to do special things in spl0() (i.e. simulate SIR). - * Suns have a REAL interrupt register, so spl0() and splx(s) - * have no need to check for any simulated interrupts, etc. - */ - -#define spl0() _spl(PSL_S|PSL_IPL0) -#define spl1() _spl(PSL_S|PSL_IPL1) -#define spl2() _spl(PSL_S|PSL_IPL2) -#define spl3() _spl(PSL_S|PSL_IPL3) -#define spl4() _spl(PSL_S|PSL_IPL4) -#define spl5() _spl(PSL_S|PSL_IPL5) -#define spl6() _spl(PSL_S|PSL_IPL6) -#define spl7() _spl(PSL_S|PSL_IPL7) -#define splx(x) _spl(x) - -/* IPL used by soft interrupts: netintr(), softclock() */ -#define splsoftclock() spl1() -#define splsoftnet() spl1() - -/* Highest block device (strategy) IPL. */ -#define splbio() spl2() - -/* Highest network interface IPL. */ -#define splnet() spl3() - -/* Highest tty device IPL. */ -#define spltty() spl4() - -/* Requirement: imp >= (highest network, tty, or disk IPL) */ -#define splimp() spl4() - -/* Intersil clock hardware interrupts (hard-wired at 5) */ -#define splclock() spl5() -#define splstatclock() splclock() - -/* Zilog Serial hardware interrupts (hard-wired at 6) */ -#define splzs() spl6() - -/* Block out all interrupts (except NMI of course). */ -#define splhigh() spl7() -#define splsched() spl7() - -/* Get current sr value (debug, etc.) */ -extern int getsr __P((void)); - -#endif /* KERNEL && !_LOCORE */ -#endif /* PSL_C */ |