diff options
| -rw-r--r-- | sys/arch/i386/i386/machdep.c | 30 | ||||
| -rw-r--r-- | sys/arch/i386/pci/geodesc.c | 29 |
2 files changed, 29 insertions, 30 deletions
diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index 03494f86dbc..83b9e14589f 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.366 2006/10/05 01:36:41 mickey Exp $ */ +/* $OpenBSD: machdep.c,v 1.367 2006/10/17 21:28:23 tom Exp $ */ /* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */ /*- @@ -1340,32 +1340,6 @@ cyrix6x86_cpu_setup(struct cpu_info *ci) #endif } -#if defined(I586_CPU) || defined(I686_CPU) -void natsem6x86_cpureset(void); - -void -natsem6x86_cpureset(void) -{ - /* - * Reset AMD Geode SC1100. - * - * 1) Write PCI Configuration Address Register (0xcf8) to - * select Function 0, Register 0x44: Bridge Configuration, - * GPIO and LPC Configuration Register Space, Reset - * Control Register. - * - * 2) Write 0xf to PCI Configuration Data Register (0xcfc) - * to reset IDE controller, IDE bus, and PCI bus, and - * to trigger a system-wide reset. - * - * See AMD Geode SC1100 Processor Data Book, Revision 2.0, - * sections 6.3.1, 6.3.2, and 6.4.1. - */ - outl(0xCF8, 0x80009044UL); - outb(0xCFC, 0x0F); -} -#endif - void natsem6x86_cpu_setup(struct cpu_info *ci) { @@ -1380,11 +1354,9 @@ natsem6x86_cpu_setup(struct cpu_info *ci) printf("%s: TSC disabled\n", ci->ci_dev.dv_xname); break; } - cpuresetfn = natsem6x86_cpureset; #endif } - void intel586_cpu_setup(struct cpu_info *ci) { diff --git a/sys/arch/i386/pci/geodesc.c b/sys/arch/i386/pci/geodesc.c index a38dc38624d..bede835d89b 100644 --- a/sys/arch/i386/pci/geodesc.c +++ b/sys/arch/i386/pci/geodesc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: geodesc.c,v 1.6 2006/09/29 19:31:23 mpf Exp $ */ +/* $OpenBSD: geodesc.c,v 1.7 2006/10/17 21:28:23 tom Exp $ */ /* * Copyright (c) 2003 Markus Friedl <markus@openbsd.org> @@ -45,6 +45,7 @@ struct geodesc_softc { int geodesc_match(struct device *, void *, void *); void geodesc_attach(struct device *, struct device *, void *); int geodesc_wdogctl_cb(void *, int); +void sc1100_sysreset(void); struct cfattach geodesc_ca = { sizeof(struct geodesc_softc), geodesc_match, geodesc_attach @@ -89,6 +90,7 @@ geodesc_attach(struct device *parent, struct device *self, void *aux) uint16_t cnfg, cba; uint8_t sts, rev, iid; pcireg_t reg; + extern void (*cpuresetfn)(void); reg = pci_conf_read(pa->pa_pc, pa->pa_tag, SC1100_F5_SCRATCHPAD); sc->sc_iot = pa->pa_iot; @@ -124,6 +126,9 @@ geodesc_attach(struct device *parent, struct device *self, void *aux) geodesc_timecounter.tc_priv = sc; tc_init(&geodesc_timecounter); #endif /* __HAVE_TIMECOUNTER */ + + /* We have a special way to reset the CPU on the SC1100 */ + cpuresetfn = sc1100_sysreset; } int @@ -146,3 +151,25 @@ geodesc_get_timecount(struct timecounter *tc) return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, GCB_TSC)); } #endif /* __HAVE_TIMECOUNTER */ + +void +sc1100_sysreset(void) +{ + /* + * Reset AMD Geode SC1100. + * + * 1) Write PCI Configuration Address Register (0xcf8) to + * select Function 0, Register 0x44: Bridge Configuration, + * GPIO and LPC Configuration Register Space, Reset + * Control Register. + * + * 2) Write 0xf to PCI Configuration Data Register (0xcfc) + * to reset IDE controller, IDE bus, and PCI bus, and + * to trigger a system-wide reset. + * + * See AMD Geode SC1100 Processor Data Book, Revision 2.0, + * sections 6.3.1, 6.3.2, and 6.4.1. + */ + outl(0xCF8, 0x80009044UL); + outb(0xCFC, 0x0F); +} |