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-rw-r--r--share/man/man4/viasio.413
-rw-r--r--sys/dev/isa/viasio.c79
-rw-r--r--sys/dev/isa/viasioreg.h22
3 files changed, 109 insertions, 5 deletions
diff --git a/share/man/man4/viasio.4 b/share/man/man4/viasio.4
index 9499cd8928c..8907723fab8 100644
--- a/share/man/man4/viasio.4
+++ b/share/man/man4/viasio.4
@@ -1,4 +1,4 @@
-.\" $OpenBSD: viasio.4,v 1.2 2005/07/28 21:08:35 jmc Exp $
+.\" $OpenBSD: viasio.4,v 1.3 2005/09/29 19:53:24 grange Exp $
.\"
.\" Copyright (c) 2005 Alexander Yurchenko <grange@openbsd.org>
.\"
@@ -27,7 +27,8 @@
The
.Nm
driver provides support for the VIA VT1211 LPC Super I/O IC.
-Only the hardware monitoring function is currently supported.
+The hardware monitoring and a watchdog timer functions are currently
+supported.
.Pp
The hardware monitor provides hardware monitoring capabilities
to be used with the
@@ -51,9 +52,17 @@ If the hardware monitor is not enabled by firmware, the driver can try
to enable it if value 0x0001 is presented in the
.Ar flags .
Note that enabling the hardware monitor can lead to unexpected results.
+.Pp
+The watchdog timer provides a standard
+.Xr watchdog 4
+interface.
+If the watchdog timer is not enabled by firmware, the driver can try
+to enable it if value 0x0002 is presented in the
+.Ar flags .
.Sh SEE ALSO
.Xr intro 4 ,
.Xr isa 4 ,
+.Xr watchdog 4 ,
.Xr sensorsd 8 ,
.Xr sysctl 8
.Sh HISTORY
diff --git a/sys/dev/isa/viasio.c b/sys/dev/isa/viasio.c
index 141ca33dfa6..64fab3a03b7 100644
--- a/sys/dev/isa/viasio.c
+++ b/sys/dev/isa/viasio.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: viasio.c,v 1.2 2005/07/31 16:17:42 grange Exp $ */
+/* $OpenBSD: viasio.c,v 1.3 2005/09/29 19:53:23 grange Exp $ */
/*
* Copyright (c) 2005 Alexander Yurchenko <grange@openbsd.org>
*
@@ -41,6 +41,7 @@
/* autoconf flags */
#define VIASIO_CFFLAGS_HM_ENABLE 0x0001 /* enable HM if disabled */
+#define VIASIO_CFFLAGS_WDG_ENABLE 0x0002 /* enable WDG if disabled */
struct viasio_softc {
struct device sc_dev;
@@ -53,6 +54,9 @@ struct viasio_softc {
int sc_hm_clock;
struct sensor sc_hm_sensors[VT1211_HM_NSENSORS];
struct timeout sc_hm_timo;
+
+ /* Watchdog timer */
+ bus_space_handle_t sc_wdg_ioh;
};
int viasio_probe(struct device *, void *, void *);
@@ -61,6 +65,9 @@ void viasio_attach(struct device *, struct device *, void *);
void viasio_hm_init(struct viasio_softc *);
void viasio_hm_refresh(void *);
+void viasio_wdg_init(struct viasio_softc *);
+int viasio_wdg_cb(void *, int);
+
struct cfattach viasio_ca = {
sizeof(struct viasio_softc),
viasio_probe,
@@ -181,6 +188,7 @@ viasio_attach(struct device *parent, struct device *self, void *aux)
/* Initialize logical devices */
viasio_hm_init(sc);
+ viasio_wdg_init(sc);
printf("\n");
/* Escape from configuration mode */
@@ -430,3 +438,72 @@ viasio_hm_refresh(void *arg)
timeout_add(&sc->sc_hm_timo, hz);
}
+
+void
+viasio_wdg_init(struct viasio_softc *sc)
+{
+ u_int8_t reg0, reg1;
+ u_int16_t iobase;
+
+ printf(": WDG");
+
+ /* Select WDG logical device */
+ viasio_conf_write(sc->sc_iot, sc->sc_ioh, VT1211_LDN, VT1211_LDN_WDG);
+
+ /*
+ * Check if logical device is activated by firmware. If not
+ * try to activate it only if requested.
+ */
+ reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_WDG_ACT);
+ DPRINTF((": ACT 0x%02x", reg0));
+ if ((reg0 & VT1211_WDG_ACT_EN) == 0) {
+ if ((sc->sc_dev.dv_cfdata->cf_flags &
+ VIASIO_CFFLAGS_WDG_ENABLE) != 0) {
+ reg0 |= VT1211_WDG_ACT_EN;
+ viasio_conf_write(sc->sc_iot, sc->sc_ioh,
+ VT1211_WDG_ACT, reg0);
+ reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh,
+ VT1211_WDG_ACT);
+ DPRINTF((", new ACT 0x%02x", reg0));
+ if ((reg0 & VT1211_WDG_ACT_EN) == 0) {
+ printf(": failed to activate");
+ return;
+ }
+ } else {
+ printf(": not activated");
+ return;
+ }
+ }
+
+ /* Read WDG I/O space address */
+ reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_WDG_ADDR_LSB);
+ reg1 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_WDG_ADDR_MSB);
+ iobase = (reg1 << 8) | reg0;
+ DPRINTF((", addr 0x%04x", iobase));
+
+ /* Map WDG I/O space */
+ if (bus_space_map(sc->sc_iot, iobase, VT1211_WDG_IOSIZE, 0,
+ &sc->sc_wdg_ioh)) {
+ printf(": can't map I/O space");
+ return;
+ }
+
+ /* Register new watchdog */
+ wdog_register(sc, viasio_wdg_cb);
+}
+
+int
+viasio_wdg_cb(void *arg, int period)
+{
+ struct viasio_softc *sc = arg;
+ int mins;
+
+ mins = (period + 59) / 60;
+ if (mins > 255)
+ mins = 255;
+
+ bus_space_write_1(sc->sc_iot, sc->sc_wdg_ioh, VT1211_WDG_TIMEOUT, mins);
+ DPRINTF(("viasio_wdg_cb: %d mins\n", mins));
+
+ return (mins * 60);
+}
diff --git a/sys/dev/isa/viasioreg.h b/sys/dev/isa/viasioreg.h
index 8b528f7c750..d0b888c429c 100644
--- a/sys/dev/isa/viasioreg.h
+++ b/sys/dev/isa/viasioreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: viasioreg.h,v 1.1 2005/07/28 20:12:13 grange Exp $ */
+/* $OpenBSD: viasioreg.h,v 1.2 2005/09/29 19:53:24 grange Exp $ */
/*
* Copyright (c) 2005 Alexander Yurchenko <grange@openbsd.org>
*
@@ -72,13 +72,31 @@
#define VT1211_LDN_VFIR 0x0c /* Very Fast IR */
#define VT1211_LDN_ROM 0x0d /* Flash ROM */
+/* Watchdog Timer Control Registers (LDN 9) */
+#define VT1211_WDG_ACT 0x30 /* Activate */
+#define VT1211_WDG_ACT_EN (1 << 0) /* enabled */
+#define VT1211_WDG_ADDR_MSB 0x60 /* Address [15:8] */
+#define VT1211_WDG_ADDR_LSB 0x61 /* Address [7:0] */
+#define VT1211_WDG_IRQSEL 0x70 /* IRQ Select */
+#define VT1211_WDG_CONF 0xf0 /* Configuration */
+
/* Hardware Monitor Control Registers (LDN B) */
#define VT1211_HM_ACT 0x30 /* Activate */
-#define VT1211_HM_ACT_EN (1 << 0)
+#define VT1211_HM_ACT_EN (1 << 0) /* enabled */
#define VT1211_HM_ADDR_MSB 0x60 /* Address [15:8] */
#define VT1211_HM_ADDR_LSB 0x61 /* Address [7:0] */
#define VT1211_HM_IRQSEL 0x70 /* IRQ Select */
+/* Watchdog Timer I/O Space Registers */
+#define VT1211_WDG_STAT 0x00 /* Status */
+#define VT1211_WDG_STAT_ACT (1 << 0) /* timer is active */
+#define VT1211_WDG_MASK 0x01 /* Mask */
+#define VT1211_WDG_MASK_COM1 (1 << 1) /* COM1 trigger */
+#define VT1211_WDG_MASK_COM2 (1 << 2) /* COM2 trigger */
+#define VT1211_WDG_TIMEOUT 0x02 /* Timeout */
+
+#define VT1211_WDG_IOSIZE 0x04 /* Watchdog timer I/O space size */
+
/* Hardware Monitor I/O Space Registers */
#define VT1211_HM_SELD0 0x10 /* SELD[7:0] */
#define VT1211_HM_SELD1 0x11 /* SELD[15:8] */