diff options
33 files changed, 1565 insertions, 322 deletions
diff --git a/sbin/wsconsctl/util.c b/sbin/wsconsctl/util.c index a661a38c700..c7436636686 100644 --- a/sbin/wsconsctl/util.c +++ b/sbin/wsconsctl/util.c @@ -1,4 +1,4 @@ -/* $OpenBSD: util.c,v 1.21 2003/05/14 06:39:47 miod Exp $ */ +/* $OpenBSD: util.c,v 1.22 2003/06/17 21:21:26 miod Exp $ */ /* $NetBSD: util.c,v 1.8 2000/03/14 08:11:53 sato Exp $ */ /*- @@ -125,6 +125,7 @@ static const struct nameint dpytype_tab[] = { { WSDISPLAY_TYPE_XVIDEO, "xvideo" }, { WSDISPLAY_TYPE_SUNCG12, "suncg12" }, { WSDISPLAY_TYPE_MGX, "mgx" }, + { WSDISPLAY_TYPE_SB_P9000, "p9000" }, }; static const struct nameint kbdenc_tab[] = { diff --git a/share/man/man4/man4.sparc/Makefile b/share/man/man4/man4.sparc/Makefile index 06298fc9ca5..abfe5863921 100644 --- a/share/man/man4/man4.sparc/Makefile +++ b/share/man/man4/man4.sparc/Makefile @@ -1,15 +1,17 @@ -# $OpenBSD: Makefile,v 1.32 2003/05/14 06:48:14 miod Exp $ +# $OpenBSD: Makefile,v 1.33 2003/06/17 21:21:31 miod Exp $ # from: @(#)Makefile 8.2 (Berkeley) 2/16/94 MAN= agten.4 audioamd.4 audiocs.4 autoconf.4 be.4 bwtwo.4 cgtwo.4 \ cgthree.4 cgfour.4 cgsix.4 cgeight.4 cgtwelve.4 cgfourteen.4 \ daadio.4 esp.4 fd.4 fga.4 ie.4 intro.4 le.4 led.4 magma.4 mem.4 \ - mgx.4 openprom.4 pnozz.4 presto.4 qe.4 qec.4 scf.4 si.4 spif.4 sw.4 \ - tctrl.4 tcx.4 tvtwo.4 vigra.4 xbox.4 xd.4 xy.4 zs.4 zx.4 + mgx.4 openprom.4 p9k.4 pnozz.4 presto.4 qe.4 qec.4 scf.4 si.4 \ + spif.4 sw.4 tctrl.4 tcx.4 tvtwo.4 vigra.4 xbox.4 xd.4 xy.4 zs.4 \ + zx.4 MLINKS= fd.4 fdc.4 \ fga.4 fvme.4 \ le.4 lebuffer.4 le.4 ledma.4 \ mem.4 kmem.4 \ + p9k.4 btcham.4 \ zs.4 zskbd.4 \ zs.4 zstty.4 MANSUBDIR=sparc diff --git a/share/man/man4/man4.sparc/agten.4 b/share/man/man4/man4.sparc/agten.4 index 5fbfccca6a8..a48d1ab9f3a 100644 --- a/share/man/man4/man4.sparc/agten.4 +++ b/share/man/man4/man4.sparc/agten.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: agten.4,v 1.4 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: agten.4,v 1.5 2003/06/17 21:21:31 miod Exp $ .\" Copyright (c) 2003 Miodrag Vallat. All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without @@ -58,6 +58,7 @@ interface. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/bwtwo.4 b/share/man/man4/man4.sparc/bwtwo.4 index 4f1411c32aa..3ca6d97f236 100644 --- a/share/man/man4/man4.sparc/bwtwo.4 +++ b/share/man/man4/man4.sparc/bwtwo.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: bwtwo.4,v 1.20 2003/06/02 23:30:13 millert Exp $ +.\" $OpenBSD: bwtwo.4,v 1.21 2003/06/17 21:21:31 miod Exp $ .\" Copyright (c) 1992, 1993 .\" The Regents of the University of California. All rights reserved. .\" @@ -74,6 +74,7 @@ interface. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/cgeight.4 b/share/man/man4/man4.sparc/cgeight.4 index a1f90008a27..b419d94c833 100644 --- a/share/man/man4/man4.sparc/cgeight.4 +++ b/share/man/man4/man4.sparc/cgeight.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: cgeight.4,v 1.18 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: cgeight.4,v 1.19 2003/06/17 21:21:31 miod Exp $ .\" $NetBSD: cgeight.4,v 1.2 1997/10/08 22:00:03 jtc Exp $ .\" .\" Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -71,6 +71,7 @@ interface. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr tcx 4 , .Xr tvtwo 4 , diff --git a/share/man/man4/man4.sparc/cgfour.4 b/share/man/man4/man4.sparc/cgfour.4 index 9f80fbb7aff..eecbe869573 100644 --- a/share/man/man4/man4.sparc/cgfour.4 +++ b/share/man/man4/man4.sparc/cgfour.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: cgfour.4,v 1.17 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: cgfour.4,v 1.18 2003/06/17 21:21:31 miod Exp $ .\" $NetBSD: cgfour.4,v 1.2 1997/10/08 22:00:05 jtc Exp $ .\" .\" Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -71,6 +71,7 @@ interface. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr tcx 4 , .Xr tvtwo 4 , diff --git a/share/man/man4/man4.sparc/cgfourteen.4 b/share/man/man4/man4.sparc/cgfourteen.4 index ec86b733a05..22da34c2ade 100644 --- a/share/man/man4/man4.sparc/cgfourteen.4 +++ b/share/man/man4/man4.sparc/cgfourteen.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: cgfourteen.4,v 1.25 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: cgfourteen.4,v 1.26 2003/06/17 21:21:31 miod Exp $ .\" $NetBSD: cgfourteen.4,v 1.3 1998/06/11 08:32:20 fair Exp $ .\" .\" Copyright (c) 1996 The President and Fellows of Harvard College. @@ -149,6 +149,7 @@ with 4MB VSIMM. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr tcx 4 , .Xr tvtwo 4 , diff --git a/share/man/man4/man4.sparc/cgsix.4 b/share/man/man4/man4.sparc/cgsix.4 index 1cc1cabcd51..8e44b28a768 100644 --- a/share/man/man4/man4.sparc/cgsix.4 +++ b/share/man/man4/man4.sparc/cgsix.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: cgsix.4,v 1.24 2003/06/04 21:47:59 deraadt Exp $ +.\" $OpenBSD: cgsix.4,v 1.25 2003/06/17 21:21:31 miod Exp $ .\" $NetBSD: cgsix.4,v 1.4 1998/06/11 08:32:20 fair Exp $ .\" .\" Copyright 1994 @@ -164,6 +164,7 @@ on the GX+. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/cgthree.4 b/share/man/man4/man4.sparc/cgthree.4 index 02db06bf25e..e1d09cf21f0 100644 --- a/share/man/man4/man4.sparc/cgthree.4 +++ b/share/man/man4/man4.sparc/cgthree.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: cgthree.4,v 1.23 2003/06/02 23:30:13 millert Exp $ +.\" $OpenBSD: cgthree.4,v 1.24 2003/06/17 21:21:31 miod Exp $ .\" $NetBSD: cgthree.4,v 1.4 1998/06/11 08:32:20 fair Exp $ .\" .\" Copyright (c) 1992, 1993 @@ -129,6 +129,7 @@ There are only two resolutions supported, selected by jumper JP2 on the card: .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/cgtwelve.4 b/share/man/man4/man4.sparc/cgtwelve.4 index 235d55b90be..01c1832b643 100644 --- a/share/man/man4/man4.sparc/cgtwelve.4 +++ b/share/man/man4/man4.sparc/cgtwelve.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: cgtwelve.4,v 1.11 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: cgtwelve.4,v 1.12 2003/06/17 21:21:31 miod Exp $ .\" Copyright (c) 2002 Miodrag Vallat. All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without @@ -57,6 +57,7 @@ interface. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/cgtwo.4 b/share/man/man4/man4.sparc/cgtwo.4 index 4df0ee90004..fa9273e9c88 100644 --- a/share/man/man4/man4.sparc/cgtwo.4 +++ b/share/man/man4/man4.sparc/cgtwo.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: cgtwo.4,v 1.17 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: cgtwo.4,v 1.18 2003/06/17 21:21:31 miod Exp $ .\" $NetBSD: cgtwo.4,v 1.3 1997/10/08 22:00:08 jtc Exp $ .\" .\" Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -69,6 +69,7 @@ interface. .Xr cgtwelve 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr tcx 4 , .Xr tvtwo 4 , diff --git a/share/man/man4/man4.sparc/intro.4 b/share/man/man4/man4.sparc/intro.4 index 543e3558dc2..bbf592b1c9e 100644 --- a/share/man/man4/man4.sparc/intro.4 +++ b/share/man/man4/man4.sparc/intro.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: intro.4,v 1.35 2003/06/06 10:29:42 jmc Exp $ +.\" $OpenBSD: intro.4,v 1.36 2003/06/17 21:21:31 miod Exp $ .\" $NetBSD: intro.4,v 1.5 1998/02/06 06:07:00 perry Exp $ .\" .\" Copyright (c) 1996 Jonathan Stone. @@ -156,8 +156,10 @@ MGX and MGXPlus frame buffers. .It Xr openprom 4 .Tn Sun Open boot PROM (what became IEEE 1275) configuration driver. +.It Xr p9k 4 +Weitek Power9000 frame buffer found on Tadpole SPARCbook 3. .It Xr pnozz 4 -Weitek Power9100 frame buffer found on Tadpole SPARCbook 3GS and 3GX. +Weitek Power9100 frame buffer found on Tadpole SPARCbook 3GS, 3GX, 3TX and 3XP. .It Xr presto 4 Prestoserve NVRAM. .It Xr qe 4 diff --git a/share/man/man4/man4.sparc/mgx.4 b/share/man/man4/man4.sparc/mgx.4 index f677fec1354..4220b05b189 100644 --- a/share/man/man4/man4.sparc/mgx.4 +++ b/share/man/man4/man4.sparc/mgx.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: mgx.4,v 1.1 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: mgx.4,v 1.2 2003/06/17 21:21:31 miod Exp $ .\" Copyright (c) 2003 Miodrag Vallat. All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without @@ -58,6 +58,7 @@ interface. .Xr cgtwelve 4 , .Xr cgtwo 4 , .Xr intro 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/p9k.4 b/share/man/man4/man4.sparc/p9k.4 new file mode 100644 index 00000000000..1ab75661ce4 --- /dev/null +++ b/share/man/man4/man4.sparc/p9k.4 @@ -0,0 +1,104 @@ +.\" $OpenBSD: p9k.4,v 1.1 2003/06/17 21:21:31 miod Exp $ +.\" +.\" Copyright (c) 2003, Miodrag Vallat. +.\" Copyright (c) 1999 Jason L. Wright (jason@thought.net) +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, +.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +.\" POSSIBILITY OF SUCH DAMAGE. +.\" +.Dd June 16, 2003 +.Dt P9K 4 sparc +.Os +.Sh NAME +.Nm p9k +.Nd Weitek Power9000 accelerated frame buffer +.Sh SYNOPSIS +.Cd "btcham0 at obio?" +.Cd "p9k0 at sbus? slot ? offset ?" +.Cd "wsdisplay* at p9k?" +.Sh DESCRIPTION +The +.Nm +is a color frame buffer with graphics acceleration, embedded in the +.Tn "Tadpole SPARCbook" +3 laptop. +It is based on the +.Tn "Weitek Power9000" +video processor and a +.Tn Brooktree +Bt445 +.Sq Chameleon +RAMDAC. +.Pp +Due to specifics of the video hardware on the +.Tn Tadpole SPARCbook +3, the complete driver is split in two parts: +.Bl -tag -width Ds -compact +.It Nm btcham +RAMDAC interface +.It Nm p9k +Video controller interface +.El +.Pp +The combination of both +.Nm btcham +and +.Nm +drivers interfaces the frame buffer with the +.Xr wscons 4 +console framework. +They do not provide direct device driver entry points +but make their function available via the internal +.Xr wsdisplay 4 +interface. +.Pp +If the +.Xr tctrl 4 +device is also configured, the +.Nm +will be powered down when the lid of the laptop +is closed or the screen is blanked. +.Sh SEE ALSO +.Xr agten 4 , +.Xr bwtwo 4 , +.Xr cgeight 4 , +.Xr cgfour 4 , +.Xr cgfourteen 4 , +.Xr cgsix 4 , +.Xr cgthree 4 , +.Xr cgtwelve 4 , +.Xr cgtwo 4 , +.Xr intro 4 , +.Xr mgx 4 , +.Xr pnozz 4 , +.Xr sbus 4 , +.Xr tctrl 4 , +.Xr tcx 4 , +.Xr tvtwo 4 , +.Xr vigra 4 , +.Xr wscons 4 , +.Xr wsdisplay 4 , +.Xr zx 4 +.Sh BUGS +There is currently no way to switch back and forth from +the onboard display to the external connector. +It is not possible to change resolutions. diff --git a/share/man/man4/man4.sparc/pnozz.4 b/share/man/man4/man4.sparc/pnozz.4 index af41e3473e9..3616e58a0b5 100644 --- a/share/man/man4/man4.sparc/pnozz.4 +++ b/share/man/man4/man4.sparc/pnozz.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: pnozz.4,v 1.17 2003/06/16 21:08:47 jmc Exp $ +.\" $OpenBSD: pnozz.4,v 1.18 2003/06/17 21:21:31 miod Exp $ .\" .\" Copyright (c) 1999 Jason L. Wright (jason@thought.net) .\" All rights reserved. @@ -74,6 +74,7 @@ is closed or the screen is blanked. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr sbus 4 , .Xr tctrl 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/tctrl.4 b/share/man/man4/man4.sparc/tctrl.4 index 2ec56068e26..b7345770364 100644 --- a/share/man/man4/man4.sparc/tctrl.4 +++ b/share/man/man4/man4.sparc/tctrl.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: tctrl.4,v 1.3 2003/06/02 18:51:34 jason Exp $ +.\" $OpenBSD: tctrl.4,v 1.4 2003/06/17 21:21:31 miod Exp $ .\" .\" Copyright (c) 1999 Jason L. Wright (jason@thought.net) .\" All rights reserved. @@ -35,9 +35,11 @@ .Sh DESCRIPTION The .Nm tctrl -provides control over many functions on the Tadpole 3GS and 3GX laptops. +provides control over many functions on the Tadpole SPARCbook 3 series laptops. The microcontroller is used to power the TFT display down when the laptop lid is closed and when the screen is blanked by the +.Xr p9k 4 +or .Xr pnozz 4 driver. The @@ -50,4 +52,5 @@ flag is set. .Sh SEE ALSO .Xr reboot 2 , .Xr intro 4 , +.Xr p9k 4 , .Xr pnozz 4 diff --git a/share/man/man4/man4.sparc/tcx.4 b/share/man/man4/man4.sparc/tcx.4 index a92afebb062..573d896d3b7 100644 --- a/share/man/man4/man4.sparc/tcx.4 +++ b/share/man/man4/man4.sparc/tcx.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: tcx.4,v 1.24 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: tcx.4,v 1.25 2003/06/17 21:21:31 miod Exp $ .\" $NetBSD: tcx.4,v 1.3 1997/10/08 22:00:14 jtc Exp $ .\" .\" Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -72,6 +72,7 @@ interface. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tvtwo 4 , diff --git a/share/man/man4/man4.sparc/tvtwo.4 b/share/man/man4/man4.sparc/tvtwo.4 index 43e718a960c..3e92b26fbf9 100644 --- a/share/man/man4/man4.sparc/tvtwo.4 +++ b/share/man/man4/man4.sparc/tvtwo.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: tvtwo.4,v 1.5 2003/05/14 06:48:14 miod Exp $ +.\" $OpenBSD: tvtwo.4,v 1.6 2003/06/17 21:21:31 miod Exp $ .\" Copyright (c) 2003 Miodrag Vallat. All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without @@ -58,6 +58,7 @@ interface. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/vigra.4 b/share/man/man4/man4.sparc/vigra.4 index c0e94ac07e6..1651ec02d68 100644 --- a/share/man/man4/man4.sparc/vigra.4 +++ b/share/man/man4/man4.sparc/vigra.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: vigra.4,v 1.11 2003/05/27 06:38:56 miod Exp $ +.\" $OpenBSD: vigra.4,v 1.12 2003/06/17 21:21:31 miod Exp $ .\" Copyright (c) 2002 Miodrag Vallat. All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without @@ -116,6 +116,7 @@ rates. .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/man4.sparc/zx.4 b/share/man/man4/man4.sparc/zx.4 index 0798b4072c8..deb90fe4c30 100644 --- a/share/man/man4/man4.sparc/zx.4 +++ b/share/man/man4/man4.sparc/zx.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: zx.4,v 1.7 2003/06/06 10:29:42 jmc Exp $ +.\" $OpenBSD: zx.4,v 1.8 2003/06/17 21:21:31 miod Exp $ .\" Copyright (c) 2003 Miodrag Vallat. All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without @@ -101,6 +101,7 @@ The selected resolutions are: .Xr cgtwo 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pnozz 4 , .Xr sbus 4 , .Xr tcx 4 , diff --git a/share/man/man4/sbus.4 b/share/man/man4/sbus.4 index 0db5101570d..5dfdcad9fe5 100644 --- a/share/man/man4/sbus.4 +++ b/share/man/man4/sbus.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: sbus.4,v 1.14 2003/06/11 16:15:01 deraadt Exp $ +.\" $OpenBSD: sbus.4,v 1.15 2003/06/17 21:21:30 miod Exp $ .\" $NetBSD: sbus.4,v 1.5 2002/01/21 17:54:10 wiz Exp $ .\" .\" Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -126,8 +126,10 @@ Framebuffer device. Accelerated 24-bit color frame buffer. .It Xr mgx 4 SMS MGX and MGXPlus accelerated 24-bit color frame buffers. +.It Xr p9k 4 +Weitek Power9000 frame buffer found on Tadpole SPARCbook 3. .It Xr pnozz 4 -Tadpole Weitek P9100 frame buffer. +Weitek Power9100 frame buffer found on Tadpole SPARCbook 3GS, 3GX, 3TX and 3XP. .It Xr tcx 4 Accelerated 8/24-bit color frame buffer. .It Xr tvtwo 4 diff --git a/share/man/man4/wsdisplay.4 b/share/man/man4/wsdisplay.4 index 5758cb5641b..caa38ef82ab 100644 --- a/share/man/man4/wsdisplay.4 +++ b/share/man/man4/wsdisplay.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: wsdisplay.4,v 1.22 2003/06/06 10:29:41 jmc Exp $ +.\" $OpenBSD: wsdisplay.4,v 1.23 2003/06/17 21:21:30 miod Exp $ .\" $NetBSD: wsdisplay.4,v 1.5 2000/05/13 15:22:19 mycroft Exp $ .\" .\" Copyright (c) 1999 Matthias Drochner. @@ -56,6 +56,7 @@ .Cd wsdisplay* at cgtwelve? console ? .Cd wsdisplay* at cgfourteen? console ? .Cd wsdisplay* at mgx? console ? +.Cd wsdisplay* at p9k? console ? .Cd wsdisplay* at pnozz? console ? .Cd wsdisplay* at tcx? console ? .Cd wsdisplay* at tvtwo? console ? @@ -188,6 +189,7 @@ control device .Xr creator 4 , .Xr intro 4 , .Xr mgx 4 , +.Xr p9k 4 , .Xr pcdisplay 4 , .Xr pnozz 4 , .Xr sti 4 , diff --git a/sys/arch/sparc/conf/GENERIC b/sys/arch/sparc/conf/GENERIC index c2fcda80f64..9f5b3244212 100644 --- a/sys/arch/sparc/conf/GENERIC +++ b/sys/arch/sparc/conf/GENERIC @@ -1,4 +1,4 @@ -# $OpenBSD: GENERIC,v 1.67 2003/05/14 06:39:49 miod Exp $ +# $OpenBSD: GENERIC,v 1.68 2003/06/17 21:21:31 miod Exp $ # $NetBSD: GENERIC,v 1.48 1997/08/23 19:19:01 mjacob Exp $ # Machine architecture; required by config(8) @@ -277,7 +277,12 @@ wsdisplay* at zx? vigra* at sbus? wsdisplay* at vigra? -# Weitek p9100 found on Tadpole 3GS/3GX +# Weitex P9000 found on Tadpole SPARCbook 3, with external ``Chameleon'' RAMDAC +p9k0 at sbus? +btcham0 at obio? +wsdisplay* at p9k? + +# Weitek P9100 found on Tadpole SPARCbook 3GS/3GX/3TX/3XP pnozz0 at sbus? wsdisplay* at pnozz? diff --git a/sys/arch/sparc/conf/RAMDISK b/sys/arch/sparc/conf/RAMDISK index c50f82ce805..3fd9bae9b95 100644 --- a/sys/arch/sparc/conf/RAMDISK +++ b/sys/arch/sparc/conf/RAMDISK @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISK,v 1.44 2003/05/25 21:55:44 miod Exp $ +# $OpenBSD: RAMDISK,v 1.45 2003/06/17 21:21:31 miod Exp $ # $NetBSD: GENERIC,v 1.28.2.1 1996/07/02 23:55:22 jtc Exp $ # Machine architecture; required by config(8) @@ -271,7 +271,12 @@ wsdisplay* at zx? vigra* at sbus? wsdisplay* at vigra? -# Weitek p9100 found on Tadpole 3GS/3GX +# Weitex P9000 found on Tadpole SPARCbook 3, with external ``Chameleon'' RAMDAC +p9k0 at sbus? +btcham0 at obio? +wsdisplay* at p9k? + +# Weitek P9100 found on Tadpole SPARCbook 3GS/3GX/3TX/3XP pnozz0 at sbus? wsdisplay* at pnozz? diff --git a/sys/arch/sparc/conf/SUN4M b/sys/arch/sparc/conf/SUN4M index d61de374eb5..3af3843f175 100644 --- a/sys/arch/sparc/conf/SUN4M +++ b/sys/arch/sparc/conf/SUN4M @@ -1,4 +1,4 @@ -# $OpenBSD: SUN4M,v 1.52 2003/05/14 06:39:49 miod Exp $ +# $OpenBSD: SUN4M,v 1.53 2003/06/17 21:21:31 miod Exp $ # $NetBSD: GENERIC,v 1.28.2.1 1996/07/02 23:55:22 jtc Exp $ # Machine architecture; required by config(8) @@ -160,7 +160,12 @@ wsdisplay* at zx? vigra* at sbus? wsdisplay* at vigra? -# Weitek p9100 found on Tadpole 3GS/3GX +# Weitex P9000 found on Tadpole SPARCbook 3, with external ``Chameleon'' RAMDAC +p9k0 at sbus? +btcham0 at obio? +wsdisplay* at p9k? + +# Weitek P9100 found on Tadpole SPARCbook 3GS/3GX/3TX/3XP pnozz0 at sbus? wsdisplay* at pnozz? diff --git a/sys/arch/sparc/conf/files.sparc b/sys/arch/sparc/conf/files.sparc index 1aebeea10b4..cbe58eb27d9 100644 --- a/sys/arch/sparc/conf/files.sparc +++ b/sys/arch/sparc/conf/files.sparc @@ -1,4 +1,4 @@ -# $OpenBSD: files.sparc,v 1.54 2003/05/15 04:13:14 miod Exp $ +# $OpenBSD: files.sparc,v 1.55 2003/06/17 21:21:31 miod Exp $ # $NetBSD: files.sparc,v 1.44 1997/08/31 21:29:16 pk Exp $ # @(#)files.sparc 8.1 (Berkeley) 7/19/93 @@ -190,7 +190,16 @@ device cgtwelve: wsemuldisplaydev, rasops1, rasops32, wsemul_sun attach cgtwelve at sbus file arch/sparc/dev/cgtwelve.c cgtwelve -# Onboard Weitek p9100 found on Tadpole 3GS/3GX +# Onboard Weitek P9000 found on Tadpole SPARCbook 3, and BT ``Chameleon'' RAMDAC +device p9k: wsemuldisplaydev, rasops8, wsemul_sun, bt_dac +attach p9k at sbus +file arch/sparc/dev/p9000.c p9k + +device btcham +attach btcham at obio +file arch/sparc/dev/bt445.c btcham + +# Onboard Weitek p9100 found on Tadpole SPARCbook 3GS/3GX/3TX/3XP device pnozz: wsemuldisplaydev, rasops8, rasops16, rasops24, rasops32, wsemul_sun, bt_dac attach pnozz at sbus file arch/sparc/dev/p9100.c pnozz diff --git a/sys/arch/sparc/dev/bt445.c b/sys/arch/sparc/dev/bt445.c new file mode 100644 index 00000000000..33859e2c9d6 --- /dev/null +++ b/sys/arch/sparc/dev/bt445.c @@ -0,0 +1,98 @@ +/* $OpenBSD: bt445.c,v 1.1 2003/06/17 21:21:31 miod Exp $ */ +/* + * Copyright (c) 2003, Miodrag Vallat. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * A skeleton driver for the Brooktree BT445 ``Chameleon'' RAMDAC found + * on the early Tadpole SPARCbook 3 machines. + * + * It will not perform anything by itself, but frame buffer drivers can use + * its softc structure to be able to access the RAMDAC themselves - creating + * a ramdac API for just this specific case of separate attachments is not + * worth doing. + */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/device.h> +#include <sys/conf.h> + +#include <machine/autoconf.h> + +#include <sparc/dev/bt445reg.h> +#include <sparc/dev/bt445var.h> + +void btcham_attach(struct device *, struct device *, void *); +int btcham_match(struct device *, void *, void *); + +struct cfattach btcham_ca = { + sizeof(struct bt445_softc), btcham_match, btcham_attach +}; + +struct cfdriver btcham_cd = { + NULL, "btcham", DV_DULL +}; + +/* + * Match a chameleon + */ +int +btcham_match(struct device *parent, void *vcf, void *aux) +{ + struct confargs *ca = aux; + struct romaux *ra = &ca->ca_ra; + + if (strcmp("bt445", ra->ra_name) != 0) + return (0); + + return (1); +} + +/* + * Attach a chameleon + */ +void +btcham_attach(struct device *parent, struct device *self, void *args) +{ + struct confargs *ca = args; + struct bt445_softc *sc = (struct bt445_softc *)self; + int id, rev; + + /* + * Map the registers + */ + sc->sc_regs = mapiodev(ca->ca_ra.ra_reg, 0, ca->ca_ra.ra_len); + + /* + * Report a few values to please the user. + */ + sc->sc_regs[BT445_ADDRESS] = BT445_REGISTER_OFFSET(BT445_ID); + id = sc->sc_regs[BT445_REGISTER_INDEX(BT445_ID)]; + + sc->sc_regs[BT445_ADDRESS] = BT445_REGISTER_OFFSET(BT445_ID); + rev = sc->sc_regs[BT445_REGISTER_INDEX(BT445_ID)]; + + printf(": id 0x%x, revision 0x%x\n", id, rev); +} diff --git a/sys/arch/sparc/dev/bt445reg.h b/sys/arch/sparc/dev/bt445reg.h new file mode 100644 index 00000000000..ed6b4079c8f --- /dev/null +++ b/sys/arch/sparc/dev/bt445reg.h @@ -0,0 +1,53 @@ +/* $OpenBSD: bt445reg.h,v 1.1 2003/06/17 21:21:31 miod Exp $ */ +/* + * Copyright (c) 2003, Miodrag Vallat. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Actual BT445 register layout + */ + +/* Read/write address */ +#define BT445_ADDRESS 0 + +/* + * Access to a register is done by programming the address register with + * the low 8 bits, and then reading or writing at the register pointed out + * by the high 8 bits. + */ +#define BT445_REGISTER_OFFSET(x) ((x) & 0xff) +#define BT445_REGISTER_INDEX(x) (((x) >> 8) & 0xff) + +/* Palette data - 3 r/w cycles par address, and autoincrement */ +#define BT445_PALDATA 1 + +/* Overlay palette data - 3 r/w cycles par address, and autoincrement */ +#define BT445_OVPALDATA 3 + +/* + * Various registers (very incomplete...) + */ +#define BT445_ID 0x0200 +#define BT445_REVISION 0x0201 + diff --git a/sys/arch/sparc/dev/bt445var.h b/sys/arch/sparc/dev/bt445var.h new file mode 100644 index 00000000000..956587c9956 --- /dev/null +++ b/sys/arch/sparc/dev/bt445var.h @@ -0,0 +1,31 @@ +/* $OpenBSD: bt445var.h,v 1.1 2003/06/17 21:21:31 miod Exp $ */ +/* + * Copyright (c) 2003, Miodrag Vallat. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +struct bt445_softc { + struct device sc_dev; + + volatile u_int8_t *sc_regs; /* RAMDAC registers */ +}; diff --git a/sys/arch/sparc/dev/p9000.c b/sys/arch/sparc/dev/p9000.c new file mode 100644 index 00000000000..50cd26d3227 --- /dev/null +++ b/sys/arch/sparc/dev/p9000.c @@ -0,0 +1,746 @@ +/* $OpenBSD: p9000.c,v 1.1 2003/06/17 21:21:32 miod Exp $ */ +/* + * Copyright (c) 2003, Miodrag Vallat. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Driver for the Tadpole SPARCbook 3 on-board display. + * Heavily based on the p9100 driver. + */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/buf.h> +#include <sys/device.h> +#include <sys/ioctl.h> +#include <sys/malloc.h> +#include <sys/mman.h> +#include <sys/tty.h> +#include <sys/conf.h> + +#include <uvm/uvm_extern.h> + +#include <machine/autoconf.h> +#include <machine/pmap.h> +#include <machine/cpu.h> +#include <machine/conf.h> + +#include <dev/wscons/wsconsio.h> +#include <dev/wscons/wsdisplayvar.h> +#include <dev/wscons/wscons_raster.h> +#include <dev/rasops/rasops.h> +#include <machine/fbvar.h> + +#include <sparc/dev/btreg.h> +#include <sparc/dev/btvar.h> +#include <sparc/dev/bt445reg.h> +#include <sparc/dev/bt445var.h> +#include <sparc/dev/sbusvar.h> + +#include <dev/ic/p9000.h> + +#include "tctrl.h" +#if NTCTRL > 0 +#include <sparc/dev/tctrlvar.h> +#endif + +/* per-display variables */ +struct p9000_softc { + struct sunfb sc_sunfb; /* common base part */ + struct sbusdev sc_sd; /* sbus device */ + struct rom_reg sc_phys; /* phys address description */ + volatile u_int8_t *sc_cmd; /* command registers (dac, etc) */ + volatile u_int8_t *sc_ctl; /* control registers (draw engine) */ + union bt_cmap sc_cmap; /* Brooktree color map */ + volatile u_int8_t *sc_ramdac; /* BT445 registers */ + struct intrhand sc_ih; + int sc_nscreens; + u_int32_t sc_junk; /* throwaway value */ +}; + +struct wsscreen_descr p9000_stdscreen = { + "std", +}; + +const struct wsscreen_descr *p9000_scrlist[] = { + &p9000_stdscreen, +}; + +struct wsscreen_list p9000_screenlist = { + sizeof(p9000_scrlist) / sizeof(struct wsscreen_descr *), + p9000_scrlist +}; + +int p9000_ioctl(void *, u_long, caddr_t, int, struct proc *); +int p9000_alloc_screen(void *, const struct wsscreen_descr *, void **, + int *, int *, long *); +void p9000_free_screen(void *, void *); +int p9000_show_screen(void *, void *, int, void (*cb)(void *, int, int), + void *); +paddr_t p9000_mmap(void *, off_t, int); +static __inline__ void p9000_loadcmap_deferred(struct p9000_softc *, + u_int, u_int); +void p9000_loadcmap_immediate(struct p9000_softc *, u_int, u_int); +void p9000_setcolor(void *, u_int, u_int8_t, u_int8_t, u_int8_t); +void p9000_burner(void *, u_int, u_int); +int p9000_intr(void *); + +struct wsdisplay_accessops p9000_accessops = { + p9000_ioctl, + p9000_mmap, + p9000_alloc_screen, + p9000_free_screen, + p9000_show_screen, + NULL, /* load_font */ + NULL, /* scrollback */ + NULL, /* getchar */ + p9000_burner, +}; + +void p9000_ras_init(struct p9000_softc *); +void p9000_ras_copycols(void *, int, int, int, int); +void p9000_ras_copyrows(void *, int, int, int); +void p9000_ras_do_cursor(struct rasops_info *); +void p9000_ras_erasecols(void *, int, int, int, long int); +void p9000_ras_eraserows(void *, int, int, long int); + +int p9000match(struct device *, void *, void *); +void p9000attach(struct device *, struct device *, void *); + +struct cfattach p9k_ca = { + sizeof (struct p9000_softc), p9000match, p9000attach +}; + +struct cfdriver p9k_cd = { + NULL, "p9k", DV_DULL +}; + +/* + * SBus registers mappings + */ +#define P9000_NREG 5 /* actually, 7 total */ +#define P9000_REG_CTL 0 +#define P9000_REG_CMD 1 +#define P9000_REG_VRAM 4 + +/* + * P9000 read/write macros + */ + +#define P9000_READ_CTL(sc,reg) \ + *(volatile u_int32_t *)((sc)->sc_ctl + (reg)) +#define P9000_READ_CMD(sc,reg) \ + *(volatile u_int32_t *)((sc)->sc_cmd + (reg)) + +#define P9000_WRITE_CTL(sc,reg,value) \ + *(volatile u_int32_t *)((sc)->sc_ctl + (reg)) = (value) +#define P9000_WRITE_CMD(sc,reg,value) \ + *(volatile u_int32_t *)((sc)->sc_cmd + (reg)) = (value) + +/* + * On the Tadpole, the first write to a register group is ignored until + * the proper group address is latched, which can be done by reading from the + * register group first. + * + * Register groups are 0x80 bytes long (i.e. it is necessary to force a read + * when writing to an adress which upper 25 bit differ from the previous + * read or write operation). + * + * This is specific to the Tadpole design, and not a limitation of the + * Power 9000 hardware. + */ +#define P9000_SELECT_SCR(sc) \ + (sc)->sc_junk = P9000_READ_CTL(sc, P9000_SYSTEM_CONFIG) +#define P9000_SELECT_VCR(sc) \ + (sc)->sc_junk = P9000_READ_CTL(sc, P9000_HCR) +#define P9000_SELECT_VRAM(sc) \ + (sc)->sc_junk = P9000_READ_CTL(sc, P9000_MCR) +#define P9000_SELECT_PE(sc) \ + (sc)->sc_junk = P9000_READ_CMD(sc, P9000_PE_STATUS) +#define P9000_SELECT_DE_LOW(sc) \ + (sc)->sc_junk = P9000_READ_CMD(sc, P9000_DE_FG_COLOR) +#define P9000_SELECT_DE_HIGH(sc) \ + (sc)->sc_junk = P9000_READ_CMD(sc, P9000_DE_PATTERN(0)) +#define P9000_SELECT_COORD(sc,field) \ + (sc)->sc_junk = P9000_READ_CMD(sc, field) + + +int +p9000match(struct device *parent, void *vcf, void *aux) +{ + struct confargs *ca = aux; + struct romaux *ra = &ca->ca_ra; + + if (strcmp("p9000", ra->ra_name)) + return (0); + + return (1); +} + +void +p9000attach(struct device *parent, struct device *self, void *args) +{ + struct p9000_softc *sc = (struct p9000_softc *)self; + struct confargs *ca = args; + struct wsemuldisplaydev_attach_args waa; + int node, row, isconsole, scr; + struct device *btdev; + extern struct cfdriver btcham_cd; + +#ifdef DIAGNOSTIC + if (ca->ca_ra.ra_nreg < P9000_NREG) { + printf(": expected %d registers, got only %d\n", + P9000_NREG, ca->ca_ra.ra_nreg); + return; + } +#endif + + /* + * Find the RAMDAC device. It should have attached before, since it + * attaches at obio. If, for some reason, it did not, it's not worth + * going any further. + * + * We rely upon the PROM to properly initialize the RAMDAC in a safe + * mode. + */ + btdev = btcham_cd.cd_ndevs != 0 ? btcham_cd.cd_devs[0] : NULL; + if (btdev != NULL) + sc->sc_ramdac = ((struct bt445_softc *)btdev)->sc_regs; + + if (sc->sc_ramdac == NULL) { + printf(": bt445 did not attach previously\n"); + return; + } + + sc->sc_phys = ca->ca_ra.ra_reg[P9000_REG_VRAM]; + + sc->sc_ctl = mapiodev(&(ca->ca_ra.ra_reg[P9000_REG_CTL]), 0, + ca->ca_ra.ra_reg[0].rr_len); + sc->sc_cmd = mapiodev(&(ca->ca_ra.ra_reg[P9000_REG_CMD]), 0, + ca->ca_ra.ra_reg[1].rr_len); + + node = ca->ca_ra.ra_node; + isconsole = node == fbnode; + + fb_setsize(&sc->sc_sunfb, 8, 640, 480, node, ca->ca_bustype); + sc->sc_sunfb.sf_ro.ri_bits = mapiodev(&sc->sc_phys, 0, + round_page(sc->sc_sunfb.sf_fbsize)); + sc->sc_sunfb.sf_ro.ri_hw = sc; + + P9000_SELECT_SCR(sc); + scr = P9000_READ_CTL(sc, P9000_SYSTEM_CONFIG); + + printf(": rev %x, %dx%d\n", scr & SCR_ID_MASK, + sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height); + + sc->sc_ih.ih_fun = p9000_intr; + sc->sc_ih.ih_arg = sc; + intr_establish(ca->ca_ra.ra_intr[0].int_pri, &sc->sc_ih, IPL_FB); + + /* Disable frame buffer interrupts */ + P9000_SELECT_SCR(sc); + P9000_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE, IER_MASTER_ENABLE | 0); + + /* + * If the framebuffer width is under 1024x768, we will switch from the + * PROM font to the more adequate 8x16 font here. + * However, we need to adjust two things in this case: + * - the display row should be overrided from the current PROM metrics, + * to prevent us from overwriting the last few lines of text. + * - if the 80x34 screen would make a large margin appear around it, + * choose to clear the screen rather than keeping old prom output in + * the margins. + * XXX there should be a rasops "clear margins" feature + */ + fbwscons_init(&sc->sc_sunfb, + isconsole && (sc->sc_sunfb.sf_width >= 1024)); + fbwscons_setcolormap(&sc->sc_sunfb, p9000_setcolor); + + /* + * Plug-in accelerated console operations. + */ + sc->sc_sunfb.sf_ro.ri_ops.copycols = p9000_ras_copycols; + sc->sc_sunfb.sf_ro.ri_ops.copyrows = p9000_ras_copyrows; + sc->sc_sunfb.sf_ro.ri_ops.erasecols = p9000_ras_erasecols; + sc->sc_sunfb.sf_ro.ri_ops.eraserows = p9000_ras_eraserows; + sc->sc_sunfb.sf_ro.ri_do_cursor = p9000_ras_do_cursor; + p9000_ras_init(sc); + + p9000_stdscreen.capabilities = sc->sc_sunfb.sf_ro.ri_caps; + p9000_stdscreen.nrows = sc->sc_sunfb.sf_ro.ri_rows; + p9000_stdscreen.ncols = sc->sc_sunfb.sf_ro.ri_cols; + p9000_stdscreen.textops = &sc->sc_sunfb.sf_ro.ri_ops; + + sbus_establish(&sc->sc_sd, &sc->sc_sunfb.sf_dev); + + /* enable video */ + p9000_burner(sc, 1, 0); + + if (isconsole) { + if (sc->sc_sunfb.sf_width < 1024) + row = 0; /* screen has been cleared above */ + else + row = -1; + + fbwscons_console_init(&sc->sc_sunfb, &p9000_stdscreen, row, + p9000_burner); + } + + waa.console = isconsole; + waa.scrdata = &p9000_screenlist; + waa.accessops = &p9000_accessops; + waa.accesscookie = sc; + config_found(self, &waa, wsemuldisplaydevprint); +} + +int +p9000_ioctl(void *v, u_long cmd, caddr_t data, int flags, struct proc *p) +{ + struct p9000_softc *sc = v; + struct wsdisplay_fbinfo *wdf; + struct wsdisplay_cmap *cm; +#if NTCTRL > 0 + struct wsdisplay_param *dp; +#endif + int error; + + switch (cmd) { + + case WSDISPLAYIO_GTYPE: + *(u_int *)data = WSDISPLAY_TYPE_SB_P9000; + break; + + case WSDISPLAYIO_SMODE: + /* Restore proper acceleration state upon leaving X11 */ + if (*(u_int *)data == WSDISPLAYIO_MODE_EMUL) { + p9000_ras_init(sc); + } + break; + + case WSDISPLAYIO_GINFO: + wdf = (struct wsdisplay_fbinfo *)data; + wdf->height = sc->sc_sunfb.sf_height; + wdf->width = sc->sc_sunfb.sf_width; + wdf->depth = sc->sc_sunfb.sf_depth; + wdf->cmsize = 256; + break; + + case WSDISPLAYIO_LINEBYTES: + *(u_int *)data = sc->sc_sunfb.sf_linebytes; + break; + + case WSDISPLAYIO_GETCMAP: + cm = (struct wsdisplay_cmap *)data; + error = bt_getcmap(&sc->sc_cmap, cm); + if (error) + return (error); + break; + + case WSDISPLAYIO_PUTCMAP: + cm = (struct wsdisplay_cmap *)data; + error = bt_putcmap(&sc->sc_cmap, cm); + if (error) + return (error); + p9000_loadcmap_deferred(sc, cm->index, cm->count); + break; + +#if NTCTRL > 0 + case WSDISPLAYIO_GETPARAM: + dp = (struct wsdisplay_param *)data; + + switch (dp->param) { + case WSDISPLAYIO_PARAM_BRIGHTNESS: + dp->min = 0; + dp->max = 255; + dp->curval = tadpole_get_brightness(); + break; + case WSDISPLAYIO_PARAM_BACKLIGHT: + dp->min = 0; + dp->max = 1; + dp->curval = tadpole_get_video(); + break; + default: + return (-1); + } + break; + + case WSDISPLAYIO_SETPARAM: + dp = (struct wsdisplay_param *)data; + + switch (dp->param) { + case WSDISPLAYIO_PARAM_BRIGHTNESS: + tadpole_set_brightness(dp->curval); + break; + case WSDISPLAYIO_PARAM_BACKLIGHT: + tadpole_set_video(dp->curval); + break; + default: + return (-1); + } + break; +#endif /* NTCTRL > 0 */ + + case WSDISPLAYIO_SVIDEO: + case WSDISPLAYIO_GVIDEO: + case WSDISPLAYIO_GCURPOS: + case WSDISPLAYIO_SCURPOS: + case WSDISPLAYIO_GCURMAX: + case WSDISPLAYIO_GCURSOR: + case WSDISPLAYIO_SCURSOR: + default: + return (-1); /* not supported yet */ + } + + return (0); +} + +int +p9000_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, + int *curxp, int *curyp, long *attrp) +{ + struct p9000_softc *sc = v; + + if (sc->sc_nscreens > 0) + return (ENOMEM); + + *cookiep = &sc->sc_sunfb.sf_ro; + *curyp = 0; + *curxp = 0; + sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro, + WSCOL_BLACK, WSCOL_WHITE, WSATTR_WSCOLORS, attrp); + sc->sc_nscreens++; + return (0); +} + +void +p9000_free_screen(void *v, void *cookie) +{ + struct p9000_softc *sc = v; + + sc->sc_nscreens--; +} + +int +p9000_show_screen(void *v, void *cookie, int waitok, + void (*cb)(void *, int, int), void *cbarg) +{ + return (0); +} + +/* + * Return the address that would map the given device at the given + * offset, allowing for the given protection, or return -1 for error. + */ +paddr_t +p9000_mmap(void *v, off_t offset, int prot) +{ + struct p9000_softc *sc = v; + + if (offset & PGOFSET) + return (-1); + + if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) { + return (REG2PHYS(&sc->sc_phys, offset) | PMAP_NC); + } + + return (-1); +} + +void +p9000_setcolor(void *v, u_int index, u_int8_t r, u_int8_t g, u_int8_t b) +{ + struct p9000_softc *sc = v; + union bt_cmap *bcm = &sc->sc_cmap; + + bcm->cm_map[index][0] = r; + bcm->cm_map[index][1] = g; + bcm->cm_map[index][2] = b; + p9000_loadcmap_immediate(sc, index, 1); +} + +void +p9000_loadcmap_immediate(struct p9000_softc *sc, u_int start, u_int ncolors) +{ + sc->sc_ramdac[BT445_ADDRESS] = start; + for (ncolors += start; start < ncolors; start++) { + sc->sc_ramdac[BT445_PALDATA] = sc->sc_cmap.cm_map[start][0]; + sc->sc_ramdac[BT445_PALDATA] = sc->sc_cmap.cm_map[start][1]; + sc->sc_ramdac[BT445_PALDATA] = sc->sc_cmap.cm_map[start][2]; + } +} + +static __inline__ void +p9000_loadcmap_deferred(struct p9000_softc *sc, u_int start, u_int ncolors) +{ + /* Schedule an interrupt for next retrace */ + P9000_SELECT_SCR(sc); + P9000_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE, + IER_MASTER_ENABLE | IER_MASTER_INTERRUPT | + IER_VBLANK_ENABLE | IER_VBLANK_INTERRUPT); +} + +void +p9000_burner(void *v, u_int on, u_int flags) +{ + struct p9000_softc *sc = v; + u_int32_t vcr; + int s; + + s = splhigh(); + P9000_SELECT_VCR(sc); + vcr = P9000_READ_CTL(sc, P9000_SRTC1); + if (on) + vcr |= SRTC1_VIDEN; + else + vcr &= ~SRTC1_VIDEN; + P9000_WRITE_CTL(sc, P9000_SRTC1, vcr); +#if NTCTRL > 0 + tadpole_set_video(on); +#endif + splx(s); +} + +int +p9000_intr(void *v) +{ + struct p9000_softc *sc = v; + + if (P9000_READ_CTL(sc, P9000_INTERRUPT) & IER_VBLANK_INTERRUPT) { + p9000_loadcmap_immediate(sc, 0, 256); + + /* Disable further interrupts now */ + /* P9000_SELECT_SCR(sc); */ + P9000_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE, + IER_MASTER_ENABLE | 0); + + return (1); + } + + return (0); +} + +/* + * Accelerated text console code + */ + +static __inline__ void p9000_drain(struct p9000_softc *); + +static __inline__ void +p9000_drain(struct p9000_softc *sc) +{ + while (P9000_READ_CMD(sc, P9000_PE_STATUS) & + (STATUS_QUAD_BUSY | STATUS_BLIT_BUSY)); +} + +void +p9000_ras_init(struct p9000_softc *sc) +{ + /* + * Setup safe defaults for the parameter and drawing engine, in + * order to minimize the operations to do for ri_ops. + */ + + P9000_SELECT_DE_LOW(sc); + P9000_WRITE_CMD(sc, P9000_DE_DRAWMODE, + DM_PICK_CONTROL | 0 | DM_BUFFER_CONTROL | DM_BUFFER_ENABLE0); + + P9000_WRITE_CMD(sc, P9000_DE_PATTERN_ORIGIN_X, 0); + P9000_WRITE_CMD(sc, P9000_DE_PATTERN_ORIGIN_Y, 0); + /* enable all planes */ + P9000_WRITE_CMD(sc, P9000_DE_PLANEMASK, 0xff); + + /* Unclip */ + P9000_WRITE_CMD(sc, P9000_DE_WINMIN, 0); + P9000_WRITE_CMD(sc, P9000_DE_WINMAX, + P9000_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1)); + + P9000_SELECT_PE(sc); + P9000_WRITE_CMD(sc, P9000_PE_WINOFFSET, 0); +} + +void +p9000_ras_copycols(void *v, int row, int src, int dst, int n) +{ + struct rasops_info *ri = v; + struct p9000_softc *sc = ri->ri_hw; + + n *= ri->ri_font->fontwidth; + n--; + src *= ri->ri_font->fontwidth; + src += ri->ri_xorigin; + dst *= ri->ri_font->fontwidth; + dst += ri->ri_xorigin; + row *= ri->ri_font->fontheight; + row += ri->ri_yorigin; + + p9000_drain(sc); + P9000_SELECT_DE_LOW(sc); + P9000_WRITE_CMD(sc, P9000_DE_RASTER, + P9000_RASTER_SRC & P9000_RASTER_MASK); + + P9000_SELECT_COORD(sc, P9000_DC_COORD(0)); + P9000_WRITE_CMD(sc, P9000_DC_COORD(0) + P9000_COORD_XY, + P9000_COORDS(src, row)); + P9000_WRITE_CMD(sc, P9000_DC_COORD(1) + P9000_COORD_XY, + P9000_COORDS(src + n, row + ri->ri_font->fontheight - 1)); + P9000_SELECT_COORD(sc, P9000_DC_COORD(2)); + P9000_WRITE_CMD(sc, P9000_DC_COORD(2) + P9000_COORD_XY, + P9000_COORDS(dst, row)); + P9000_WRITE_CMD(sc, P9000_DC_COORD(3) + P9000_COORD_XY, + P9000_COORDS(dst + n, row + ri->ri_font->fontheight - 1)); + + sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_BLIT); + + p9000_drain(sc); +} + +void +p9000_ras_copyrows(void *v, int src, int dst, int n) +{ + struct rasops_info *ri = v; + struct p9000_softc *sc = ri->ri_hw; + + n *= ri->ri_font->fontheight; + n--; + src *= ri->ri_font->fontheight; + src += ri->ri_yorigin; + dst *= ri->ri_font->fontheight; + dst += ri->ri_yorigin; + + p9000_drain(sc); + P9000_SELECT_DE_LOW(sc); + P9000_WRITE_CMD(sc, P9000_DE_RASTER, + P9000_RASTER_SRC & P9000_RASTER_MASK); + + P9000_SELECT_COORD(sc, P9000_DC_COORD(0)); + P9000_WRITE_CMD(sc, P9000_DC_COORD(0) + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin, src)); + P9000_WRITE_CMD(sc, P9000_DC_COORD(1) + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, src + n)); + P9000_SELECT_COORD(sc, P9000_DC_COORD(2)); + P9000_WRITE_CMD(sc, P9000_DC_COORD(2) + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin, dst)); + P9000_WRITE_CMD(sc, P9000_DC_COORD(3) + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, dst + n)); + + sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_BLIT); + + p9000_drain(sc); +} + +void +p9000_ras_erasecols(void *v, int row, int col, int n, long int attr) +{ + struct rasops_info *ri = v; + struct p9000_softc *sc = ri->ri_hw; + int fg, bg; + + rasops_unpack_attr(attr, &fg, &bg, NULL); + + n *= ri->ri_font->fontwidth; + col *= ri->ri_font->fontwidth; + col += ri->ri_xorigin; + row *= ri->ri_font->fontheight; + row += ri->ri_yorigin; + + p9000_drain(sc); + P9000_SELECT_DE_LOW(sc); + P9000_WRITE_CMD(sc, P9000_DE_RASTER, + P9000_RASTER_PATTERN & P9000_RASTER_MASK); + P9000_WRITE_CMD(sc, P9000_DE_FG_COLOR, bg); + + P9000_SELECT_COORD(sc, P9000_LC_RECT); + P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(col, row)); + P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(col + n, row + ri->ri_font->fontheight)); + + sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_QUAD); + + p9000_drain(sc); +} + +void +p9000_ras_eraserows(void *v, int row, int n, long int attr) +{ + struct rasops_info *ri = v; + struct p9000_softc *sc = ri->ri_hw; + int fg, bg; + + rasops_unpack_attr(attr, &fg, &bg, NULL); + + p9000_drain(sc); + P9000_SELECT_DE_LOW(sc); + P9000_WRITE_CMD(sc, P9000_DE_RASTER, + P9000_RASTER_PATTERN & P9000_RASTER_MASK); + P9000_WRITE_CMD(sc, P9000_DE_FG_COLOR, bg); + + P9000_SELECT_COORD(sc, P9000_LC_RECT); + if (n == ri->ri_rows && ISSET(ri->ri_flg, RI_FULLCLEAR)) { + P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(0, 0)); + P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(ri->ri_width, ri->ri_height)); + } else { + n *= ri->ri_font->fontheight; + row *= ri->ri_font->fontheight; + row += ri->ri_yorigin; + + P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin, row)); + P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth, row + n)); + } + + sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_QUAD); + + p9000_drain(sc); +} + +void +p9000_ras_do_cursor(struct rasops_info *ri) +{ + struct p9000_softc *sc = ri->ri_hw; + int row, col; + + row = ri->ri_crow * ri->ri_font->fontheight + ri->ri_yorigin; + col = ri->ri_ccol * ri->ri_font->fontwidth + ri->ri_xorigin; + + p9000_drain(sc); + + P9000_SELECT_DE_LOW(sc); + P9000_WRITE_CMD(sc, P9000_DE_RASTER, + (~P9000_RASTER_DST) & P9000_RASTER_MASK); + + P9000_SELECT_COORD(sc, P9000_LC_RECT); + P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(col, row)); + P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(col + ri->ri_font->fontwidth, + row + ri->ri_font->fontheight)); + + sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_QUAD); + + p9000_drain(sc); +} diff --git a/sys/arch/sparc/dev/p9100.c b/sys/arch/sparc/dev/p9100.c index 543aa346f67..eeaf1ed590e 100644 --- a/sys/arch/sparc/dev/p9100.c +++ b/sys/arch/sparc/dev/p9100.c @@ -1,4 +1,4 @@ -/* $OpenBSD: p9100.c,v 1.22 2003/06/13 23:40:12 miod Exp $ */ +/* $OpenBSD: p9100.c,v 1.23 2003/06/17 21:21:32 miod Exp $ */ /* * Copyright (c) 2003, Miodrag Vallat. @@ -28,8 +28,9 @@ */ /* - * color display (p9100) driver. Based on cgthree.c and the NetBSD - * p9100 driver. + * color display (p9100) driver. + * Initially based on cgthree.c and the NetBSD p9100 driver, then hacked + * beyond recognition. */ #include <sys/param.h> @@ -59,6 +60,8 @@ #include <sparc/dev/btvar.h> #include <sparc/dev/sbusvar.h> +#include <dev/ic/p9000.h> + #include "tctrl.h" #if NTCTRL > 0 #include <sparc/dev/tctrlvar.h> @@ -69,8 +72,8 @@ struct p9100_softc { struct sunfb sc_sunfb; /* common base part */ struct sbusdev sc_sd; /* sbus device */ struct rom_reg sc_phys; /* phys address description */ - struct p9100_cmd *sc_cmd; /* command registers (dac, etc) */ - struct p9100_ctl *sc_ctl; /* control registers (draw engine) */ + volatile u_int8_t *sc_cmd; /* command registers (dac, etc) */ + volatile u_int8_t *sc_ctl; /* control registers (draw engine) */ union bt_cmap sc_cmap; /* Brooktree color map */ struct intrhand sc_ih; int sc_nscreens; @@ -143,206 +146,44 @@ struct cfdriver pnozz_cd = { #define P9100_REG_VRAM 2 /* - * System control and command registers - * (IBM RGB528 RamDac, p9100, video coprocessor) + * IBM RGB525 RAMDAC registers */ -struct p9100_ctl { - /* System control registers: 0x0000 - 0x00ff */ - struct p9100_scr { - volatile u_int32_t :32; - volatile u_int32_t scr; /* system config reg */ -#define SCR_ID_MASK 0x00000007 -#define SCR_PIXEL_MASK 0x1c000000 -#define SCR_PIXEL_8BPP 0x08000000 -#define SCR_PIXEL_16BPP 0x0c000000 -#define SCR_PIXEL_24BPP 0x1c000000 -#define SCR_PIXEL_32BPP 0x14000000 - volatile u_int32_t ir; /* interrupt reg */ - volatile u_int32_t ier; /* interrupt enable */ -#define IER_MASTER_ENABLE 0x00000080 -#define IER_MASTER_INTERRUPT 0x00000040 -#define IER_VBLANK_ENABLE 0x00000020 -#define IER_VBLANK_INTERRUPT 0x00000010 -#define IER_PICK_ENABLE 0x00000008 -#define IER_PICK_INTERRUPT 0x00000004 -#define IER_IDLE_ENABLE 0x00000002 -#define IER_IDLE_INTERRUPT 0x00000001 - volatile u_int32_t arbr; /* alt read bank reg */ - volatile u_int32_t awbr; /* alt write bank reg */ - volatile u_int32_t unused1[58]; - } ctl_scr; - - /* Video control registers: 0x0100 - 0x017f */ - struct p9100_vcr { - volatile u_int32_t :32; - volatile u_int32_t hcr; /* horizontal cntr */ - volatile u_int32_t htr; /* horizontal total */ - volatile u_int32_t hsre; /* horiz sync rising */ - volatile u_int32_t hbre; /* horiz blank rising */ - volatile u_int32_t hbfe; /* horiz blank fallng */ - volatile u_int32_t hcp; /* horiz cntr preload */ - volatile u_int32_t vcr; /* vertical cntr */ - volatile u_int32_t vl; /* vertical length */ - volatile u_int32_t vsre; /* vert sync rising */ - volatile u_int32_t vbre; /* vert blank rising */ - volatile u_int32_t vbfe; /* vert blank fallng */ - volatile u_int32_t vcp; /* vert cntr preload */ - volatile u_int32_t sra; /* scrn repaint addr */ - volatile u_int32_t srtc1; /* scrn rpnt time 1 */ -#define SRTC1_VIDEN 0x00000020 - volatile u_int32_t qsf; /* qsf counter */ - volatile u_int32_t srtc2; /* scrn rpnt time 2 */ - volatile u_int32_t unused1[15]; - } ctl_vcr; - - /* VRAM control registers: 0x0180 - 0x1ff */ - struct p9100_vram { - volatile u_int32_t :32; - volatile u_int32_t mc; /* memory config */ - volatile u_int32_t rp; /* refresh period */ - volatile u_int32_t rc; /* refresh count */ - volatile u_int32_t rasmax; /* ras low maximum */ - volatile u_int32_t rascur; /* ras low current */ - volatile u_int32_t dacfifo; /* free fifo */ - volatile u_int32_t unused1[25]; - } ctl_vram; - - /* IBM RGB528 RAMDAC registers: 0x0200 - 0x3ff */ - struct p9100_dac { - volatile u_int32_t pwraddr; /* wr palette address */ - volatile u_int32_t paldata; /* palette data */ - volatile u_int32_t pixmask; /* pixel mask */ - volatile u_int32_t prdaddr; /* rd palette address */ - volatile u_int32_t idxlow; /* reg index low */ - volatile u_int32_t idxhigh; /* reg index high */ - volatile u_int32_t regdata; /* register data */ - volatile u_int32_t idxctrl; /* index control */ - volatile u_int32_t unused1[120]; - } ctl_dac; - - /* Video coprocessor interface: 0x0400 - 0x1fff */ - volatile u_int32_t ctl_vci[768]; -}; + +/* Palette write address */ +#define IBM525_WRADDR 0 +/* Palette data */ +#define IBM525_DATA 1 +/* Pixel mask */ +#define IBM525_PIXMASK 2 +/* Read palette address */ +#define IBM525_RDADDR 3 +/* Register index low */ +#define IBM525_IDXLOW 4 +/* Register index high */ +#define IBM525_IDXHIGH 5 +/* Register data */ +#define IBM525_REGDATA 6 +/* Index control */ +#define IBM525_IDXCONTROL 7 /* - * Power 9100 Drawing engine + * P9100 read/write macros */ -struct p9100_coord { - volatile u_int32_t :32; - volatile u_int32_t :32; - volatile u_int32_t abs_x32; - volatile u_int32_t :32; - volatile u_int32_t abs_y32; - volatile u_int32_t :32; - volatile u_int32_t abs_x16y16; - volatile u_int32_t :32; - volatile u_int32_t :32; - volatile u_int32_t :32; - volatile u_int32_t rel_x32; - volatile u_int32_t :32; - volatile u_int32_t rel_y32; - volatile u_int32_t :32; - volatile u_int32_t rel_x16y16; - volatile u_int32_t :32; -}; - -/* How to encode a x16y16 value */ -#define P9100_COORDS(col,row) ((((col) & 0x0fff) << 16) | ((row) & 0x0fff)) - -struct p9100_cmd { - /* Parameter engine 0x2000-0x217f */ - struct cmd_pe { - volatile u_int32_t status; /* status register */ -#define STATUS_QUAD_BUSY 0x80000000 -#define STATUS_BLIT_BUSY 0x40000000 -#define STATUS_PICK_DETECTED 0x00000080 -#define STATUS_PIXEL_ERROR 0x00000040 -#define STATUS_BLIT_ERROR 0x00000020 -#define STATUS_QUAD_ERROR 0x00000010 -#define STATUS_QUAD_CONCAVE 0x00000008 -#define STATUS_QUAD_OUTSIDE 0x00000004 -#define STATUS_QUAD_INSIDE 0x00000002 -#define STATUS_QUAD_STRADDLE 0x00000001 - volatile u_int32_t blit; /* blit command */ - volatile u_int32_t quad; /* quad command */ - volatile u_int32_t pixel8; /* P9000 pixel8 command */ - volatile u_int32_t :32; - volatile u_int32_t nextpixels; /* next_pixels command */ - volatile u_int32_t unused1[(0x80 - 0x18) / 4]; - volatile u_int32_t pixel1[32]; /* pixel1 command */ - volatile u_int32_t unused2[(0x180 - 0x100) / 4]; - - /* Parameter engine registers 0x2180-0x21ff */ - volatile u_int32_t :32; - volatile u_int32_t oor; /* out of range register */ - volatile u_int32_t :32; - volatile u_int32_t cindex; /* index register */ - volatile u_int32_t winoffset; /* window offset (16+16) */ - volatile u_int32_t winmin; /* window minimum */ - volatile u_int32_t winmax; /* window maximum */ - volatile u_int32_t :32; - volatile u_int32_t yclip; - volatile u_int32_t xclip; - volatile u_int32_t xedgeless; - volatile u_int32_t xedgegreater; - volatile u_int32_t yedgeless; - volatile u_int32_t yedgegreater; - volatile u_int32_t unused3[(0x200 - 0x1b8) / 4]; - } pe; - - /* Drawing engine 0x2200-0x2fff */ - struct cmd_de { - volatile u_int32_t color0; /* fg color */ - volatile u_int32_t color1; /* bg color */ - volatile u_int32_t planemask; /* 8-bit plane mask */ - volatile u_int32_t drawmode; -#define DM_PICK_CONTROL 0x00000008 -#define DM_PICK_ENABLE 0x00000004 -#define DM_BUFFER_CONTROL 0x00000002 -#define DM_BUFFER_ENABLE0 0x00000000 -#define DM_BUFFER_ENABLE1 0x00000001 - volatile u_int32_t patternx; /* Quad 16x16 pattern origin */ - volatile u_int32_t patterny; /* (4-bit) */ - volatile u_int32_t raster; - volatile u_int32_t pixel8; /* Pixel8 extra storage */ - volatile u_int32_t winmin; /* window min, same as above */ - volatile u_int32_t winmax; /* window max, same as above */ - volatile u_int32_t unused1[(0x38 - 0x28) / 4]; - volatile u_int32_t color2; - volatile u_int32_t color3; - volatile u_int32_t unused2[(0x80 - 0x40) / 4]; - volatile u_int32_t pattern[4]; /* pattern for quad fill */ - volatile u_int32_t user[4]; /* user defined registers */ - volatile u_int32_t bwinmin; /* byte window minimum */ - volatile u_int32_t bwinmax; /* byte window maximum */ - volatile u_int32_t unused3[(0x3000 - 0x22a8) / 4]; - } de; - - /* Device coordinates 0x3000-0x31ff */ - struct cmd_dc { - struct p9100_coord coord[4]; - volatile u_int32_t unused[(0x200 - 0x100) / 4]; - } dc; - - /* Load coordinates 0x3200-0x33ff */ - struct cmd_lc { - struct p9100_coord point; - struct p9100_coord line; - struct p9100_coord tri; - struct p9100_coord quad; - struct p9100_coord rect; - } lc; -}; - -/* How to encode a color in 8 bit mode, for the drawing engine */ -#define P9100_COLOR8(col) ((col) | ((col) << 8) | ((col) << 16)) - -/* P9100 minterms for the raster register */ -#define P9100_RASTER_SRC 0x00cc -#define P9100_RASTER_DST 0x00aa -#define P9100_RASTER_PATTERN 0x00f0 -#define P9100_RASTER_MASK 0x00ff +#define P9100_READ_CTL(sc,reg) \ + *(volatile u_int32_t *)((sc)->sc_ctl + (reg)) +#define P9100_READ_CMD(sc,reg) \ + *(volatile u_int32_t *)((sc)->sc_cmd + (reg)) +#define P9100_READ_RAMDAC(sc,reg) \ + *(volatile u_int32_t *)((sc)->sc_ctl + P9100_RAMDAC_REGISTER(reg)) + +#define P9100_WRITE_CTL(sc,reg,value) \ + *(volatile u_int32_t *)((sc)->sc_ctl + (reg)) = (value) +#define P9100_WRITE_CMD(sc,reg,value) \ + *(volatile u_int32_t *)((sc)->sc_cmd + (reg)) = (value) +#define P9100_WRITE_RAMDAC(sc,reg,value) \ + *(volatile u_int32_t *)((sc)->sc_ctl + P9100_RAMDAC_REGISTER(reg)) = \ + (value) /* * On the Tadpole, the first write to a register group is ignored until @@ -356,17 +197,22 @@ struct p9100_cmd { * This is specific to the Tadpole design, and not a limitation of the * Power 9100 hardware. */ -#define P9100_SELECT_SCR(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_scr.scr) -#define P9100_SELECT_VCR(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_vcr.hcr) -#define P9100_SELECT_VRAM(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_vram.mc) -#define P9100_SELECT_DAC(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_dac.pwraddr) -#define P9100_SELECT_VCI(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_vci[0]) -#define P9100_SELECT_DE_LOW(sc) ((sc)->sc_junk = (sc)->sc_cmd->de.color0) +#define P9100_SELECT_SCR(sc) \ + (sc)->sc_junk = P9100_READ_CTL(sc, P9000_SYSTEM_CONFIG) +#define P9100_SELECT_VCR(sc) \ + (sc)->sc_junk = P9100_READ_CTL(sc, P9000_HCR) +#define P9100_SELECT_VRAM(sc) \ + (sc)->sc_junk = P9100_READ_CTL(sc, P9000_MCR) +#define P9100_SELECT_DAC(sc) \ + (sc)->sc_junk = P9100_READ_CTL(sc, P9100_RAMDAC_REGISTER(0)) +#define P9100_SELECT_PE(sc) \ + (sc)->sc_junk = P9100_READ_CMD(sc, P9000_PE_STATUS) +#define P9100_SELECT_DE_LOW(sc) \ + (sc)->sc_junk = P9100_READ_CMD(sc, P9000_DE_FG_COLOR) #define P9100_SELECT_DE_HIGH(sc) \ - ((sc)->sc_junk = (sc)->sc_cmd->de.bwinmax) -#define P9100_SELECT_PE(sc) ((sc)->sc_junk = (sc)->sc_cmd->pe.cindex) + (sc)->sc_junk = P9100_READ_CMD(sc, P9000_DE_PATTERN(0)) #define P9100_SELECT_COORD(sc,field) \ - ((sc)->sc_junk = (sc)->sc_cmd->##field##.abs_x32) + (sc)->sc_junk = P9100_READ_CMD(sc, field) /* * For some reason, every write to a DAC register needs to be followed by a @@ -376,7 +222,7 @@ struct p9100_cmd { #define P9100_FLUSH_DAC(sc) \ do { \ P9100_SELECT_VRAM(sc); \ - (sc)->sc_junk = (sc)->sc_ctl->ctl_vram.dacfifo; \ + (sc)->sc_junk = P9100_READ_CTL(sc, P9100_FREE_FIFO); \ } while (0) int @@ -422,7 +268,7 @@ p9100attach(struct device *parent, struct device *self, void *args) isconsole = node == fbnode; P9100_SELECT_SCR(sc); - scr = sc->sc_ctl->ctl_scr.scr; + scr = P9100_READ_CTL(sc, P9000_SYSTEM_CONFIG); switch (scr & SCR_PIXEL_MASK) { case SCR_PIXEL_32BPP: fb_depth = 32; @@ -457,7 +303,7 @@ p9100attach(struct device *parent, struct device *self, void *args) /* Disable frame buffer interrupts */ P9100_SELECT_SCR(sc); - sc->sc_ctl->ctl_scr.ier = IER_MASTER_ENABLE | 0; + P9100_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE, IER_MASTER_ENABLE | 0); /* * If the framebuffer width is under 1024x768, we will switch from the @@ -471,7 +317,7 @@ p9100attach(struct device *parent, struct device *self, void *args) * XXX there should be a rasops "clear margins" feature */ fbwscons_init(&sc->sc_sunfb, - isconsole && (sc->sc_sunfb.sf_width != 800)); + isconsole && (sc->sc_sunfb.sf_width >= 1024)); fbwscons_setcolormap(&sc->sc_sunfb, p9100_setcolor); /* @@ -497,7 +343,7 @@ p9100attach(struct device *parent, struct device *self, void *args) p9100_burner(sc, 1, 0); if (isconsole) { - if (sc->sc_sunfb.sf_width == 800) + if (sc->sc_sunfb.sf_width < 1024) row = 0; /* screen has been cleared above */ else row = -1; @@ -690,12 +536,12 @@ p9100_loadcmap_immediate(struct p9100_softc *sc, u_int start, u_int ncolors) u_char *p; P9100_SELECT_DAC(sc); - sc->sc_ctl->ctl_dac.pwraddr = start << 16; + P9100_WRITE_RAMDAC(sc, IBM525_WRADDR, start << 16); P9100_FLUSH_DAC(sc); for (p = sc->sc_cmap.cm_map[start], ncolors *= 3; ncolors-- > 0; p++) { P9100_SELECT_DAC(sc); - sc->sc_ctl->ctl_dac.paldata = (*p) << 16; + P9100_WRITE_RAMDAC(sc, IBM525_DATA, (*p) << 16); P9100_FLUSH_DAC(sc); } } @@ -703,11 +549,11 @@ p9100_loadcmap_immediate(struct p9100_softc *sc, u_int start, u_int ncolors) static __inline__ void p9100_loadcmap_deferred(struct p9100_softc *sc, u_int start, u_int ncolors) { - /* Schedule an interrupt for next retrace */ P9100_SELECT_SCR(sc); - sc->sc_ctl->ctl_scr.ier = IER_MASTER_ENABLE | IER_MASTER_INTERRUPT | - IER_VBLANK_ENABLE | IER_VBLANK_INTERRUPT; + P9100_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE, + IER_MASTER_ENABLE | IER_MASTER_INTERRUPT | + IER_VBLANK_ENABLE | IER_VBLANK_INTERRUPT); } void @@ -719,13 +565,12 @@ p9100_burner(void *v, u_int on, u_int flags) s = splhigh(); P9100_SELECT_VCR(sc); - vcr = sc->sc_ctl->ctl_vcr.srtc1; + vcr = P9100_READ_CTL(sc, P9000_SRTC1); if (on) vcr |= SRTC1_VIDEN; else vcr &= ~SRTC1_VIDEN; - /* XXX - what about WSDISPLAY_BURN_VBLANK? */ - sc->sc_ctl->ctl_vcr.srtc1 = vcr; + P9100_WRITE_CTL(sc, P9000_SRTC1, vcr); #if NTCTRL > 0 tadpole_set_video(on); #endif @@ -737,12 +582,13 @@ p9100_intr(void *v) { struct p9100_softc *sc = v; - if (sc->sc_ctl->ctl_scr.ir & IER_VBLANK_INTERRUPT) { + if (P9100_READ_CTL(sc, P9000_INTERRUPT) & IER_VBLANK_INTERRUPT) { p9100_loadcmap_immediate(sc, 0, 256); /* Disable further interrupts now */ /* P9100_SELECT_SCR(sc); */ - sc->sc_ctl->ctl_scr.ier = IER_MASTER_ENABLE | 0; + P9100_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE, + IER_MASTER_ENABLE | 0); return (1); } @@ -759,38 +605,39 @@ static __inline__ void p9100_drain(struct p9100_softc *); static __inline__ void p9100_drain(struct p9100_softc *sc) { - while (sc->sc_cmd->pe.status & (STATUS_QUAD_BUSY | STATUS_BLIT_BUSY)); + while (P9100_READ_CMD(sc, P9000_PE_STATUS) & + (STATUS_QUAD_BUSY | STATUS_BLIT_BUSY)); } void p9100_ras_init(struct p9100_softc *sc) { - /* * Setup safe defaults for the parameter and drawing engine, in * order to minimize the operations to do for ri_ops. */ P9100_SELECT_DE_LOW(sc); - sc->sc_cmd->de.drawmode = DM_PICK_CONTROL | 0 | - DM_BUFFER_CONTROL | DM_BUFFER_ENABLE0; + P9100_WRITE_CMD(sc, P9000_DE_DRAWMODE, + DM_PICK_CONTROL | 0 | DM_BUFFER_CONTROL | DM_BUFFER_ENABLE0); - sc->sc_cmd->de.patternx = 0; - sc->sc_cmd->de.patterny = 0; - sc->sc_cmd->de.planemask = 0xffffffff; /* enable all planes */ + P9100_WRITE_CMD(sc, P9000_DE_PATTERN_ORIGIN_X, 0); + P9100_WRITE_CMD(sc, P9000_DE_PATTERN_ORIGIN_Y, 0); + /* enable all planes */ + P9100_WRITE_CMD(sc, P9000_DE_PLANEMASK, 0xffffffff); /* Unclip */ - sc->sc_cmd->de.winmin = 0; - sc->sc_cmd->de.winmax = - P9100_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1); + P9100_WRITE_CMD(sc, P9000_DE_WINMIN, 0); + P9100_WRITE_CMD(sc, P9000_DE_WINMAX, + P9000_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1)); P9100_SELECT_DE_HIGH(sc); - sc->sc_cmd->de.bwinmin = 0; - sc->sc_cmd->de.bwinmax = - P9100_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1); + P9100_WRITE_CMD(sc, P9100_DE_B_WINMIN, 0); + P9100_WRITE_CMD(sc, P9100_DE_B_WINMAX, + P9000_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1)); P9100_SELECT_PE(sc); - sc->sc_cmd->pe.winoffset = 0; + P9100_WRITE_CMD(sc, P9000_PE_WINOFFSET, 0); } void @@ -810,18 +657,21 @@ p9100_ras_copycols(void *v, int row, int src, int dst, int n) p9100_drain(sc); P9100_SELECT_DE_LOW(sc); - sc->sc_cmd->de.raster = P9100_RASTER_SRC & P9100_RASTER_MASK; - - P9100_SELECT_COORD(sc,dc.coord[0]); - sc->sc_cmd->dc.coord[0].abs_x16y16 = P9100_COORDS(src, row); - sc->sc_cmd->dc.coord[1].abs_x16y16 = - P9100_COORDS(src + n, row + ri->ri_font->fontheight - 1); - P9100_SELECT_COORD(sc,dc.coord[2]); - sc->sc_cmd->dc.coord[2].abs_x16y16 = P9100_COORDS(dst, row); - sc->sc_cmd->dc.coord[3].abs_x16y16 = - P9100_COORDS(dst + n, row + ri->ri_font->fontheight - 1); - - sc->sc_junk = sc->sc_cmd->pe.blit; + P9100_WRITE_CMD(sc, P9000_DE_RASTER, + P9100_RASTER_SRC & P9100_RASTER_MASK); + + P9100_SELECT_COORD(sc, P9000_DC_COORD(0)); + P9100_WRITE_CMD(sc, P9000_DC_COORD(0) + P9000_COORD_XY, + P9000_COORDS(src, row)); + P9100_WRITE_CMD(sc, P9000_DC_COORD(1) + P9000_COORD_XY, + P9000_COORDS(src + n, row + ri->ri_font->fontheight - 1)); + P9100_SELECT_COORD(sc, P9000_DC_COORD(2)); + P9100_WRITE_CMD(sc, P9000_DC_COORD(2) + P9000_COORD_XY, + P9000_COORDS(dst, row)); + P9100_WRITE_CMD(sc, P9000_DC_COORD(3) + P9000_COORD_XY, + P9000_COORDS(dst + n, row + ri->ri_font->fontheight - 1)); + + sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_BLIT); p9100_drain(sc); } @@ -841,18 +691,21 @@ p9100_ras_copyrows(void *v, int src, int dst, int n) p9100_drain(sc); P9100_SELECT_DE_LOW(sc); - sc->sc_cmd->de.raster = P9100_RASTER_SRC & P9100_RASTER_MASK; - - P9100_SELECT_COORD(sc,dc.coord[0]); - sc->sc_cmd->dc.coord[0].abs_x16y16 = P9100_COORDS(ri->ri_xorigin, src); - sc->sc_cmd->dc.coord[1].abs_x16y16 = - P9100_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, src + n); - P9100_SELECT_COORD(sc,dc.coord[2]); - sc->sc_cmd->dc.coord[2].abs_x16y16 = P9100_COORDS(ri->ri_xorigin, dst); - sc->sc_cmd->dc.coord[3].abs_x16y16 = - P9100_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, dst + n); - - sc->sc_junk = sc->sc_cmd->pe.blit; + P9100_WRITE_CMD(sc, P9000_DE_RASTER, + P9100_RASTER_SRC & P9100_RASTER_MASK); + + P9100_SELECT_COORD(sc, P9000_DC_COORD(0)); + P9100_WRITE_CMD(sc, P9000_DC_COORD(0) + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin, src)); + P9100_WRITE_CMD(sc, P9000_DC_COORD(1) + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, src + n)); + P9100_SELECT_COORD(sc, P9000_DC_COORD(2)); + P9100_WRITE_CMD(sc, P9000_DC_COORD(2) + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin, dst)); + P9100_WRITE_CMD(sc, P9000_DC_COORD(3) + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, dst + n)); + + sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_BLIT); p9100_drain(sc); } @@ -874,15 +727,17 @@ p9100_ras_erasecols(void *v, int row, int col, int n, long int attr) p9100_drain(sc); P9100_SELECT_DE_LOW(sc); - sc->sc_cmd->de.raster = P9100_RASTER_PATTERN & P9100_RASTER_MASK; - sc->sc_cmd->de.color0 = P9100_COLOR8(bg); + P9100_WRITE_CMD(sc, P9000_DE_RASTER, + P9100_RASTER_PATTERN & P9100_RASTER_MASK); + P9100_WRITE_CMD(sc, P9100_DE_COLOR0, P9100_COLOR8(bg)); - P9100_SELECT_COORD(sc,lc.rect); - sc->sc_cmd->lc.rect.abs_x16y16 = P9100_COORDS(col, row); - sc->sc_cmd->lc.rect.abs_x16y16 = - P9100_COORDS(col + n, row + ri->ri_font->fontheight); + P9100_SELECT_COORD(sc, P9000_LC_RECT); + P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(col, row)); + P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(col + n, row + ri->ri_font->fontheight)); - sc->sc_junk = sc->sc_cmd->pe.quad; + sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_QUAD); p9100_drain(sc); } @@ -898,26 +753,28 @@ p9100_ras_eraserows(void *v, int row, int n, long int attr) p9100_drain(sc); P9100_SELECT_DE_LOW(sc); - sc->sc_cmd->de.raster = P9100_RASTER_PATTERN & P9100_RASTER_MASK; - sc->sc_cmd->de.color0 = P9100_COLOR8(bg); + P9100_WRITE_CMD(sc, P9000_DE_RASTER, + P9100_RASTER_PATTERN & P9100_RASTER_MASK); + P9100_WRITE_CMD(sc, P9100_DE_COLOR0, P9100_COLOR8(bg)); - P9100_SELECT_COORD(sc,lc.rect); + P9100_SELECT_COORD(sc, P9000_LC_RECT); if (n == ri->ri_rows && ISSET(ri->ri_flg, RI_FULLCLEAR)) { - sc->sc_cmd->lc.rect.abs_x16y16 = P9100_COORDS(0, 0); - sc->sc_cmd->lc.rect.abs_x16y16 = - P9100_COORDS(ri->ri_width, ri->ri_height); + P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(0, 0)); + P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(ri->ri_width, ri->ri_height)); } else { n *= ri->ri_font->fontheight; row *= ri->ri_font->fontheight; row += ri->ri_yorigin; - sc->sc_cmd->lc.rect.abs_x16y16 = - P9100_COORDS(ri->ri_xorigin, row); - sc->sc_cmd->lc.rect.abs_x16y16 = - P9100_COORDS(ri->ri_xorigin + ri->ri_emuwidth, row + n); + P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin, row)); + P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth, row + n)); } - sc->sc_junk = sc->sc_cmd->pe.quad; + sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_QUAD); p9100_drain(sc); } @@ -934,15 +791,17 @@ p9100_ras_do_cursor(struct rasops_info *ri) p9100_drain(sc); P9100_SELECT_DE_LOW(sc); - sc->sc_cmd->de.raster = (~P9100_RASTER_DST) & P9100_RASTER_MASK; + P9100_WRITE_CMD(sc, P9000_DE_RASTER, + (~P9100_RASTER_DST) & P9100_RASTER_MASK); - P9100_SELECT_COORD(sc,lc.rect); - sc->sc_cmd->lc.rect.abs_x16y16 = P9100_COORDS(col, row); - sc->sc_cmd->lc.rect.abs_x16y16 = - P9100_COORDS(col + ri->ri_font->fontwidth, - row + ri->ri_font->fontheight); + P9100_SELECT_COORD(sc, P9000_LC_RECT); + P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(col, row)); + P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY, + P9000_COORDS(col + ri->ri_font->fontwidth, + row + ri->ri_font->fontheight)); - sc->sc_junk = sc->sc_cmd->pe.quad; + sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_QUAD); p9100_drain(sc); } diff --git a/sys/dev/ic/p9000.h b/sys/dev/ic/p9000.h new file mode 100644 index 00000000000..014f65d488e --- /dev/null +++ b/sys/dev/ic/p9000.h @@ -0,0 +1,300 @@ +/* $OpenBSD: p9000.h,v 1.1 2003/06/17 21:21:33 miod Exp $ */ +/* + * Copyright (c) 2003, Miodrag Vallat. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Weitek Power9000 and Power9100 definitions. + * + * Although the datasheet is not available anymore, a good source of + * information is: + * http://thorkildsen.no/faqsys/docs/weitek.txt + * as well as several code examples in XFree86 3.x (vga256/p9x00) and the + * {Net,Open}BSD source trees. + */ + +/* + * Frame buffer control registers + * + * Offsets below are relative to the following locations: + * P9000 at 0x00100000, P9100 at 0x000000 + */ + +/* + * System control registers + */ + +/* System configuration register */ +#define P9000_SYSTEM_CONFIG 0x00000004 + +#define SCR_PIXEL_MASK 0x1c000000 +#define SCR_PIXEL_8BPP 0x08000000 +#define SCR_PIXEL_16BPP 0x0c000000 +#define SCR_PIXEL_24BPP 0x1c000000 +#define SCR_PIXEL_32BPP 0x14000000 +#define SCR_READ_BUFFER_MASK 0x00000400 +#define SCR_WRITE_BUFFER_MASK 0x00000200 +#define SCR_ID_MASK 0x00000007 + +/* Interrupt status register */ +#define P9000_INTERRUPT 0x00000008 + +/* Interrupt enable register */ +#define P9000_INTERRUPT_ENABLE 0x0000000c + +#define IER_MASTER_ENABLE 0x00000080 +#define IER_MASTER_INTERRUPT 0x00000040 +#define IER_VBLANK_ENABLE 0x00000020 +#define IER_VBLANK_INTERRUPT 0x00000010 +#define IER_PICK_ENABLE 0x00000008 +#define IER_PICK_INTERRUPT 0x00000004 +#define IER_IDLE_ENABLE 0x00000002 +#define IER_IDLE_INTERRUPT 0x00000001 + +/* Alternate read bank register (bits 16-22) */ +#define P9000_ALTBANK_READ 0x00000010 + +/* Alternate write bank register (bits 16-22) */ +#define P9000_ALTBANK_WRITE 0x00000014 + +/* + * Video control registers + */ + +/* Horizontal counter */ +#define P9000_HCR 0x00000104 +/* Horizontal total */ +#define P9000_HTR 0x00000108 +/* Horizontal sync rising edge */ +#define P9000_HSRE 0x0000010c +/* Horizontal blank rising edge */ +#define P9000_HBRE 0x00000110 +/* Horizontal blank falling edge */ +#define P9000_HBFE 0x00000114 +/* Horizontal counter preload */ +#define P9000_HCP 0x00000118 + +/* Vertical counter */ +#define P9000_VCR 0x0000011c +/* Vertical length */ +#define P9000_VL 0x00000120 +/* Vertical sync rising edge */ +#define P9000_VSRE 0x00000124 +/* Vertical blank rising edge */ +#define P9000_VBRE 0x00000128 +/* Vertical blank falling edge */ +#define P9000_VBFE 0x0000012c +/* Vertical counter preload */ +#define P9000_VCP 0x00000130 + +/* Screen repaint address */ +#define P9000_SRA 0x00000134 +/* Screen repaint timing control #1 */ +#define P9000_SRTC1 0x00000138 + +#define SRTC1_VSYNC_INTERNAL 0x00000100 +#define SRTC1_HSYNC_INTERNAL 0x00000080 +#define SRTC1_VIDEN 0x00000020 +#define SRTC1_RESTRICTED 0x00000010 +#define SRTC1_BUFFER1 0x00000008 + +/* QSF counter. Film at 11 */ +#define P9000_QSF 0x0000013c +/* Screen repaint timing control #2 */ +#define P9000_SRTC2 0x00000140 + +/* + * VRAM control registers + */ + +/* Memory configuration */ +#define P9000_MCR 0x00000184 +/* Refresh period */ +#define P9000_REFRESH_PERIOD 0x00000188 +/* Refresh count */ +#define P9000_REFRESH_COUNT 0x0000018c +/* RAS low maximum */ +#define P9000_RASLOW_MAXIMUM 0x00000190 +/* RAS low current */ +#define P9000_RASLOW_CURRENT 0x00000194 +/* RAMDAC free FIFO (P9100 only, bits 12-15) and power-up configuration */ +#define P9000_POWERUP_CONFIG 0x00000198 +#define P9100_FREE_FIFO 0x00000198 + +/* + * RAMDAC registers (P9100 only) + */ + +#define P9100_RAMDAC_REGISTER(index) (0x00000200 + ((index) << 2)) + + +/* + * Accelerated features + * + * Offsets below are relative to the following locations: + * P9000 at 0x00180000, P9100 at 0x002000 + */ + +/* + * Parameter engine + */ + +/* Status register */ +#define P9000_PE_STATUS 0x00000000 +#define STATUS_QUAD_BUSY 0x80000000 +#define STATUS_BLIT_BUSY 0x40000000 +#define STATUS_PICK_DETECTED 0x00000080 +#define STATUS_PIXEL_ERROR 0x00000040 +#define STATUS_BLIT_ERROR 0x00000020 +#define STATUS_QUAD_ERROR 0x00000010 +#define STATUS_QUAD_CONCAVE 0x00000008 +#define STATUS_QUAD_OUTSIDE 0x00000004 +#define STATUS_QUAD_INSIDE 0x00000002 +#define STATUS_QUAD_STRADDLE 0x00000001 + +/* Engine arguments / operation triggers */ +#define P9000_PE_BLIT 0x00000004 +#define P9000_PE_QUAD 0x00000008 +#define P9000_PE_PIXEL8 0x0000000c +#define P9000_PE_NEXTPIXELS 0x00000014 +#define P9000_PE_PIXEL1(index) (0x00000080 + ((index) << 2)) + +/* Control and conditions registers */ + +/* Out of range */ +#define P9000_PE_OOR 0x00000084 +/* Index register (0-3, for meta coordinates) */ +#define P9000_PE_INDEX 0x0000008c +/* Window offset (16x16)*/ +#define P9000_PE_WINOFFSET 0x00000090 +/* Clipping window */ +#define P9000_PE_WINMIN 0x00000094 +#define P9000_PE_WINMAX 0x00000098 +/* X Clip register */ +#define P9000_X_CLIPPING 0x000000a0 +/* Y Clip register */ +#define P9000_Y_CLIPPING 0x000000a4 +/* X Edge Less Than register */ +#define P9000_X_EDGE_LESS 0x000000a8 +/* X Edge Greater Than register */ +#define P9000_X_EDGE_GREATER 0x000000ac +/* Y Edge Less Than register */ +#define P9000_Y_EDGE_LESS 0x000000b0 +/* Y Edge Greater Than register */ +#define P9000_Y_EDGE_GREATER 0x000000b4 + +/* + * Drawing engine + */ + +/* Colors - 8 bit for P9000, 32 bit for P9100 */ +#define P9000_DE_FG_COLOR 0x00000200 +#define P9000_DE_BG_COLOR 0x00000204 +#define P9100_DE_COLOR0 0x00000200 +#define P9100_DE_COLOR1 0x00000204 +#define P9100_DE_COLOR2 0x00000238 +#define P9100_DE_COLOR3 0x0000023c + +/* How to encode a colors in 8 and 16 bit mode, for the P9100 */ +#define P9100_COLOR8(c) ((c) | ((c) << 8) | ((c) << 16) | ((c) << 24)) +#define P9100_COLOR16(c) ((c) | ((c) << 16)) + +/* Plane mask (8 bits on P9000, 32 bits on P9100) */ +#define P9000_DE_PLANEMASK 0x00000208 + +/* Drawing mode */ +#define P9000_DE_DRAWMODE 0x0000020c +#define DM_PICK_CONTROL 0x00000008 +#define DM_PICK_ENABLE 0x00000004 +#define DM_BUFFER_CONTROL 0x00000002 +#define DM_BUFFER_ENABLE0 0x00000000 +#define DM_BUFFER_ENABLE1 0x00000001 + +/* Pattern Origin (4 bit x 4 bit offset) */ +#define P9000_DE_PATTERN_ORIGIN_X 0x00000210 +#define P9000_DE_PATTERN_ORIGIN_Y 0x00000214 + +/* Raster operation */ +#define P9000_DE_RASTER 0x00000218 +#define P9100_RASTER_NO_SOLID 0x00002000 +#define P9100_RASTER_PATTERN_4COLOR 0x00004000 +#define P9100_RASTER_PIXEL1_TRANSPARENT 0x00008000 +#define P9000_RASTER_QUAD_OVERSIZE 0x00010000 +#define P9000_RASTER_QUAD_PATTERN 0x00020000 + +/* Raster minterms */ +#define P9000_RASTER_SRC 0xcccc +#define P9000_RASTER_DST 0xaaaa +#define P9000_RASTER_PATTERN 0xff00 +#define P9000_RASTER_MASK 0xffff +#define P9100_RASTER_SRC 0x00cc +#define P9100_RASTER_DST 0x00aa +#define P9100_RASTER_PATTERN 0x00f0 +#define P9100_RASTER_MASK 0x00ff + +/* Pixel8 excess storage */ +#define P9000_DE_PIXEL8 0x0000021c + +/* Clipping window - same as in PE */ +#define P9000_DE_WINMIN 0x00000220 +#define P9000_DE_WINMAX 0x00000224 + +/* Quad pattern - up to 4 items on P9000, 8 on P9100 */ +#define P9000_DE_PATTERN(index) (0x00000280 + ((index) << 2)) + +/* User pattern - up to 4 items */ +#define P9000_DE_USER(index) (0x00000290 + ((index) << 2)) + +/* Byte clipping window */ +#define P9100_DE_B_WINMIN 0x000002a0 +#define P9100_DE_B_WINMAX 0x000002a4 + +/* + * Coordinates + */ + +/* 32 bit X value */ +#define P9000_COORD_X 0x00000008 +/* 32 bit Y value */ +#define P9000_COORD_Y 0x00000010 +/* 16 bit X, 16 bit Y values packed */ +#define P9000_COORD_XY 0x00000018 + +/* Absolute (screen) coordinates */ +#define P9000_COORD_ABS 0x00000000 +/* Relative (in-window) coordinates */ +#define P9000_COORD_REL 0x00000020 + +/* How to pack a x16y16 value - note that they are in fact 12 bit values */ +#define P9000_COORDS(x,y) ((((x) & 0x0fff) << 16) | ((y) & 0x0fff)) + +/* Device coordinates - 4 edges */ +#define P9000_DC_COORD(index) (0x00001000 + ((index) * 0x40)) + +/* Load coordinates */ +#define P9000_LC_POINT 0x00001200 +#define P9000_LC_LINE 0x00001240 +#define P9000_LC_TRI 0x00001280 +#define P9000_LC_QUAD 0x000012c0 +#define P9000_LC_RECT 0x00001300 diff --git a/sys/dev/wscons/wsconsio.h b/sys/dev/wscons/wsconsio.h index c3e3221df2c..285dbf3547a 100644 --- a/sys/dev/wscons/wsconsio.h +++ b/sys/dev/wscons/wsconsio.h @@ -1,4 +1,4 @@ -/* $OpenBSD: wsconsio.h,v 1.28 2003/05/14 06:39:49 miod Exp $ */ +/* $OpenBSD: wsconsio.h,v 1.29 2003/06/17 21:21:33 miod Exp $ */ /* $NetBSD: wsconsio.h,v 1.31.2.1 2000/07/07 09:49:17 hannken Exp $ */ /* @@ -270,6 +270,7 @@ struct wsmouse_calibcoords { #define WSDISPLAY_TYPE_XVIDEO 37 /* Xvideo */ #define WSDISPLAY_TYPE_SUNCG12 38 /* Sun cgtwelve */ #define WSDISPLAY_TYPE_MGX 39 /* SMS MGX */ +#define WSDISPLAY_TYPE_SB_P9000 40 /* Tadpole SPARCbook P9000 */ /* Basic display information. Not applicable to all display types. */ struct wsdisplay_fbinfo { |