summaryrefslogtreecommitdiff
path: root/sys/arch/alpha/include/intr.h
diff options
context:
space:
mode:
Diffstat (limited to 'sys/arch/alpha/include/intr.h')
-rw-r--r--sys/arch/alpha/include/intr.h130
1 files changed, 107 insertions, 23 deletions
diff --git a/sys/arch/alpha/include/intr.h b/sys/arch/alpha/include/intr.h
index 6fb510601a2..9c8f150b151 100644
--- a/sys/arch/alpha/include/intr.h
+++ b/sys/arch/alpha/include/intr.h
@@ -1,5 +1,41 @@
-/* $OpenBSD: intr.h,v 1.11 2001/07/09 18:55:22 millert Exp $ */
-/* $NetBSD: intr.h,v 1.25 2000/05/23 05:12:56 thorpej Exp $ */
+/* $OpenBSD: intr.h,v 1.12 2001/09/30 13:08:45 art Exp $ */
+/* $NetBSD: intr.h,v 1.26 2000/06/03 20:47:41 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 2000 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
/*
* Copyright (c) 1997 Christopher G. Demetriou. All rights reserved.
@@ -32,16 +68,36 @@
#ifndef _ALPHA_INTR_H_
#define _ALPHA_INTR_H_
+#include <sys/lock.h>
#include <sys/queue.h>
#include <machine/atomic.h>
-#define IPL_NONE 0 /* disable only this interrupt */
+/*
+ * Alpha interrupts come in at one of 4 levels:
+ *
+ * software interrupt level
+ * i/o level 1
+ * i/o level 2
+ * clock level
+ *
+ * However, since we do not have any way to know which hardware
+ * level a particular i/o interrupt comes in on, we have to
+ * whittle it down to 3.
+ */
+
+#define IPL_NONE 1 /* disable only this interrupt */
#define IPL_BIO 1 /* disable block I/O interrupts */
-#define IPL_NET 2 /* disable network interrupts */
-#define IPL_TTY 3 /* disable terminal interrupts */
-#define IPL_CLOCK 4 /* disable clock interrupts */
-#define IPL_HIGH 5 /* disable all interrupts */
-#define IPL_SERIAL 6 /* disable serial interrupts */
+#define IPL_NET 1 /* disable network interrupts */
+#define IPL_TTY 1 /* disable terminal interrupts */
+#define IPL_CLOCK 2 /* disable clock interrupts */
+#define IPL_HIGH 3 /* disable all interrupts */
+#define IPL_SERIAL 1 /* disable serial interrupts */
+
+#define IPL_SOFTSERIAL 0 /* serial software interrupts */
+#define IPL_SOFTNET 1 /* network software interrupts */
+#define IPL_SOFTCLOCK 2 /* clock software interrupts */
+#define IPL_SOFT 3 /* other software interrupts */
+#define IPL_NSOFT 4
#define IST_UNUSABLE -1 /* interrupt cannot be used */
#define IST_NONE 0 /* none (dummy) */
@@ -82,21 +138,6 @@ _splraise(s)
#define spllpt() spltty()
/*
- * simulated software interrupt register
- */
-extern u_long ssir;
-
-#define SIR_NET 0x1
-#define SIR_CLOCK 0x2
-#define SIR_SERIAL 0x4
-
-#define setsoft(x) atomic_setbits_ulong(&ssir, (x))
-
-#define setsoftnet() setsoft(SIR_NET)
-#define setsoftclock() setsoft(SIR_CLOCK)
-#define setsoftserial() setsoft(SIR_SERIAL)
-
-/*
* Interprocessor interrupts. In order how we want them processed.
*/
#define ALPHA_IPI_HALT 0x0000000000000001UL
@@ -142,6 +183,49 @@ struct alpha_shared_intr {
((asi)[num].intr_maxstrays != 0 && \
(asi)[num].intr_nstrays == (asi)[num].intr_maxstrays)
+/*
+ * simulated software interrupt register
+ */
+extern unsigned long ssir;
+
+#define setsoft(x) atomic_setbits_ulong(&ssir, 1 << (x))
+
+#define __GENERIC_SOFT_INTERRUPTS
+struct alpha_soft_intrhand {
+ LIST_ENTRY(alpha_soft_intrhand)
+ sih_q;
+ struct alpha_soft_intr *sih_intrhead;
+ void (*sih_fn) __P((void *));
+ void *sih_arg;
+ int sih_pending;
+};
+
+struct alpha_soft_intr {
+ LIST_HEAD(, alpha_soft_intrhand)
+ softintr_q;
+ struct simplelock softintr_slock;
+ unsigned long softintr_ipl;
+};
+
+void *softintr_establish __P((int, void (*)(void *), void *));
+void softintr_disestablish __P((void *));
+void softintr_init __P((void));
+void softintr_dispatch __P((void));
+
+#define softintr_schedule(arg) \
+do { \
+ struct alpha_soft_intrhand *__sih = (arg); \
+ __sih->sih_pending = 1; \
+ setsoft(__sih->sih_intrhead->softintr_ipl); \
+} while (0)
+
+/* XXX For legacy software interrupts. */
+extern struct alpha_soft_intrhand *softnet_intrhand;
+extern struct alpha_soft_intrhand *softclock_intrhand;
+
+#define setsoftnet() softintr_schedule(softnet_intrhand)
+#define setsoftclock() softintr_schedule(softclock_intrhand)
+
struct alpha_shared_intr *alpha_shared_intr_alloc __P((unsigned int));
int alpha_shared_intr_dispatch __P((struct alpha_shared_intr *,
unsigned int));