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-rw-r--r--sys/arch/amiga/dev/grf_cv.c19
-rw-r--r--sys/arch/amiga/dev/grf_cvreg.h3
2 files changed, 17 insertions, 5 deletions
diff --git a/sys/arch/amiga/dev/grf_cv.c b/sys/arch/amiga/dev/grf_cv.c
index ec5a54aca7b..2e8e0a78057 100644
--- a/sys/arch/amiga/dev/grf_cv.c
+++ b/sys/arch/amiga/dev/grf_cv.c
@@ -1,4 +1,4 @@
-/* $NetBSD: grf_cv.c,v 1.3.2.3 1995/11/10 16:27:10 chopps Exp $ */
+/* $NetBSD: grf_cv.c,v 1.5 1995/12/27 07:15:53 chopps Exp $ */
/*
* Copyright (c) 1995 Michael Teske
@@ -395,10 +395,21 @@ cv_boardinit(gp)
clockpar = compute_clock(0x3473BC0);
test = (clockpar & 0xFF00) >> 8;
- WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
- test = clockpar & 0xFF;
- WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
+ if (RCrt(ba, CRT_ID_REVISION) == 0x10) {
+ WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
+
+ test = clockpar & 0xFF;
+ WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
+
+ test = (clockpar & 0xFF00) >> 8;
+ WSeq(ba, SEQ_ID_MORE_MAGIC, test);
+ } else {
+ WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
+
+ test = clockpar & 0xFF;
+ WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
+ }
/* We now load an 25 MHz, 31 kHz, 640x480 standard VGA Mode. */
/* DCLK */
diff --git a/sys/arch/amiga/dev/grf_cvreg.h b/sys/arch/amiga/dev/grf_cvreg.h
index a38dcbea6b9..9ba27e6361e 100644
--- a/sys/arch/amiga/dev/grf_cvreg.h
+++ b/sys/arch/amiga/dev/grf_cvreg.h
@@ -1,4 +1,4 @@
-/* $NetBSD: grf_cvreg.h,v 1.1.2.2 1995/11/10 16:27:13 chopps Exp $ */
+/* $NetBSD: grf_cvreg.h,v 1.3 1995/12/27 07:15:55 chopps Exp $ */
/*
* Copyright (c) 1995 Michael Teske
@@ -158,6 +158,7 @@ struct grfcvtext_mode {
#define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */
#define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */
#define SEQ_ID_RAMDAC_CNTL 0x18
+#define SEQ_ID_MORE_MAGIC 0x1A
/* CRT Controller: */
#define CRT_ADDRESS 0x03D4