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Diffstat (limited to 'sys/arch/armish/include/armish_intr.h')
| -rw-r--r-- | sys/arch/armish/include/armish_intr.h | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/sys/arch/armish/include/armish_intr.h b/sys/arch/armish/include/armish_intr.h new file mode 100644 index 00000000000..48f8153a5f7 --- /dev/null +++ b/sys/arch/armish/include/armish_intr.h @@ -0,0 +1,103 @@ +/* $OpenBSD: armish_intr.h,v 1.1 2006/05/29 17:13:19 drahn Exp $ */ +/* $NetBSD: i80321_intr.h,v 1.4 2003/07/05 06:53:08 dogcow Exp $ */ + +/* + * Copyright (c) 2001, 2002 Wasabi Systems, Inc. + * All rights reserved. + * + * Written by Jason R. Thorpe for Wasabi Systems, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed for the NetBSD Project by + * Wasabi Systems, Inc. + * 4. The name of Wasabi Systems, Inc. may not be used to endorse + * or promote products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _I80321_INTR_H_ +#define _I80321_INTR_H_ + +#define ARM_IRQ_HANDLER _C_LABEL(i80321_irq_handler) + +#ifndef _LOCORE + +#include <arm/armreg.h> +#include <arm/cpufunc.h> +#include <machine/intr.h> +#include <arm/softintr.h> + +extern __volatile int current_spl_level; +extern __volatile int softint_pending; +extern int i80321_imask[]; +void i80321_do_pending(void); + +void i80321_setipl(int new); +void i80321_splx(int new); +int i80321_splraise(int ipl); +int i80321_spllower(int ipl); +void i80321_setsoftintr(int si); + + +/* + * An useful function for interrupt handlers. + * XXX: This shouldn't be here. + */ +static __inline int +find_first_bit( uint32_t bits ) +{ + int count; + + /* since CLZ is available only on ARMv5, this isn't portable + * to all ARM CPUs. This file is for I80321 processor. + */ + asm( "clz %0, %1" : "=r" (count) : "r" (bits) ); + return 31-count; +} + + +int _splraise(int); +int _spllower(int); +void splx(int); +void _setsoftintr(int); + +/* + * This function *MUST* be called very early on in a port's + * initarm() function, before ANY spl*() functions are called. + * + * The parameter is the virtual address of the I80321's Interrupt + * Controller registers. + */ +void i80321_intr_bootstrap(vaddr_t); + +void i80321_irq_handler(void *); +void *i80321_intr_establish(int irqno, int level, int (*func)(void *), + void *cookie, char *name); +void i80321_intr_disestablish(void *cookie); +const char *i80321_intr_string(void *cookie); + +#endif /* ! _LOCORE */ + +#endif /* _I80321_INTR_H_ */ + |