diff options
Diffstat (limited to 'sys/arch/aviion/dev')
| -rw-r--r-- | sys/arch/aviion/dev/dma.c | 217 | ||||
| -rw-r--r-- | sys/arch/aviion/dev/dmareg.h | 40 | ||||
| -rw-r--r-- | sys/arch/aviion/dev/dmavar.h | 23 | ||||
| -rw-r--r-- | sys/arch/aviion/dev/oaic_syscon.c | 89 |
4 files changed, 368 insertions, 1 deletions
diff --git a/sys/arch/aviion/dev/dma.c b/sys/arch/aviion/dev/dma.c new file mode 100644 index 00000000000..eedb46875f1 --- /dev/null +++ b/sys/arch/aviion/dev/dma.c @@ -0,0 +1,217 @@ +/* $OpenBSD: dma.c,v 1.1 2013/10/23 10:07:14 miod Exp $ */ + +/* + * Copyright (c) 2013 Miodrag Vallat. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <sys/param.h> +#include <sys/kernel.h> +#include <sys/device.h> +#include <sys/malloc.h> +#include <sys/queue.h> + +#include <uvm/uvm.h> + +#include <machine/autoconf.h> +#include <machine/board.h> + +#include <aviion/dev/sysconvar.h> + +#include <aviion/dev/dmareg.h> +#include <aviion/dev/dmavar.h> + +/* + * DMA request information structure. + */ +struct dmareq { + TAILQ_ENTRY(dmareq) chain; + + vaddr_t mem; + size_t len; + uint dir; + + size_t lastcnt; + + void *cbarg; + void (*cbstart)(void *); + void (*cbdone)(void *); +}; + +struct dma_softc { + struct device sc_dev; + + struct intrhand sc_ih; + + TAILQ_HEAD(, dmareq) sc_req; +}; + +int dma_match(struct device *, void *, void *); +void dma_attach(struct device *, struct device *, void *); + +const struct cfattach dma_ca = { + sizeof(struct dma_softc), dma_match, dma_attach +}; + +struct cfdriver dma_cd = { + NULL, "dma", DV_DULL +}; + +int dma_intr(void *); +void dma_start(struct dma_softc *); + +int +dma_match(struct device *parent, void *match, void *aux) +{ + struct confargs *ca = aux; + + switch (cpuid) { +#ifdef AV400 + case AVIION_300_310: + case AVIION_400_4000: + case AVIION_410_4100: + case AVIION_300C_310C: + case AVIION_300CD_310CD: + case AVIION_300D_310D: + case AVIION_4300_25: + case AVIION_4300_20: + case AVIION_4300_16: + if (ca->ca_paddr == DMA_MAP) + return 1; + /* FALLTHROUGH */ +#endif + default: + return 0; + } +} + +void +dma_attach(struct device *parent, struct device *self, void *aux) +{ + struct dma_softc *sc = (struct dma_softc *)self; + + printf("\n"); + + *(volatile uint32_t *)DMA_COUNT = 0; /* clear possibly pending int */ + + TAILQ_INIT(&sc->sc_req); + + sc->sc_ih.ih_fn = dma_intr; + sc->sc_ih.ih_arg = sc; + sc->sc_ih.ih_flags = 0; + sc->sc_ih.ih_ipl = IPL_BIO; + sysconintr_establish(INTSRC_DMA, &sc->sc_ih, self->dv_xname); +} + +int +dma_intr(void *v) +{ + struct dma_softc *sc = v; + struct dmareq *req; + size_t tc; + + req = TAILQ_FIRST(&sc->sc_req); + if (req == NULL) { + printf("%s: interrupt but no active request?\n", __func__); + *(volatile uint32_t *)DMA_STOP = DMASTOP_INHIBIT; + return -1; + } + + tc = *(volatile uint32_t *)DMA_COUNT; + if (tc != 0) + printf("%s: unexpected intr, TC = %x\n", __func__, tc); + req->len -= req->lastcnt; + if (req->len == 0) { + /* this transfer is over */ + TAILQ_REMOVE(&sc->sc_req, req, chain); + + if (req->cbdone != NULL) + (*req->cbdone)(req->cbarg); + + free(req, M_DEVBUF); + } else { + req->mem += req->lastcnt; + } + dma_start(sc); + + return 1; +} + +int +dma_req(void *vaddr, size_t sz, int dir, void (*cbstart)(void *), + void (*cbdone)(void *), void *cbarg) +{ + struct dma_softc *sc; + struct dmareq *req; + int run; + int s; + + if (dma_cd.cd_devs == NULL || + (sc = (struct dma_softc *)dma_cd.cd_devs[0]) == NULL) + return ENXIO; + req = malloc(sizeof *req, M_DEVBUF, M_NOWAIT | M_CANFAIL); + if (req == NULL) + return ENOMEM; + + req->mem = (vaddr_t)vaddr; + req->len = sz; + req->dir = dir; + req->cbstart = cbstart; + req->cbdone = cbdone; + req->cbarg = cbarg; + req->lastcnt = 0; + + s = splbio(); + run = TAILQ_EMPTY(&sc->sc_req); + TAILQ_INSERT_TAIL(&sc->sc_req, req, chain); + if (run) + dma_start(sc); + splx(s); + + return 0; +} + +void +dma_start(struct dma_softc *sc) +{ + struct dmareq *req; + paddr_t pa, paoff; + + req = TAILQ_FIRST(&sc->sc_req); + if (req == NULL) { + *(volatile uint32_t *)DMA_STOP = DMASTOP_INHIBIT; + return; + } + + if (pmap_extract(pmap_kernel(), req->mem, &pa) == FALSE) + panic("%s: pmap_extract(%p) failed", + __func__, (void *)req->mem); + + paoff = pa & ~DMAMAP_MASK; + + req->lastcnt = DMA_BOUNDARY - paoff; + if (req->lastcnt > req->len) + req->lastcnt = req->len; + + *(volatile uint32_t *)DMA_DIR = req->dir; + *(volatile uint32_t *)DMA_COUNT = req->lastcnt; + *(volatile uint32_t *)DMA_OFF = paoff; + *(volatile uint32_t *)DMA_MAP = (pa & DMAMAP_MASK) | + DMAMAP_G | DMAMAP_V; + *(volatile uint32_t *)DMA_CLR_INVALID = DMACLR; + *(volatile uint32_t *)DMA_STOP = DMASTOP_RESTART; + + if (req->cbstart != NULL) + (*req->cbstart)(req->cbarg); +} diff --git a/sys/arch/aviion/dev/dmareg.h b/sys/arch/aviion/dev/dmareg.h new file mode 100644 index 00000000000..d60301c15c3 --- /dev/null +++ b/sys/arch/aviion/dev/dmareg.h @@ -0,0 +1,40 @@ +/* $OpenBSD: dmareg.h,v 1.1 2013/10/23 10:07:14 miod Exp $ */ + +/* + * Copyright (c) 2013 Miodrag Vallat. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * AV400 family DMA controller definitions + */ + +#define DMA_BOUNDARY 0x1000 + +#define DMA_MAP 0xfff8b000 +#define DMAMAP_MASK 0xfffff000 +#define DMAMAP_G 0x00000080 +#define DMAMAP_RO 0x00000004 +#define DMAMAP_V 0x00000001 +#define DMA_OFF 0xfff8b004 +#define DMAOFF_MASK 0x00000ffe +#define DMA_COUNT 0xfff8b008 +#define DMACOUNTC_MASK 0x00001ffe +#define DMA_DIR 0xfff8b00c +#define DMA_CLR_INVALID 0xfff8b010 +#define DMA_CLR_WP 0xfff8b014 +#define DMACLR 0x00000000 +#define DMA_STOP 0xfff8b018 +#define DMASTOP_RESTART 0x00000000 /* restart DMA */ +#define DMASTOP_INHIBIT 0x00000001 /* do not restart DMA */ diff --git a/sys/arch/aviion/dev/dmavar.h b/sys/arch/aviion/dev/dmavar.h new file mode 100644 index 00000000000..23527e9821d --- /dev/null +++ b/sys/arch/aviion/dev/dmavar.h @@ -0,0 +1,23 @@ +/* $OpenBSD: dmavar.h,v 1.1 2013/10/23 10:07:14 miod Exp $ */ + +/* + * Copyright (c) 2013 Miodrag Vallat. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#define DMADIR_TO_DEVICE 0x00000001 /* DMA from memory to device */ +#define DMADIR_FROM_DEVICE 0x00000000 /* DMA from device to memory */ + +int dma_req(void *, size_t, int, + void (*)(void *), void (*)(void *), void *); diff --git a/sys/arch/aviion/dev/oaic_syscon.c b/sys/arch/aviion/dev/oaic_syscon.c index 83294ae47ce..3d3402ec051 100644 --- a/sys/arch/aviion/dev/oaic_syscon.c +++ b/sys/arch/aviion/dev/oaic_syscon.c @@ -1,4 +1,4 @@ -/* $OpenBSD: oaic_syscon.c,v 1.1 2013/10/15 01:41:44 miod Exp $ */ +/* $OpenBSD: oaic_syscon.c,v 1.2 2013/10/23 10:07:14 miod Exp $ */ /* * Copyright (c) 2013 Miodrag Vallat. @@ -33,6 +33,9 @@ #include <dev/ic/aic6250reg.h> #include <dev/ic/aic6250var.h> +#if 0 +#include <aviion/dev/dmavar.h> +#endif int oaic_syscon_match(struct device *, void *, void *); void oaic_syscon_attach(struct device *, struct device *, void *); @@ -42,6 +45,9 @@ struct oaic_syscon_softc { bus_space_tag_t sc_iot; bus_space_handle_t sc_ioh; struct intrhand sc_ih; +#if 0 + uint8_t sc_dmac; +#endif }; const struct cfattach oaic_syscon_ca = { @@ -52,6 +58,13 @@ const struct cfattach oaic_syscon_ca = { uint8_t oaic_read(struct aic6250_softc *, uint); void oaic_write(struct aic6250_softc *, uint, uint8_t); +#if 0 +int oaic_dmastart(struct aic6250_softc *, void *, size_t, int); +int oaic_dmadone(struct aic6250_softc *); +void oaic_dmago(void *); +void oaic_dmastop(void *); +#endif + int oaic_syscon_match(struct device *parent, void *match, void *aux) { @@ -122,6 +135,11 @@ oaic_syscon_attach(struct device *parent, struct device *self, void *aux) sc->sc_read = oaic_read; sc->sc_write = oaic_write; +#if 0 + sc->sc_dma_start = oaic_dmastart; + sc->sc_dma_done = oaic_dmadone; +#endif + aic6250_attach(sc); ssc->sc_ih.ih_fn = (int(*)(void *))aic6250_intr; @@ -149,3 +167,72 @@ oaic_write(struct aic6250_softc *sc, uint reg, uint8_t val) bus_space_write_4(ssc->sc_iot, ssc->sc_ioh, reg << 2, val); } + +#if 0 +int +oaic_dmastart(struct aic6250_softc *sc, void *addr, size_t size, int datain) +{ + struct oaic_syscon_softc *osc = (struct oaic_syscon_softc *)sc; + char *vaddr = (char *)addr; + + /* + * The DMA engine can only operate on 16-bit words. + */ + if (size & 1) + return EINVAL; + + osc->sc_dmac = AIC_DC_DMA_XFER_EN | (datain ? 0 : AIC_DC_TRANSFER_DIR); + if ((vaddr_t)vaddr & 1) { + if (datain) { + /* + * The AIC_DC_ODD_XFER_START bit ought to have been + * set before changing phase to DATA IN. + */ + return EINVAL; + } + vaddr--; + osc->sc_dmac |= AIC_DC_ODD_XFER_START; + } + + return dma_req(vaddr, size, + datain ? DMADIR_FROM_DEVICE : DMADIR_TO_DEVICE, + oaic_dmago, oaic_dmastop, sc); +} + +void +oaic_dmago(void *v) +{ + struct aic6250_softc *sc = (struct aic6250_softc *)v; + struct oaic_syscon_softc *osc = (struct oaic_syscon_softc *)sc; + + sc->sc_flags |= AIC_DOINGDMA; + + oaic_write(sc, AIC_DMA_BYTE_COUNT_H, sc->sc_dleft >> 16); + oaic_write(sc, AIC_DMA_BYTE_COUNT_M, sc->sc_dleft >> 8); + oaic_write(sc, AIC_DMA_BYTE_COUNT_L, sc->sc_dleft); + oaic_write(sc, AIC_DMA_CNTRL, osc->sc_dmac); +} + +void +oaic_dmastop(void *v) +{ + struct aic6250_softc *sc = (struct aic6250_softc *)v; + + sc->sc_flags &= ~AIC_DOINGDMA; +} + +int +oaic_dmadone(struct aic6250_softc *sc) +{ + int resid; + + resid = oaic_read(sc, AIC_DMA_BYTE_COUNT_H) << 16 | + oaic_read(sc, AIC_DMA_BYTE_COUNT_M) << 8 | + oaic_read(sc, AIC_DMA_BYTE_COUNT_L); + + sc->sc_dp += sc->sc_dleft - resid; + sc->sc_dleft = resid; + + return 0; +} +#endif |