diff options
Diffstat (limited to 'sys/arch/hppa')
-rw-r--r-- | sys/arch/hppa/hppa/locore.S | 138 | ||||
-rw-r--r-- | sys/arch/hppa/include/cpufunc.h | 43 |
2 files changed, 141 insertions, 40 deletions
diff --git a/sys/arch/hppa/hppa/locore.S b/sys/arch/hppa/hppa/locore.S index 5c15e9b0d7b..a28179d6782 100644 --- a/sys/arch/hppa/hppa/locore.S +++ b/sys/arch/hppa/hppa/locore.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.S,v 1.32 2000/04/27 18:00:11 mickey Exp $ */ +/* $OpenBSD: locore.S,v 1.33 2000/05/15 17:22:39 mickey Exp $ */ /* * Copyright (c) 1998-2000 Michael Shalayeff @@ -1758,7 +1758,141 @@ $trap_copy_loop .export $trap$all$end, entry $trap$all$end - .align 32 + .import dcache_stride, data +ENTRY(fdcache) + ldil L%dcache_stride,t1 + ldw R%dcache_stride(t1), arg3 + + mtsp arg0, sr1 /* move the space register to sr1 */ + add arg1, arg2, arg0 /* get the last byte to flush in arg0 */ + + zdep arg3, 27, 28, t1 /* get size of a 16X loop in t1 */ + comb,< arg2, t1, fdc_short /* check for count < 16 * stride */ + addi -1, t1, t1 /* compute size of large loop - 1 */ + + andcm arg2, t1, t1 /* L = count - (count mod lenbigloop) */ + add arg1, t1, t1 /* ub for big loop is lb + L */ + + fdc,m arg3(sr1, arg1) /* Start flushing first cache line. */ +fdc_long + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + fdc,m arg3(sr1, arg1) + comb,<<,n arg1, t1, fdc_long + fdc,m arg3(sr1, arg1) +fdc_short /* flush one line at a time */ + comb,<<,n arg1, arg0, fdc_short + fdc,m arg3(sr1, arg1) + + addi -1, arg0, arg1 + fdc (sr1, arg1) + + bv r0(r2) + sync +EXIT(fdcache) + + .import dcache_stride, data +ENTRY(pdcache) + ldil L%dcache_stride,t1 + ldw R%dcache_stride(t1), arg3 + + mtsp arg0, sr1 /* move the space register to sr1 */ + add arg1, arg2, arg0 /* get the last byte to flush in arg0 */ + + zdep arg3, 27, 28, t1 /* get size of a 16X loop in t1 */ + comb,< arg2, t1, pdc_short /* check for count < 16 * stride */ + addi -1, t1, t1 /* compute size of large loop - 1 */ + + andcm arg2, t1, t1 /* L = count - (count mod lenbigloop) */ + add arg1, t1, t1 /* ub for big loop is lb + L */ + + pdc,m arg3(sr1, arg1) /* Start flushing first cache line. */ +pdc_long + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + pdc,m arg3(sr1, arg1) + comb,<<,n arg1, t1, pdc_long + pdc,m arg3(sr1, arg1) +pdc_short /* flush one line at a time */ + comb,<<,n arg1, arg0, pdc_short + pdc,m arg3(sr1, arg1) + + addi -1, arg0, arg1 + pdc (sr1, arg1) + + bv r0(r2) + sync +EXIT(pdcache) + + .import icache_stride, data +ENTRY(ficache) + ldil L%icache_stride,t1 + ldw R%icache_stride(t1), arg3 + + mtsp arg0, sr1 /* move the space register to sr1 */ + add arg1, arg2, arg0 /* get the last byte to flush in arg0 */ + + zdep arg3, 27, 28, t1 /* get size of a 16X loop in t1 */ + comb,< arg2, t1, fic_short /* check for count < 16 * stride */ + addi -1, t1, t1 /* compute size of large loop - 1 */ + + andcm arg2, t1, t1 /* L = count - (count mod lenbigloop) */ + add arg1, t1, t1 /* ub for big loop is lb + L */ + + fic,m arg3(sr1, arg1) /* Start flushing first cache line. */ +fic_long + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + fic,m arg3(sr1, arg1) + comb,<<,n arg1, t1, fic_long + fic,m arg3(sr1, arg1) +fic_short /* flush one line at a time */ + comb,<<,n arg1, arg0, fic_short + fic,m arg3(sr1, arg1) + + addi -1, arg0, arg1 + fic (sr1, arg1) + + bv r0(r2) + sync +EXIT(ficache) + ENTRY(setjmp) /* diff --git a/sys/arch/hppa/include/cpufunc.h b/sys/arch/hppa/include/cpufunc.h index 26fd5aa0ee7..560b2d34dad 100644 --- a/sys/arch/hppa/include/cpufunc.h +++ b/sys/arch/hppa/include/cpufunc.h @@ -1,7 +1,7 @@ -/* $OpenBSD: cpufunc.h,v 1.16 2000/04/24 17:39:54 mickey Exp $ */ +/* $OpenBSD: cpufunc.h,v 1.17 2000/05/15 17:22:40 mickey Exp $ */ /* - * Copyright (c) 1998 Michael Shalayeff + * Copyright (c) 1998,2000 Michael Shalayeff * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -119,42 +119,6 @@ static __inline register_t set_psw(register_t psw) __asm __volatile("sync\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop") static __inline void -ficache(pa_space_t sp, vaddr_t va, vsize_t size) -{ - extern int icache_stride; - vaddr_t eva = (va + size + icache_stride - 1) & ~(icache_stride - 1); - - mtsp(sp, 1); - while (va < eva) - __asm __volatile ("fic,m %1(%%sr1, %0)" - : "+r" (va) : "r" (icache_stride)); -} - -static __inline void -fdcache(pa_space_t sp, vaddr_t va, vsize_t size) -{ - extern int dcache_stride; - vaddr_t eva = (va + size + dcache_stride-1) & ~(dcache_stride - 1); - - mtsp(sp, 1); - while (va < eva) - __asm __volatile ("fdc,m %1(%%sr1, %0)" - : "+r" (va) : "r" (dcache_stride)); -} - -static __inline void -pdcache(pa_space_t sp, vaddr_t va, vsize_t size) -{ - extern int dcache_stride; - vaddr_t eva = (va + size + dcache_stride - 1) & ~(dcache_stride - 1); - - mtsp(sp, 1); - while (va < eva) - __asm __volatile ("pdc,m %1(%%sr1, %0)" - : "+r" (va) : "r" (dcache_stride)); -} - -static __inline void iitlba(u_int pg, pa_space_t sp, vaddr_t va) { mtsp(sp, 1); @@ -254,6 +218,9 @@ ledctl(int on, int off, int toggle) #endif #ifdef _KERNEL +void ficache __P((pa_space_t sp, vaddr_t va, vsize_t size)); +void fdcache __P((pa_space_t sp, vaddr_t va, vsize_t size)); +void pdcache __P((pa_space_t sp, vaddr_t va, vsize_t size)); void fcacheall __P((void)); void ptlball __P((void)); int btlb_insert __P((pa_space_t space, vaddr_t va, paddr_t pa, |