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-rw-r--r--sys/arch/i386/include/cpu.h19
-rw-r--r--sys/arch/i386/include/specialreg.h9
2 files changed, 23 insertions, 5 deletions
diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h
index d9f6fa63eaf..6bdea1fc2b6 100644
--- a/sys/arch/i386/include/cpu.h
+++ b/sys/arch/i386/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.51 2003/07/28 21:15:28 jason Exp $ */
+/* $OpenBSD: cpu.h,v 1.52 2003/12/18 23:46:19 tedu Exp $ */
/* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */
/*-
@@ -183,6 +183,19 @@ void initrtclock(void);
void startrtclock(void);
void rtcdrain(void *);
+/* est.c */
+#if !defined(SMALL_KERNEL) && defined(I686_CPU)
+void est_init(const char *);
+int est_cpuspeed(void *, size_t *, void *, size_t);
+int est_setperf(void *, size_t *, void *, size_t);
+#endif
+
+/* longrun.c */
+#if !defined(SMALL_KERNEL) && defined(I586_CPU)
+int longrun_cpuspeed(void *, size_t *, void *, size_t);
+int longrun_setperf(void *, size_t *, void *, size_t);
+#endif
+
/* npx.c */
void npxdrop(void);
void npxsave(void);
@@ -237,8 +250,7 @@ void setconf(void);
#define CPU_KBDRESET 10 /* keyboard reset under pcvt */
#define CPU_APMHALT 11 /* halt -p hack */
#define CPU_USERLDT 12
-#define CPU_LONGRUN 13 /* LongRun status */
-#define CPU_MAXID 14 /* number of valid machdep ids */
+#define CPU_MAXID 13 /* number of valid machdep ids */
#define CTL_MACHDEP_NAMES { \
{ 0, 0 }, \
@@ -254,7 +266,6 @@ void setconf(void);
{ "kbdreset", CTLTYPE_INT }, \
{ "apmhalt", CTLTYPE_INT }, \
{ "userldt", CTLTYPE_INT }, \
- { "longrun", CTLTYPE_STRUCT }, \
}
#endif /* !_I386_CPU_H_ */
diff --git a/sys/arch/i386/include/specialreg.h b/sys/arch/i386/include/specialreg.h
index 3c5dd045a57..5dbdb4cf155 100644
--- a/sys/arch/i386/include/specialreg.h
+++ b/sys/arch/i386/include/specialreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: specialreg.h,v 1.16 2003/07/25 21:42:02 mickey Exp $ */
+/* $OpenBSD: specialreg.h,v 1.17 2003/12/18 23:46:20 tedu Exp $ */
/* $NetBSD: specialreg.h,v 1.7 1994/10/27 04:16:26 cgd Exp $ */
/*-
@@ -168,6 +168,13 @@
#define MSR_MCG_CTL 0x17b
#define P6MSR_CTRSEL0 0x186
#define P6MSR_CTRSEL1 0x187
+#define MSR_PERF_STATUS 0x198 /* Pentium M */
+#define MSR_PERF_CTL 0x199 /* Pentium M */
+#define MSR_THERM_CONTROL 0x19a
+#define MSR_THERM_INTERRUPT 0x19b
+#define MSR_THERM_STATUS 0x19c
+#define MSR_THERM2_CTL 0x19d /* Pentium M */
+#define MSR_MISC_ENABLE 0x1a0
#define MSR_DEBUGCTLMSR 0x1d9
#define MSR_LASTBRANCHFROMIP 0x1db
#define MSR_LASTBRANCHTOIP 0x1dc