summaryrefslogtreecommitdiff
path: root/sys/arch/i386
diff options
context:
space:
mode:
Diffstat (limited to 'sys/arch/i386')
-rw-r--r--sys/arch/i386/i386/est.c1193
-rw-r--r--sys/arch/i386/i386/machdep.c196
-rw-r--r--sys/arch/i386/include/cpu.h3
-rw-r--r--sys/arch/i386/include/specialreg.h3
4 files changed, 794 insertions, 601 deletions
diff --git a/sys/arch/i386/i386/est.c b/sys/arch/i386/i386/est.c
index 81c9cca73c6..8b379d99665 100644
--- a/sys/arch/i386/i386/est.c
+++ b/sys/arch/i386/i386/est.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: est.c,v 1.18 2006/05/28 22:06:33 dim Exp $ */
+/* $OpenBSD: est.c,v 1.19 2006/06/12 13:18:18 dim Exp $ */
/*
* Copyright (c) 2003 Michael Eriksson.
* All rights reserved.
@@ -62,651 +62,657 @@
#include <machine/specialreg.h>
-struct fq_info {
- u_short mhz;
- u_short mv;
-};
+/* Convert MHz and mV into IDs for passing to the MSR. */
+#define ID16(MHz, mV, bus_clk) \
+ ((((MHz * 100 + 50) / bus_clk) << 8) | ((mV ? mV - 700 : 0) >> 4))
+
+/* Possible bus speeds (multiplied by 100 for rounding) */
+#define BUS100 10000
+#define BUS133 13333
+#define BUS166 16666
+#define BUS200 20000
+
/* Ultra Low Voltage Intel Pentium M processor 900 MHz */
-static const struct fq_info pm130_900_ulv[] = {
- { 900, 1004 },
- { 800, 988 },
- { 600, 844 },
+static const u_int16_t pm130_900_ulv[] = {
+ ID16( 900, 1004, BUS100),
+ ID16( 800, 988, BUS100),
+ ID16( 600, 844, BUS100),
};
/* Ultra Low Voltage Intel Pentium M processor 1.00 GHz */
-static const struct fq_info pm130_1000_ulv[] = {
- { 1000, 1004 },
- { 900, 988 },
- { 800, 972 },
- { 600, 844 },
+static const u_int16_t pm130_1000_ulv[] = {
+ ID16(1000, 1004, BUS100),
+ ID16( 900, 988, BUS100),
+ ID16( 800, 972, BUS100),
+ ID16( 600, 844, BUS100),
};
/* Ultra Low Voltage Intel Pentium M processor 1.10 GHz */
-static const struct fq_info pm130_1100_ulv[] = {
- { 1100, 1004 },
- { 1000, 988 },
- { 900, 972 },
- { 800, 956 },
- { 600, 844 },
+static const u_int16_t pm130_1100_ulv[] = {
+ ID16(1100, 1004, BUS100),
+ ID16(1000, 988, BUS100),
+ ID16( 900, 972, BUS100),
+ ID16( 800, 956, BUS100),
+ ID16( 600, 844, BUS100),
};
/* Low Voltage Intel Pentium M processor 1.10 GHz */
-static const struct fq_info pm130_1100_lv[] = {
- { 1100, 1180 },
- { 1000, 1164 },
- { 900, 1100 },
- { 800, 1020 },
- { 600, 956 },
+static const u_int16_t pm130_1100_lv[] = {
+ ID16(1100, 1180, BUS100),
+ ID16(1000, 1164, BUS100),
+ ID16( 900, 1100, BUS100),
+ ID16( 800, 1020, BUS100),
+ ID16( 600, 956, BUS100),
};
/* Low Voltage Intel Pentium M processor 1.20 GHz */
-static const struct fq_info pm130_1200_lv[] = {
- { 1200, 1180 },
- { 1100, 1164 },
- { 1000, 1100 },
- { 900, 1020 },
- { 800, 1004 },
- { 600, 956 },
+static const u_int16_t pm130_1200_lv[] = {
+ ID16(1200, 1180, BUS100),
+ ID16(1100, 1164, BUS100),
+ ID16(1000, 1100, BUS100),
+ ID16( 900, 1020, BUS100),
+ ID16( 800, 1004, BUS100),
+ ID16( 600, 956, BUS100),
};
/* Low Voltage Intel Pentium M processor 1.30 GHz */
-static const struct fq_info pm130_1300_lv[] = {
- { 1300, 1180 },
- { 1200, 1164 },
- { 1100, 1100 },
- { 1000, 1020 },
- { 900, 1004 },
- { 800, 988 },
- { 600, 956 },
+static const u_int16_t pm130_1300_lv[] = {
+ ID16(1300, 1180, BUS100),
+ ID16(1200, 1164, BUS100),
+ ID16(1100, 1100, BUS100),
+ ID16(1000, 1020, BUS100),
+ ID16( 900, 1004, BUS100),
+ ID16( 800, 988, BUS100),
+ ID16( 600, 956, BUS100),
};
/* Intel Pentium M processor 1.30 GHz */
-static const struct fq_info pm130_1300[] = {
- { 1300, 1388 },
- { 1200, 1356 },
- { 1000, 1292 },
- { 800, 1260 },
- { 600, 956 },
+static const u_int16_t pm130_1300[] = {
+ ID16(1300, 1388, BUS100),
+ ID16(1200, 1356, BUS100),
+ ID16(1000, 1292, BUS100),
+ ID16( 800, 1260, BUS100),
+ ID16( 600, 956, BUS100),
};
/* Intel Pentium M processor 1.40 GHz */
-static const struct fq_info pm130_1400[] = {
- { 1400, 1484 },
- { 1200, 1436 },
- { 1000, 1308 },
- { 800, 1180 },
- { 600, 956 }
+static const u_int16_t pm130_1400[] = {
+ ID16(1400, 1484, BUS100),
+ ID16(1200, 1436, BUS100),
+ ID16(1000, 1308, BUS100),
+ ID16( 800, 1180, BUS100),
+ ID16( 600, 956, BUS100),
};
/* Intel Pentium M processor 1.50 GHz */
-static const struct fq_info pm130_1500[] = {
- { 1500, 1484 },
- { 1400, 1452 },
- { 1200, 1356 },
- { 1000, 1228 },
- { 800, 1116 },
- { 600, 956 }
+static const u_int16_t pm130_1500[] = {
+ ID16(1500, 1484, BUS100),
+ ID16(1400, 1452, BUS100),
+ ID16(1200, 1356, BUS100),
+ ID16(1000, 1228, BUS100),
+ ID16( 800, 1116, BUS100),
+ ID16( 600, 956, BUS100),
};
/* Intel Pentium M processor 1.60 GHz */
-static const struct fq_info pm130_1600[] = {
- { 1600, 1484 },
- { 1400, 1420 },
- { 1200, 1276 },
- { 1000, 1164 },
- { 800, 1036 },
- { 600, 956 }
+static const u_int16_t pm130_1600[] = {
+ ID16(1600, 1484, BUS100),
+ ID16(1400, 1420, BUS100),
+ ID16(1200, 1276, BUS100),
+ ID16(1000, 1164, BUS100),
+ ID16( 800, 1036, BUS100),
+ ID16( 600, 956, BUS100),
};
/* Intel Pentium M processor 1.70 GHz */
-static const struct fq_info pm130_1700[] = {
- { 1700, 1484 },
- { 1400, 1308 },
- { 1200, 1228 },
- { 1000, 1116 },
- { 800, 1004 },
- { 600, 956 }
+static const u_int16_t pm130_1700[] = {
+ ID16(1700, 1484, BUS100),
+ ID16(1400, 1308, BUS100),
+ ID16(1200, 1228, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1004, BUS100),
+ ID16( 600, 956, BUS100),
};
/* Intel Pentium M processor 723 1.0 GHz */
-static const struct fq_info pm90_n723[] = {
- { 1000, 940 },
- { 900, 908 },
- { 800, 876 },
- { 600, 812 }
+static const u_int16_t pm90_n723[] = {
+ ID16(1000, 940, BUS100),
+ ID16( 900, 908, BUS100),
+ ID16( 800, 876, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 733 1.1 GHz, VID #G */
-static const struct fq_info pm90_n733g[] = {
- { 1100, 956 },
- { 1000, 940 },
- { 900, 908 },
- { 800, 876 },
- { 600, 812 }
+static const u_int16_t pm90_n733g[] = {
+ ID16(1100, 956, BUS100),
+ ID16(1000, 940, BUS100),
+ ID16( 900, 908, BUS100),
+ ID16( 800, 876, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 733 1.1 GHz, VID #H */
-static const struct fq_info pm90_n733h[] = {
- { 1100, 940 },
- { 1000, 924 },
- { 900, 892 },
- { 800, 876 },
- { 600, 812 }
+static const u_int16_t pm90_n733h[] = {
+ ID16(1100, 940, BUS100),
+ ID16(1000, 924, BUS100),
+ ID16( 900, 892, BUS100),
+ ID16( 800, 876, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 733 1.1 GHz, VID #I */
-static const struct fq_info pm90_n733i[] = {
- { 1100, 924 },
- { 1000, 908 },
- { 900, 892 },
- { 800, 860 },
- { 600, 812 }
+static const u_int16_t pm90_n733i[] = {
+ ID16(1100, 924, BUS100),
+ ID16(1000, 908, BUS100),
+ ID16( 900, 892, BUS100),
+ ID16( 800, 860, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 733 1.1 GHz, VID #J */
-static const struct fq_info pm90_n733j[] = {
- { 1100, 908 },
- { 1000, 892 },
- { 900, 876 },
- { 800, 860 },
- { 600, 812 }
+static const u_int16_t pm90_n733j[] = {
+ ID16(1100, 908, BUS100),
+ ID16(1000, 892, BUS100),
+ ID16( 900, 876, BUS100),
+ ID16( 800, 860, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 733 1.1 GHz, VID #K */
-static const struct fq_info pm90_n733k[] = {
- { 1100, 892 },
- { 1000, 876 },
- { 900, 860 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n733k[] = {
+ ID16(1100, 892, BUS100),
+ ID16(1000, 876, BUS100),
+ ID16( 900, 860, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 733 1.1 GHz, VID #L */
-static const struct fq_info pm90_n733l[] = {
- { 1100, 876 },
- { 1000, 876 },
- { 900, 860 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n733l[] = {
+ ID16(1100, 876, BUS100),
+ ID16(1000, 876, BUS100),
+ ID16( 900, 860, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 753 1.2 GHz, VID #G */
-static const struct fq_info pm90_n753g[] = {
- { 1200, 956 },
- { 1100, 940 },
- { 1000, 908 },
- { 900, 892 },
- { 800, 860 },
- { 600, 812 }
+static const u_int16_t pm90_n753g[] = {
+ ID16(1200, 956, BUS100),
+ ID16(1100, 940, BUS100),
+ ID16(1000, 908, BUS100),
+ ID16( 900, 892, BUS100),
+ ID16( 800, 860, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 753 1.2 GHz, VID #H */
-static const struct fq_info pm90_n753h[] = {
- { 1200, 940 },
- { 1100, 924 },
- { 1000, 908 },
- { 900, 876 },
- { 800, 860 },
- { 600, 812 }
+static const u_int16_t pm90_n753h[] = {
+ ID16(1200, 940, BUS100),
+ ID16(1100, 924, BUS100),
+ ID16(1000, 908, BUS100),
+ ID16( 900, 876, BUS100),
+ ID16( 800, 860, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 753 1.2 GHz, VID #I */
-static const struct fq_info pm90_n753i[] = {
- { 1200, 924 },
- { 1100, 908 },
- { 1000, 892 },
- { 900, 876 },
- { 800, 860 },
- { 600, 812 }
+static const u_int16_t pm90_n753i[] = {
+ ID16(1200, 924, BUS100),
+ ID16(1100, 908, BUS100),
+ ID16(1000, 892, BUS100),
+ ID16( 900, 876, BUS100),
+ ID16( 800, 860, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 753 1.2 GHz, VID #J */
-static const struct fq_info pm90_n753j[] = {
- { 1200, 908 },
- { 1100, 892 },
- { 1000, 876 },
- { 900, 860 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n753j[] = {
+ ID16(1200, 908, BUS100),
+ ID16(1100, 892, BUS100),
+ ID16(1000, 876, BUS100),
+ ID16( 900, 860, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 753 1.2 GHz, VID #K */
-static const struct fq_info pm90_n753k[] = {
- { 1200, 892 },
- { 1100, 892 },
- { 1000, 876 },
- { 900, 860 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n753k[] = {
+ ID16(1200, 892, BUS100),
+ ID16(1100, 892, BUS100),
+ ID16(1000, 876, BUS100),
+ ID16( 900, 860, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 753 1.2 GHz, VID #L */
-static const struct fq_info pm90_n753l[] = {
- { 1200, 876 },
- { 1100, 876 },
- { 1000, 860 },
- { 900, 844 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n753l[] = {
+ ID16(1200, 876, BUS100),
+ ID16(1100, 876, BUS100),
+ ID16(1000, 860, BUS100),
+ ID16( 900, 844, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 773 1.3 GHz, VID #G */
-static const struct fq_info pm90_n773g[] = {
- { 1300, 956 },
- { 1200, 940 },
- { 1100, 924 },
- { 1000, 908 },
- { 900, 876 },
- { 800, 860 },
- { 600, 812 }
+static const u_int16_t pm90_n773g[] = {
+ ID16(1300, 956, BUS100),
+ ID16(1200, 940, BUS100),
+ ID16(1100, 924, BUS100),
+ ID16(1000, 908, BUS100),
+ ID16( 900, 876, BUS100),
+ ID16( 800, 860, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 773 1.3 GHz, VID #H */
-static const struct fq_info pm90_n773h[] = {
- { 1300, 940 },
- { 1200, 924 },
- { 1100, 908 },
- { 1000, 892 },
- { 900, 876 },
- { 800, 860 },
- { 600, 812 }
+static const u_int16_t pm90_n773h[] = {
+ ID16(1300, 940, BUS100),
+ ID16(1200, 924, BUS100),
+ ID16(1100, 908, BUS100),
+ ID16(1000, 892, BUS100),
+ ID16( 900, 876, BUS100),
+ ID16( 800, 860, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 773 1.3 GHz, VID #I */
-static const struct fq_info pm90_n773i[] = {
- { 1300, 924 },
- { 1200, 908 },
- { 1100, 892 },
- { 1000, 876 },
- { 900, 860 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n773i[] = {
+ ID16(1300, 924, BUS100),
+ ID16(1200, 908, BUS100),
+ ID16(1100, 892, BUS100),
+ ID16(1000, 876, BUS100),
+ ID16( 900, 860, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 773 1.3 GHz, VID #J */
-static const struct fq_info pm90_n773j[] = {
- { 1300, 908 },
- { 1200, 908 },
- { 1100, 892 },
- { 1000, 876 },
- { 900, 860 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n773j[] = {
+ ID16(1300, 908, BUS100),
+ ID16(1200, 908, BUS100),
+ ID16(1100, 892, BUS100),
+ ID16(1000, 876, BUS100),
+ ID16( 900, 860, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 773 1.3 GHz, VID #K */
-static const struct fq_info pm90_n773k[] = {
- { 1300, 892 },
- { 1200, 892 },
- { 1100, 876 },
- { 1000, 860 },
- { 900, 860 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n773k[] = {
+ ID16(1300, 892, BUS100),
+ ID16(1200, 892, BUS100),
+ ID16(1100, 876, BUS100),
+ ID16(1000, 860, BUS100),
+ ID16( 900, 860, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 773 1.3 GHz, VID #L */
-static const struct fq_info pm90_n773l[] = {
- { 1300, 876 },
- { 1200, 876 },
- { 1100, 860 },
- { 1000, 860 },
- { 900, 844 },
- { 800, 844 },
- { 600, 812 }
+static const u_int16_t pm90_n773l[] = {
+ ID16(1300, 876, BUS100),
+ ID16(1200, 876, BUS100),
+ ID16(1100, 860, BUS100),
+ ID16(1000, 860, BUS100),
+ ID16( 900, 844, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 812, BUS100),
};
/* Intel Pentium M processor 738 1.4 GHz */
-static const struct fq_info pm90_n738[] = {
- { 1400, 1116 },
- { 1300, 1116 },
- { 1200, 1100 },
- { 1100, 1068 },
- { 1000, 1052 },
- { 900, 1036 },
- { 800, 1020 },
- { 600, 988 }
+static const u_int16_t pm90_n738[] = {
+ ID16(1400, 1116, BUS100),
+ ID16(1300, 1116, BUS100),
+ ID16(1200, 1100, BUS100),
+ ID16(1100, 1068, BUS100),
+ ID16(1000, 1052, BUS100),
+ ID16( 900, 1036, BUS100),
+ ID16( 800, 1020, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 758 1.5 GHz */
-static const struct fq_info pm90_n758[] = {
- { 1500, 1116 },
- { 1400, 1116 },
- { 1300, 1100 },
- { 1200, 1084 },
- { 1100, 1068 },
- { 1000, 1052 },
- { 900, 1036 },
- { 800, 1020 },
- { 600, 988 }
+static const u_int16_t pm90_n758[] = {
+ ID16(1500, 1116, BUS100),
+ ID16(1400, 1116, BUS100),
+ ID16(1300, 1100, BUS100),
+ ID16(1200, 1084, BUS100),
+ ID16(1100, 1068, BUS100),
+ ID16(1000, 1052, BUS100),
+ ID16( 900, 1036, BUS100),
+ ID16( 800, 1020, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 778 1.6 GHz */
-static const struct fq_info pm90_n778[] = {
- { 1600, 1116 },
- { 1500, 1116 },
- { 1400, 1100 },
- { 1300, 1184 },
- { 1200, 1068 },
- { 1100, 1052 },
- { 1000, 1052 },
- { 900, 1036 },
- { 800, 1020 },
- { 600, 988 }
-};
-
-/* Intel Pentium M processor 710 1.4 GHz */
-static const struct fq_info pm90_n710[] = {
- { 1400, 1340 },
- { 1200, 1228 },
- { 1000, 1148 },
- { 800, 1068 },
- { 600, 998 }
+static const u_int16_t pm90_n778[] = {
+ ID16(1600, 1116, BUS100),
+ ID16(1500, 1116, BUS100),
+ ID16(1400, 1100, BUS100),
+ ID16(1300, 1184, BUS100),
+ ID16(1200, 1068, BUS100),
+ ID16(1100, 1052, BUS100),
+ ID16(1000, 1052, BUS100),
+ ID16( 900, 1036, BUS100),
+ ID16( 800, 1020, BUS100),
+ ID16( 600, 988, BUS100),
+};
+
+/* Intel Pentium M processor 710 1.4 GHz, 533 MHz FSB */
+static const u_int16_t pm90_n710[] = {
+ ID16(1400, 1340, BUS133),
+ ID16(1200, 1228, BUS133),
+ ID16(1000, 1148, BUS133),
+ ID16( 800, 1068, BUS133),
+ ID16( 600, 998, BUS133),
};
/* Intel Pentium M processor 715 1.5 GHz, VID #A */
-static const struct fq_info pm90_n715a[] = {
- { 1500, 1340 },
- { 1200, 1228 },
- { 1000, 1148 },
- { 800, 1068 },
- { 600, 988 }
+static const u_int16_t pm90_n715a[] = {
+ ID16(1500, 1340, BUS100),
+ ID16(1200, 1228, BUS100),
+ ID16(1000, 1148, BUS100),
+ ID16( 800, 1068, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 715 1.5 GHz, VID #B */
-static const struct fq_info pm90_n715b[] = {
- { 1500, 1324 },
- { 1200, 1212 },
- { 1000, 1148 },
- { 800, 1068 },
- { 600, 988 }
+static const u_int16_t pm90_n715b[] = {
+ ID16(1500, 1324, BUS100),
+ ID16(1200, 1212, BUS100),
+ ID16(1000, 1148, BUS100),
+ ID16( 800, 1068, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 715 1.5 GHz, VID #C */
-static const struct fq_info pm90_n715c[] = {
- { 1500, 1308 },
- { 1200, 1212 },
- { 1000, 1132 },
- { 800, 1068 },
- { 600, 988 }
+static const u_int16_t pm90_n715c[] = {
+ ID16(1500, 1308, BUS100),
+ ID16(1200, 1212, BUS100),
+ ID16(1000, 1132, BUS100),
+ ID16( 800, 1068, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 715 1.5 GHz, VID #D */
-static const struct fq_info pm90_n715d[] = {
- { 1500, 1276 },
- { 1200, 1180 },
- { 1000, 1116 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n715d[] = {
+ ID16(1500, 1276, BUS100),
+ ID16(1200, 1180, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 725 1.6 GHz, VID #A */
-static const struct fq_info pm90_n725a[] = {
- { 1600, 1340 },
- { 1400, 1276 },
- { 1200, 1212 },
- { 1000, 1132 },
- { 800, 1068 },
- { 600, 988 }
+static const u_int16_t pm90_n725a[] = {
+ ID16(1600, 1340, BUS100),
+ ID16(1400, 1276, BUS100),
+ ID16(1200, 1212, BUS100),
+ ID16(1000, 1132, BUS100),
+ ID16( 800, 1068, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 725 1.6 GHz, VID #B */
-static const struct fq_info pm90_n725b[] = {
- { 1600, 1324 },
- { 1400, 1260 },
- { 1200, 1196 },
- { 1000, 1132 },
- { 800, 1068 },
- { 600, 988 }
+static const u_int16_t pm90_n725b[] = {
+ ID16(1600, 1324, BUS100),
+ ID16(1400, 1260, BUS100),
+ ID16(1200, 1196, BUS100),
+ ID16(1000, 1132, BUS100),
+ ID16( 800, 1068, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 725 1.6 GHz, VID #C */
-static const struct fq_info pm90_n725c[] = {
- { 1600, 1308 },
- { 1400, 1244 },
- { 1200, 1180 },
- { 1000, 1116 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n725c[] = {
+ ID16(1600, 1308, BUS100),
+ ID16(1400, 1244, BUS100),
+ ID16(1200, 1180, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 725 1.6 GHz, VID #D */
-static const struct fq_info pm90_n725d[] = {
- { 1600, 1276 },
- { 1400, 1228 },
- { 1200, 1164 },
- { 1000, 1116 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n725d[] = {
+ ID16(1600, 1276, BUS100),
+ ID16(1400, 1228, BUS100),
+ ID16(1200, 1164, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 730 1.6 GHz, 533 MHz FSB */
-static const struct fq_info pm90_n730[] = {
- { 1600, 1308 },
- { 1333, 1260 },
- { 1200, 1212 },
- { 1067, 1180 },
- { 800, 988 }
+static const u_int16_t pm90_n730[] = {
+ ID16(1600, 1308, BUS133),
+ ID16(1333, 1260, BUS133),
+ ID16(1200, 1212, BUS133),
+ ID16(1067, 1180, BUS133),
+ ID16( 800, 988, BUS133),
};
/* Intel Pentium M processor 735 1.7 GHz, VID #A */
-static const struct fq_info pm90_n735a[] = {
- { 1700, 1340 },
- { 1400, 1244 },
- { 1200, 1180 },
- { 1000, 1116 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n735a[] = {
+ ID16(1700, 1340, BUS100),
+ ID16(1400, 1244, BUS100),
+ ID16(1200, 1180, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 735 1.7 GHz, VID #B */
-static const struct fq_info pm90_n735b[] = {
- { 1700, 1324 },
- { 1400, 1244 },
- { 1200, 1180 },
- { 1000, 1116 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n735b[] = {
+ ID16(1700, 1324, BUS100),
+ ID16(1400, 1244, BUS100),
+ ID16(1200, 1180, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 735 1.7 GHz, VID #C */
-static const struct fq_info pm90_n735c[] = {
- { 1700, 1308 },
- { 1400, 1228 },
- { 1200, 1164 },
- { 1000, 1116 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n735c[] = {
+ ID16(1700, 1308, BUS100),
+ ID16(1400, 1228, BUS100),
+ ID16(1200, 1164, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 735 1.7 GHz, VID #D */
-static const struct fq_info pm90_n735d[] = {
- { 1700, 1276 },
- { 1400, 1212 },
- { 1200, 1148 },
- { 1000, 1100 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n735d[] = {
+ ID16(1700, 1276, BUS100),
+ ID16(1400, 1212, BUS100),
+ ID16(1200, 1148, BUS100),
+ ID16(1000, 1100, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 740 1.73 GHz, 533 MHz FSB */
-static const struct fq_info pm90_n740[] = {
- { 1733, 1356 },
- { 1333, 1212 },
- { 1067, 1100 },
- { 800, 988 },
+static const u_int16_t pm90_n740[] = {
+ ID16(1733, 1356, BUS133),
+ ID16(1333, 1212, BUS133),
+ ID16(1067, 1100, BUS133),
+ ID16( 800, 988, BUS133),
};
/* Intel Pentium M processor 745 1.8 GHz, VID #A */
-static const struct fq_info pm90_n745a[] = {
- { 1800, 1340 },
- { 1600, 1292 },
- { 1400, 1228 },
- { 1200, 1164 },
- { 1000, 1116 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n745a[] = {
+ ID16(1800, 1340, BUS100),
+ ID16(1600, 1292, BUS100),
+ ID16(1400, 1228, BUS100),
+ ID16(1200, 1164, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 745 1.8 GHz, VID #B */
-static const struct fq_info pm90_n745b[] = {
- { 1800, 1324 },
- { 1600, 1276 },
- { 1400, 1212 },
- { 1200, 1164 },
- { 1000, 1116 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n745b[] = {
+ ID16(1800, 1324, BUS100),
+ ID16(1600, 1276, BUS100),
+ ID16(1400, 1212, BUS100),
+ ID16(1200, 1164, BUS100),
+ ID16(1000, 1116, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 745 1.8 GHz, VID #C */
-static const struct fq_info pm90_n745c[] = {
- { 1800, 1308 },
- { 1600, 1260 },
- { 1400, 1212 },
- { 1200, 1148 },
- { 1000, 1100 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n745c[] = {
+ ID16(1800, 1308, BUS100),
+ ID16(1600, 1260, BUS100),
+ ID16(1400, 1212, BUS100),
+ ID16(1200, 1148, BUS100),
+ ID16(1000, 1100, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 745 1.8 GHz, VID #D */
-static const struct fq_info pm90_n745d[] = {
- { 1800, 1276 },
- { 1600, 1228 },
- { 1400, 1180 },
- { 1200, 1132 },
- { 1000, 1084 },
- { 800, 1036 },
- { 600, 988 }
+static const u_int16_t pm90_n745d[] = {
+ ID16(1800, 1276, BUS100),
+ ID16(1600, 1228, BUS100),
+ ID16(1400, 1180, BUS100),
+ ID16(1200, 1132, BUS100),
+ ID16(1000, 1084, BUS100),
+ ID16( 800, 1036, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 750 1.86 GHz, 533 MHz FSB */
/* values extracted from \_PR\NPSS (via _PSS) SDST ACPI table */
-static const struct fq_info pm90_n750[] = {
- { 1867, 1308 },
- { 1600, 1228 },
- { 1333, 1148 },
- { 1067, 1068 },
- { 800, 988 }
+static const u_int16_t pm90_n750[] = {
+ ID16(1867, 1308, BUS133),
+ ID16(1600, 1228, BUS133),
+ ID16(1333, 1148, BUS133),
+ ID16(1067, 1068, BUS133),
+ ID16( 800, 988, BUS133),
};
/* Intel Pentium M processor 755 2.0 GHz, VID #A */
-static const struct fq_info pm90_n755a[] = {
- { 2000, 1340 },
- { 1800, 1292 },
- { 1600, 1244 },
- { 1400, 1196 },
- { 1200, 1148 },
- { 1000, 1100 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n755a[] = {
+ ID16(2000, 1340, BUS100),
+ ID16(1800, 1292, BUS100),
+ ID16(1600, 1244, BUS100),
+ ID16(1400, 1196, BUS100),
+ ID16(1200, 1148, BUS100),
+ ID16(1000, 1100, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 755 2.0 GHz, VID #B */
-static const struct fq_info pm90_n755b[] = {
- { 2000, 1324 },
- { 1800, 1276 },
- { 1600, 1228 },
- { 1400, 1180 },
- { 1200, 1132 },
- { 1000, 1084 },
- { 800, 1036 },
- { 600, 988 }
+static const u_int16_t pm90_n755b[] = {
+ ID16(2000, 1324, BUS100),
+ ID16(1800, 1276, BUS100),
+ ID16(1600, 1228, BUS100),
+ ID16(1400, 1180, BUS100),
+ ID16(1200, 1132, BUS100),
+ ID16(1000, 1084, BUS100),
+ ID16( 800, 1036, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 755 2.0 GHz, VID #C */
-static const struct fq_info pm90_n755c[] = {
- { 2000, 1308 },
- { 1800, 1276 },
- { 1600, 1228 },
- { 1400, 1180 },
- { 1200, 1132 },
- { 1000, 1084 },
- { 800, 1036 },
- { 600, 988 }
+static const u_int16_t pm90_n755c[] = {
+ ID16(2000, 1308, BUS100),
+ ID16(1800, 1276, BUS100),
+ ID16(1600, 1228, BUS100),
+ ID16(1400, 1180, BUS100),
+ ID16(1200, 1132, BUS100),
+ ID16(1000, 1084, BUS100),
+ ID16( 800, 1036, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 755 2.0 GHz, VID #D */
-static const struct fq_info pm90_n755d[] = {
- { 2000, 1276 },
- { 1800, 1244 },
- { 1600, 1196 },
- { 1400, 1164 },
- { 1200, 1116 },
- { 1000, 1084 },
- { 800, 1036 },
- { 600, 988 }
+static const u_int16_t pm90_n755d[] = {
+ ID16(2000, 1276, BUS100),
+ ID16(1800, 1244, BUS100),
+ ID16(1600, 1196, BUS100),
+ ID16(1400, 1164, BUS100),
+ ID16(1200, 1116, BUS100),
+ ID16(1000, 1084, BUS100),
+ ID16( 800, 1036, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 760 2.0 GHz, 533 MHz FSB */
-static const struct fq_info pm90_n760[] = {
- { 2000, 1356 },
- { 1600, 1244 },
- { 1333, 1164 },
- { 1067, 1084 },
- { 800, 988 }
+static const u_int16_t pm90_n760[] = {
+ ID16(2000, 1356, BUS133),
+ ID16(1600, 1244, BUS133),
+ ID16(1333, 1164, BUS133),
+ ID16(1067, 1084, BUS133),
+ ID16( 800, 988, BUS133),
};
/* Intel Pentium M processor 765 2.1 GHz, VID #A */
-static const struct fq_info pm90_n765a[] = {
- { 2100, 1340 },
- { 1800, 1276 },
- { 1600, 1228 },
- { 1400, 1180 },
- { 1200, 1132 },
- { 1000, 1084 },
- { 800, 1036 },
- { 600, 988 }
+static const u_int16_t pm90_n765a[] = {
+ ID16(2100, 1340, BUS100),
+ ID16(1800, 1276, BUS100),
+ ID16(1600, 1228, BUS100),
+ ID16(1400, 1180, BUS100),
+ ID16(1200, 1132, BUS100),
+ ID16(1000, 1084, BUS100),
+ ID16( 800, 1036, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 765 2.1 GHz, VID #B */
-static const struct fq_info pm90_n765b[] = {
- { 2100, 1324 },
- { 1800, 1260 },
- { 1600, 1212 },
- { 1400, 1180 },
- { 1200, 1132 },
- { 1000, 1084 },
- { 800, 1036 },
- { 600, 988 }
+static const u_int16_t pm90_n765b[] = {
+ ID16(2100, 1324, BUS100),
+ ID16(1800, 1260, BUS100),
+ ID16(1600, 1212, BUS100),
+ ID16(1400, 1180, BUS100),
+ ID16(1200, 1132, BUS100),
+ ID16(1000, 1084, BUS100),
+ ID16( 800, 1036, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 765 2.1 GHz, VID #C */
-static const struct fq_info pm90_n765c[] = {
- { 2100, 1308 },
- { 1800, 1244 },
- { 1600, 1212 },
- { 1400, 1164 },
- { 1200, 1116 },
- { 1000, 1084 },
- { 800, 1036 },
- { 600, 988 }
+static const u_int16_t pm90_n765c[] = {
+ ID16(2100, 1308, BUS100),
+ ID16(1800, 1244, BUS100),
+ ID16(1600, 1212, BUS100),
+ ID16(1400, 1164, BUS100),
+ ID16(1200, 1116, BUS100),
+ ID16(1000, 1084, BUS100),
+ ID16( 800, 1036, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 765 2.1 GHz, VID #E */
-static const struct fq_info pm90_n765e[] = {
- { 2100, 1356 },
- { 1800, 1292 },
- { 1600, 1244 },
- { 1400, 1196 },
- { 1200, 1148 },
- { 1000, 1100 },
- { 800, 1052 },
- { 600, 988 }
+static const u_int16_t pm90_n765e[] = {
+ ID16(2100, 1356, BUS100),
+ ID16(1800, 1292, BUS100),
+ ID16(1600, 1244, BUS100),
+ ID16(1400, 1196, BUS100),
+ ID16(1200, 1148, BUS100),
+ ID16(1000, 1100, BUS100),
+ ID16( 800, 1052, BUS100),
+ ID16( 600, 988, BUS100),
};
/* Intel Pentium M processor 770 2.13 GHz */
-static const struct fq_info pm90_n770[] = {
- { 2133, 1551 },
- { 1800, 1429 },
- { 1600, 1356 },
- { 1400, 1180 },
- { 1200, 1132 },
- { 1000, 1084 },
- { 800, 1036 },
- { 600, 988 }
+static const u_int16_t pm90_n770[] = {
+ ID16(2133, 1551, BUS133),
+ ID16(1800, 1429, BUS133),
+ ID16(1600, 1356, BUS133),
+ ID16(1400, 1180, BUS133),
+ ID16(1200, 1132, BUS133),
+ ID16(1000, 1084, BUS133),
+ ID16( 800, 1036, BUS133),
+ ID16( 600, 988, BUS133),
};
/*
@@ -715,147 +721,138 @@ static const struct fq_info pm90_n770[] = {
*/
/* 1.00GHz Centaur C7-M ULV */
-static const struct fq_info C7M_770_ULV[] = {
- { 1000, 844 },
- { 800, 796 },
- { 600, 796 },
- { 400, 796 },
+static const u_int16_t C7M_770_ULV[] = {
+ ID16(1000, 844, BUS100),
+ ID16( 800, 796, BUS100),
+ ID16( 600, 796, BUS100),
+ ID16( 400, 796, BUS100),
};
/* 1.00GHz Centaur C7-M ULV */
-static const struct fq_info C7M_779_ULV[] = {
- { 1000, 796 },
- { 800, 796 },
- { 600, 796 },
- { 400, 796 },
+static const u_int16_t C7M_779_ULV[] = {
+ ID16(1000, 796, BUS100),
+ ID16( 800, 796, BUS100),
+ ID16( 600, 796, BUS100),
+ ID16( 400, 796, BUS100),
};
/* 1.20GHz Centaur C7-M ULV */
-static const struct fq_info C7M_772_ULV[] = {
- { 1200, 844 },
- { 1000, 844 },
- { 800, 828 },
- { 600, 796 },
- { 400, 796 },
+static const u_int16_t C7M_772_ULV[] = {
+ ID16(1200, 844, BUS100),
+ ID16(1000, 844, BUS100),
+ ID16( 800, 828, BUS100),
+ ID16( 600, 796, BUS100),
+ ID16( 400, 796, BUS100),
};
/* 1.50GHz Centaur C7-M ULV */
-static const struct fq_info C7M_775_ULV[] = {
- { 1500, 956 },
- { 1400, 940 },
- { 1000, 860 },
- { 800, 828 },
- { 600, 796 },
- { 400, 796 },
+static const u_int16_t C7M_775_ULV[] = {
+ ID16(1500, 956, BUS100),
+ ID16(1400, 940, BUS100),
+ ID16(1000, 860, BUS100),
+ ID16( 800, 828, BUS100),
+ ID16( 600, 796, BUS100),
+ ID16( 400, 796, BUS100),
};
/* 1.20GHz Centaur C7-M 400 Mhz FSB */
-static const struct fq_info C7M_771[] = {
- { 1200, 860 },
- { 1000, 860 },
- { 800, 844 },
- { 600, 844 },
- { 400, 844 },
+static const u_int16_t C7M_771[] = {
+ ID16(1200, 860, BUS100),
+ ID16(1000, 860, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 844, BUS100),
+ ID16( 400, 844, BUS100),
};
/* 1.50GHz Centaur C7-M 400 Mhz FSB */
-static const struct fq_info C7M_754[] = {
- { 1500, 1004 },
- { 1400, 988 },
- { 1000, 940 },
- { 800, 844 },
- { 600, 844 },
- { 400, 844 },
+static const u_int16_t C7M_754[] = {
+ ID16(1500, 1004, BUS100),
+ ID16(1400, 988, BUS100),
+ ID16(1000, 940, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 844, BUS100),
+ ID16( 400, 844, BUS100),
};
/* 1.60GHz Centaur C7-M 400 Mhz FSB */
-static const struct fq_info C7M_764[] = {
- { 1600, 1084 },
- { 1400, 1052 },
- { 1000, 1004 },
- { 800, 844 },
- { 600, 844 },
- { 400, 844 },
+static const u_int16_t C7M_764[] = {
+ ID16(1600, 1084, BUS100),
+ ID16(1400, 1052, BUS100),
+ ID16(1000, 1004, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 844, BUS100),
+ ID16( 400, 844, BUS100),
};
/* 1.80GHz Centaur C7-M 400 Mhz FSB */
-static const struct fq_info C7M_784[] = {
- { 1800, 1148 },
- { 1600, 1100 },
- { 1400, 1052 },
- { 1000, 1004 },
- { 800, 844 },
- { 600, 844 },
- { 400, 844 },
+static const u_int16_t C7M_784[] = {
+ ID16(1800, 1148, BUS100),
+ ID16(1600, 1100, BUS100),
+ ID16(1400, 1052, BUS100),
+ ID16(1000, 1004, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 844, BUS100),
+ ID16( 400, 844, BUS100),
};
/* 2.00GHz Centaur C7-M 400 Mhz FSB */
-static const struct fq_info C7M_794[] = {
- { 2000, 1148 },
- { 1800, 1132 },
- { 1600, 1100 },
- { 1400, 1052 },
- { 1000, 1004 },
- { 800, 844 },
- { 600, 844 },
- { 400, 844 },
+static const u_int16_t C7M_794[] = {
+ ID16(2000, 1148, BUS100),
+ ID16(1800, 1132, BUS100),
+ ID16(1600, 1100, BUS100),
+ ID16(1400, 1052, BUS100),
+ ID16(1000, 1004, BUS100),
+ ID16( 800, 844, BUS100),
+ ID16( 600, 844, BUS100),
+ ID16( 400, 844, BUS100),
};
/* 1.60GHz Centaur C7-M 533 Mhz FSB */
-static const struct fq_info C7M_765[] = {
- { 1600, 1084 },
- { 1467, 1052 },
- { 1200, 1004 },
- { 800, 844 },
- { 667, 844 },
- { 533, 844 },
+static const u_int16_t C7M_765[] = {
+ ID16(1600, 1084, BUS133),
+ ID16(1467, 1052, BUS133),
+ ID16(1200, 1004, BUS133),
+ ID16( 800, 844, BUS133),
+ ID16( 667, 844, BUS133),
+ ID16( 533, 844, BUS133),
};
/* 2.00GHz Centaur C7-M 533 Mhz FSB */
-static const struct fq_info C7M_785[] = {
- { 1867, 1148 },
- { 1600, 1100 },
- { 1467, 1052 },
- { 1200, 1004 },
- { 800, 844 },
- { 667, 844 },
- { 533, 844 },
+static const u_int16_t C7M_785[] = {
+ ID16(1867, 1148, BUS133),
+ ID16(1600, 1100, BUS133),
+ ID16(1467, 1052, BUS133),
+ ID16(1200, 1004, BUS133),
+ ID16( 800, 844, BUS133),
+ ID16( 667, 844, BUS133),
+ ID16( 533, 844, BUS133),
};
/* 2.00GHz Centaur C7-M 533 Mhz FSB */
-static const struct fq_info C7M_795[] = {
- { 2000, 1148 },
- { 1867, 1132 },
- { 1600, 1100 },
- { 1467, 1052 },
- { 1200, 1004 },
- { 800, 844 },
- { 667, 844 },
- { 533, 844 },
+static const u_int16_t C7M_795[] = {
+ ID16(2000, 1148, BUS133),
+ ID16(1867, 1132, BUS133),
+ ID16(1600, 1100, BUS133),
+ ID16(1467, 1052, BUS133),
+ ID16(1200, 1004, BUS133),
+ ID16( 800, 844, BUS133),
+ ID16( 667, 844, BUS133),
+ ID16( 533, 844, BUS133),
};
-/* Convert MHz and mV into IDs for passing to the MSR. */
-#define ID16(MHz, mV, bus_clk) \
- ((((MHz * 100 + 50) / bus_clk) << 8) | ((mV ? mV - 700 : 0) >> 4))
-#define ID32(MHz_hi, mV_hi, MHz_lo, mV_lo, bus_clk) \
- ((ID16(MHz_lo, mV_lo, bus_clk) << 16) | (ID16(MHz_hi, mV_hi, bus_clk)))
-
struct fqlist {
int vendor : 5;
unsigned bus_clk : 1;
unsigned n : 5;
- const struct fq_info *table;
+ const u_int16_t *table;
};
#define NELEM(x) (sizeof(x) / sizeof((x)[0]))
#define ENTRY(ven, bus_clk, tab) \
- { CPUVENDOR_##ven, bus_clk, NELEM(tab), tab }
-
-#define BUS100 0
-#define BUS133 1
+ { CPUVENDOR_##ven, bus_clk == BUS133 ? 1 : 0, NELEM(tab), tab }
-#define BUS_CLK(fqp) ((fqp)->bus_clk ? 13333 : 10000)
+#define BUS_CLK(fqp) ((fqp)->bus_clk ? BUS133 : BUS100)
static const struct fqlist est_cpus[] = {
ENTRY(INTEL, BUS100, pm130_900_ulv),
@@ -946,6 +943,9 @@ static const struct fqlist est_cpus[] = {
static const struct fqlist *est_fqlist;
+static u_int16_t fake_table[3];
+static struct fqlist fake_fqlist;
+
extern int setperf_prio;
extern int perflevel;
@@ -953,7 +953,7 @@ void
est_init(const char *cpu_device, int vendor)
{
int i, mhz, mv, low, high;
- u_int32_t id;
+ u_int16_t idhi, idlo, cur;
u_int64_t msr;
const struct fqlist *fql;
@@ -963,18 +963,29 @@ est_init(const char *cpu_device, int vendor)
if ((cpu_ecxfeature & CPUIDECX_EST) == 0)
return;
- msr = rdmsr(MSR_PERF_STATUS);
+ if (bus_clock == 0) {
+ printf("%s: EST: unknown system bus clock\n", cpu_device);
+ return;
+ }
+ msr = rdmsr(MSR_PERF_STATUS);
+ idhi = (msr >> 32) & 0xffff;
+ idlo = (msr >> 48) & 0xffff;
+ cur = msr & 0xffff;
+ if (idhi == 0 || idlo == 0 || cur == 0 ||
+ ((cur >> 8) & 0xff) < ((idlo >> 8) & 0xff) ||
+ ((cur >> 8) & 0xff) > ((idhi >> 8) & 0xff)) {
+ printf("%s: EST: strange msr value 0x%016llx\n",
+ cpu_device, msr);
+ return;
+ }
/*
- * Find an entry which matches (vendor, id32)
+ * Find an entry which matches (vendor, bus_clock, idhi, idlo)
*/
- id = msr >> 32;
- for (i = 0; i < NELEM(est_cpus); i++) {
+ for (i = 0; i < NELEM(est_cpus); i++) {
fql = &est_cpus[i];
- if (vendor == fql->vendor &&
- id == ID32(fql->table[0].mhz, fql->table[0].mv,
- fql->table[fql->n - 1].mhz, fql->table[fql->n - 1].mv,
- BUS_CLK(fql))) {
+ if (vendor == fql->vendor && bus_clock == BUS_CLK(fql) &&
+ idhi == fql->table[0] && idlo == fql->table[fql->n - 1]) {
est_fqlist = fql;
break;
}
@@ -982,35 +993,55 @@ est_init(const char *cpu_device, int vendor)
if (est_fqlist == NULL) {
printf("%s: unknown Enhanced SpeedStep CPU, msr 0x%016llx\n",
cpu_device, msr);
- return;
+
+ /*
+ * Generate a fake table with the power states we know.
+ */
+ fake_table[0] = idhi;
+ if (cur == idhi || cur == idlo) {
+ printf("%s: using only highest and lowest power "
+ "states\n", cpu_device);
+
+ fake_table[1] = idlo;
+ fake_fqlist.n = 2;
+ } else {
+ printf("%s: using only highest, current and lowest "
+ "power states\n", cpu_device);
+
+ fake_table[1] = cur;
+ fake_table[2] = idlo;
+ fake_fqlist.n = 3;
+ }
+ fake_fqlist.vendor = vendor;
+ fake_fqlist.table = fake_table;
+ est_fqlist = &fake_fqlist;
}
- mhz = MSR2MHZ(msr, BUS_CLK(est_fqlist));
- mv = MSR2MV(msr);
+ mhz = MSR2MHZ(cur, bus_clock);
+ mv = MSR2MV(cur);
printf("%s: Enhanced SpeedStep %d MHz (%d mV)", cpu_device, mhz, mv);
/*
* Check that the current operating point is in our list.
*/
for (i = est_fqlist->n - 1; i >= 0; i--) {
- if (ID16(est_fqlist->table[i].mhz, est_fqlist->table[i].mv,
- BUS_CLK(est_fqlist)) == (msr & 0xffff))
+ if (cur == est_fqlist->table[i])
break;
}
if (i < 0) {
printf(" (not in table, msr 0x%016llx)\n", msr);
return;
}
- low = est_fqlist->table[est_fqlist->n - 1].mhz;
- high = est_fqlist->table[0].mhz;
- perflevel = (est_fqlist->table[i].mhz - low) * 100 / (high - low);
+ low = MSR2MHZ(est_fqlist->table[est_fqlist->n - 1], bus_clock);
+ high = MSR2MHZ(est_fqlist->table[0], bus_clock);
+ perflevel = (mhz - low) * 100 / (high - low);
/*
* OK, tell the user the available frequencies.
*/
printf(": speeds: ");
for (i = 0; i < est_fqlist->n; i++)
- printf("%d%s", est_fqlist->table[i].mhz,
+ printf("%d%s", MSR2MHZ(est_fqlist->table[i], bus_clock),
i < est_fqlist->n - 1 ? ", " : " MHz\n");
cpu_setperf = est_setperf;
@@ -1026,18 +1057,18 @@ est_setperf(int level)
if (est_fqlist == NULL)
return (EOPNOTSUPP);
- low = est_fqlist->table[est_fqlist->n - 1].mhz;
- high = est_fqlist->table[0].mhz;
+ low = MSR2MHZ(est_fqlist->table[est_fqlist->n - 1], bus_clock);
+ high = MSR2MHZ(est_fqlist->table[0], bus_clock);
fq = low + (high - low) * level / 100;
for (i = est_fqlist->n - 1; i > 0; i--)
- if (est_fqlist->table[i].mhz >= fq)
+ if (MSR2MHZ(est_fqlist->table[i], bus_clock) >= fq)
break;
- msr = (rdmsr(MSR_PERF_CTL) & ~0xffffULL) |
- ID16(est_fqlist->table[i].mhz, est_fqlist->table[i].mv,
- BUS_CLK(est_fqlist));
+ msr = rdmsr(MSR_PERF_CTL);
+ msr &= ~0xffffULL;
+ msr |= est_fqlist->table[i];
wrmsr(MSR_PERF_CTL, msr);
- pentium_mhz = est_fqlist->table[i].mhz;
+ pentium_mhz = MSR2MHZ(est_fqlist->table[i], bus_clock);
return (0);
}
diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c
index 8df3ec7c026..fd66e414209 100644
--- a/sys/arch/i386/i386/machdep.c
+++ b/sys/arch/i386/i386/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.358 2006/06/12 07:32:53 gwk Exp $ */
+/* $OpenBSD: machdep.c,v 1.359 2006/06/12 13:18:18 dim Exp $ */
/* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */
/*-
@@ -254,6 +254,7 @@ struct vm_map *phys_map = NULL;
int kbd_reset;
int p4_model;
int p3_early;
+int bus_clock;
int setperf_prio = 0; /* for concurrent handlers */
void (*delay_func)(int) = i8254_delay;
@@ -346,6 +347,9 @@ void tm86_cpu_setup(struct cpu_info *);
char * intel686_cpu_name(int);
char * cyrix3_cpu_name(int, int);
char * tm86_cpu_name(int);
+void cyrix3_get_bus_clock(struct cpu_info *);
+void p4_get_bus_clock(struct cpu_info *);
+void p3_get_bus_clock(struct cpu_info *);
void p4_update_cpuspeed(void);
void p3_update_cpuspeed(void);
int pentium_cpuspeed(int *);
@@ -765,8 +769,9 @@ const struct cpu_cpuid_nameclass i386_cpuid_cpus[] = {
"Pentium III",
"Pentium M",
"Pentium III Xeon",
- "Pentium III", 0, 0,
- 0, 0,
+ "Pentium III", 0,
+ "Pentium M",
+ "Core Duo/Solo", 0,
"Pentium Pro, II or III" /* Default */
},
intel686_cpu_setup
@@ -1177,6 +1182,8 @@ cyrix3_cpu_setup(struct cpu_info *ci)
pagezero = i686_pagezero;
+ cyrix3_get_bus_clock(ci);
+
if (cpu_ecxfeature & CPUIDECX_EST) {
if (rdmsr(MSR_MISC_ENABLE) & (1 << 16))
est_init(ci->ci_dev.dv_xname, CPUVENDOR_VIA);
@@ -1492,6 +1499,10 @@ intel686_cpu_setup(struct cpu_info *ci)
int step = ci->ci_signature & 15;
u_quad_t msr119;
+#if !defined(SMALL_KERNEL) && defined(I686_CPU)
+ p3_get_bus_clock(ci);
+#endif
+
intel686_common_cpu_setup(ci);
/*
@@ -1524,6 +1535,10 @@ intel686_cpu_setup(struct cpu_info *ci)
void
intel686_p4_cpu_setup(struct cpu_info *ci)
{
+#if !defined(SMALL_KERNEL) && defined(I686_CPU)
+ p4_get_bus_clock(ci);
+#endif
+
intel686_common_cpu_setup(ci);
#if !defined(SMALL_KERNEL) && defined(I686_CPU)
@@ -1963,43 +1978,188 @@ tm86_cpu_name(int model)
#ifndef SMALL_KERNEL
#ifdef I686_CPU
void
+cyrix3_get_bus_clock(struct cpu_info *ci)
+{
+ u_int64_t msr;
+ int bus;
+
+ msr = rdmsr(MSR_EBL_CR_POWERON);
+ bus = (msr >> 18) & 0x3;
+ switch (bus) {
+ case 0:
+ bus_clock = 10000;
+ break;
+ case 1:
+ bus_clock = 13333;
+ break;
+ case 2:
+ bus_clock = 20000;
+ break;
+ case 3:
+ bus_clock = 16666;
+ break;
+ }
+}
+
+void
+p4_get_bus_clock(struct cpu_info *ci)
+{
+ u_int64_t msr;
+ int model, bus;
+
+ model = (ci->ci_signature >> 4) & 15;
+ msr = rdmsr(MSR_EBC_FREQUENCY_ID);
+ if (model < 2) {
+ bus = (msr >> 21) & 0x7;
+ switch (bus) {
+ case 0:
+ bus_clock = 10000;
+ break;
+ case 1:
+ bus_clock = 13333;
+ break;
+ default:
+ printf("%s: unknown Pentium 4 (model %d) "
+ "EBC_FREQUENCY_ID value %d\n",
+ ci->ci_dev.dv_xname, model, bus);
+ break;
+ }
+ } else {
+ bus = (msr >> 16) & 0x7;
+ switch (bus) {
+ case 0:
+ bus_clock = (model == 2) ? 10000 : 26666;
+ break;
+ case 1:
+ bus_clock = 13333;
+ break;
+ case 2:
+ bus_clock = 20000;
+ break;
+ case 3:
+ bus_clock = 16666;
+ break;
+ default:
+ printf("%s: unknown Pentium 4 (model %d) "
+ "EBC_FREQUENCY_ID value %d\n",
+ ci->ci_dev.dv_xname, model, bus);
+ break;
+ }
+ }
+}
+
+void
+p3_get_bus_clock(struct cpu_info *ci)
+{
+ u_int64_t msr;
+ int model, bus;
+
+ model = (ci->ci_signature >> 4) & 15;
+ switch (model) {
+ case 0x9: /* Pentium M (130 nm, Banias) */
+ bus_clock = 10000;
+ break;
+ case 0xd: /* Pentium M (90 nm, Dothan) */
+ msr = rdmsr(MSR_FSB_FREQ);
+ bus = (msr >> 0) & 0x7;
+ switch (bus) {
+ case 0:
+ bus_clock = 10000;
+ break;
+ case 1:
+ bus_clock = 13333;
+ break;
+ default:
+ printf("%s: unknown Pentium M FSB_FREQ value %d\n",
+ ci->ci_dev.dv_xname, bus);
+ break;
+ }
+ break;
+ case 0xe: /* Core Duo/Solo */
+ msr = rdmsr(MSR_FSB_FREQ);
+ bus = (msr >> 0) & 0x7;
+ switch (bus) {
+ case 5:
+ bus_clock = 10000;
+ break;
+ case 1:
+ bus_clock = 13333;
+ break;
+ case 3:
+ bus_clock = 16666;
+ break;
+ default:
+ printf("%s: unknown Core Duo/Solo FSB_FREQ value %d\n",
+ ci->ci_dev.dv_xname, bus);
+ break;
+ }
+ break;
+ case 0x3: /* Pentium II, model 3 */
+ case 0x5: /* Pentium II, II Xeon, Celeron, model 5 */
+ case 0x6: /* Celeron, model 6 */
+ case 0x7: /* Pentium III, III Xeon, model 7 */
+ case 0x8: /* Pentium III, III Xeon, Celeron, model 8 */
+ case 0xa: /* Pentium III Xeon, model A */
+ case 0xb: /* Pentium III, model B */
+ msr = rdmsr(MSR_EBL_CR_POWERON);
+ bus = (msr >> 18) & 0x3;
+ switch (bus) {
+ case 0:
+ bus_clock = 6666;
+ break;
+ case 1:
+ bus_clock = 13333;
+ break;
+ case 2:
+ bus_clock = 10000;
+ break;
+ default:
+ printf("%s: unknown i686 EBL_CR_POWERON value %d\n",
+ ci->ci_dev.dv_xname, bus);
+ break;
+ }
+ default:
+ printf("%s: unknown i686 model %d, can't get bus clock\n",
+ ci->ci_dev.dv_xname, model);
+ break;
+
+ }
+}
+
+void
p4_update_cpuspeed(void)
{
u_int64_t msr;
- int bus, mult, freq;
+ int bus, mult;
msr = rdmsr(MSR_EBC_FREQUENCY_ID);
if (p4_model < 2) {
bus = (msr >> 21) & 0x7;
switch (bus) {
case 0:
- bus = 100;
+ bus = 10000;
break;
case 1:
- bus = 133;
+ bus = 13333;
break;
}
} else {
bus = (msr >> 16) & 0x7;
switch (bus) {
case 0:
- bus = 100;
+ bus = 10000;
break;
case 1:
- bus = 133;
+ bus = 13333;
break;
case 2:
- bus = 200;
+ bus = 20000;
break;
}
}
mult = ((msr >> 24) & 0xff);
- freq = bus * mult;
- /* 133MHz actually means 133.(3)MHz */
- if (bus == 133)
- freq += mult / 3;
- pentium_mhz = freq;
+ pentium_mhz = bus * mult / 100;
}
void
@@ -2014,13 +2174,13 @@ p3_update_cpuspeed(void)
bus = (msr >> 18) & 0x3;
switch (bus) {
case 0:
- bus = 66;
+ bus = 6666;
break;
case 1:
- bus = 133;
+ bus = 13333;
break;
case 2:
- bus = 100;
+ bus = 10000;
break;
}
@@ -2029,7 +2189,7 @@ p3_update_cpuspeed(void)
if (!p3_early)
mult += ((msr >> 27) & 0x1) * 40;
- pentium_mhz = (bus * mult) / 10;
+ pentium_mhz = (bus * mult) / 1000;
}
#endif /* I686_CPU */
diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h
index 50251739c00..acf150c0ca4 100644
--- a/sys/arch/i386/include/cpu.h
+++ b/sys/arch/i386/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.78 2006/05/29 09:54:20 mickey Exp $ */
+/* $OpenBSD: cpu.h,v 1.79 2006/06/12 13:18:18 dim Exp $ */
/* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */
/*-
@@ -312,6 +312,7 @@ extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[];
#if defined(I586_CPU) || defined(I686_CPU)
extern int pentium_mhz;
+extern int bus_clock;
#endif
#ifdef I586_CPU
diff --git a/sys/arch/i386/include/specialreg.h b/sys/arch/i386/include/specialreg.h
index 952629c03b3..20e6ab36bda 100644
--- a/sys/arch/i386/include/specialreg.h
+++ b/sys/arch/i386/include/specialreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: specialreg.h,v 1.27 2006/03/07 05:18:08 jsg Exp $ */
+/* $OpenBSD: specialreg.h,v 1.28 2006/06/12 13:18:18 dim Exp $ */
/* $NetBSD: specialreg.h,v 1.7 1994/10/27 04:16:26 cgd Exp $ */
/*-
@@ -160,6 +160,7 @@
#define MSR_BIOS_SIGN 0x08b
#define P6MSR_CTR0 0x0c1
#define P6MSR_CTR1 0x0c2
+#define MSR_FSB_FREQ 0x0cd /* Core Duo/Solo only */
#define MSR_MTRRcap 0x0fe
#define MSR_BBL_CR_ADDR 0x116 /* PII+ only */
#define MSR_BBL_CR_DECC 0x118 /* PII+ only */
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-21 01:44:27 +0000