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-rw-r--r--sys/arch/loongson/dev/lemote_irq.h72
-rw-r--r--sys/arch/loongson/dev/mainbus.c79
-rw-r--r--sys/arch/loongson/dev/smfbreg.h70
3 files changed, 221 insertions, 0 deletions
diff --git a/sys/arch/loongson/dev/lemote_irq.h b/sys/arch/loongson/dev/lemote_irq.h
new file mode 100644
index 00000000000..b38df51649a
--- /dev/null
+++ b/sys/arch/loongson/dev/lemote_irq.h
@@ -0,0 +1,72 @@
+/* $OpenBSD: lemote_irq.h,v 1.1 2009/12/25 21:11:07 miod Exp $ */
+
+/*
+ * Copyright (c) 2009 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Lemote Yeelong specific hardware defines
+ */
+
+/*
+ * Bonito interrupt assignments
+ */
+
+#define YEELONG_INTR_GPIO0 0
+#define YEELONG_INTR_GPIO1 1
+#define YEELONG_INTR_GPIO2 2
+#define YEELONG_INTR_GPIO3 3
+
+/* pci interrupts */
+#define YEELONG_INTR_PCIA 4
+#define YEELONG_INTR_PCIB 5
+#define YEELONG_INTR_PCIC 6
+#define YEELONG_INTR_PCID 7
+
+#define YEELONG_INTR_PCI_PARERR 8
+#define YEELONG_INTR_PCI_SYSERR 9
+#define YEELONG_INTR_DRAM_PARERR 10
+
+/* isa interrupts on i8259 */
+#define YEELONG_INTR_INT0 11
+#define YEELONG_INTR_INT1 12
+#define YEELONG_INTR_INT2 13
+#define YEELONG_INTR_INT3 14
+
+#define YEELONG_INTRMASK_GPIO0 0x00000001 /* can't interrupt */
+#define YEELONG_INTRMASK_GPIO1 0x00000002
+#define YEELONG_INTRMASK_GPIO2 0x00000004
+#define YEELONG_INTRMASK_GPIO3 0x00000008
+
+#define YEELONG_INTRMASK_GPIO 0x0000000f
+
+/* pci interrupts */
+#define YEELONG_INTRMASK_PCIA 0x00000010
+#define YEELONG_INTRMASK_PCIB 0x00000020
+#define YEELONG_INTRMASK_PCIC 0x00000040
+#define YEELONG_INTRMASK_PCID 0x00000080
+
+#define YEELONG_INTRMASK_PCI_PARERR 0x00000100
+#define YEELONG_INTRMASK_PCI_SYSERR 0x00000200
+#define YEELONG_INTRMASK_DRAM_PARERR 0x00000400
+
+/* isa interrupts on i8259 */
+#define YEELONG_INTRMASK_INT0 0x00000800
+#define YEELONG_INTRMASK_INT1 0x00001000
+#define YEELONG_INTRMASK_INT2 0x00002000
+#define YEELONG_INTRMASK_INT3 0x00004000
+
+#define YEELONG_INTRMASK_LVL4 0x000007ff
+#define YEELONG_INTRMASK_LVL0 0x00007800 /* not maskable in bonito */
diff --git a/sys/arch/loongson/dev/mainbus.c b/sys/arch/loongson/dev/mainbus.c
new file mode 100644
index 00000000000..be353cda893
--- /dev/null
+++ b/sys/arch/loongson/dev/mainbus.c
@@ -0,0 +1,79 @@
+/* $OpenBSD: mainbus.c,v 1.1 2009/12/25 21:11:09 miod Exp $ */
+
+/*
+ * Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/autoconf.h>
+
+int mainbus_match(struct device *, void *, void *);
+void mainbus_attach(struct device *, struct device *, void *);
+int mainbus_print(void *, const char *);
+
+const struct cfattach mainbus_ca = {
+ sizeof(struct device), mainbus_match, mainbus_attach
+};
+
+struct cfdriver mainbus_cd = {
+ NULL, "mainbus", DV_DULL
+};
+
+int
+mainbus_match(struct device *parent, void *cfdata, void *aux)
+{
+ static int mainbus_attached = 0;
+
+ if (mainbus_attached != 0)
+ return 0;
+
+ return mainbus_attached = 1;
+}
+
+void
+mainbus_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct mainbus_attach_args maa;
+
+ printf("\n");
+
+ bzero(&maa, sizeof maa);
+ maa.maa_name = "cpu";
+ config_found(self, &maa, mainbus_print);
+ maa.maa_name = "clock";
+ config_found(self, &maa, mainbus_print);
+
+ maa.maa_name = "bonito";
+ config_found(self, &maa, mainbus_print);
+}
+
+int
+mainbus_print(void *aux, const char *pnp)
+{
+ return pnp != NULL ? QUIET : UNCONF;
+}
diff --git a/sys/arch/loongson/dev/smfbreg.h b/sys/arch/loongson/dev/smfbreg.h
new file mode 100644
index 00000000000..5551e746e1e
--- /dev/null
+++ b/sys/arch/loongson/dev/smfbreg.h
@@ -0,0 +1,70 @@
+/* $OpenBSD: smfbreg.h,v 1.1 2009/12/25 21:12:02 miod Exp $ */
+
+/*
+ * Copyright (c) 2009 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Silicon Motion SM712 registers
+ */
+
+/*
+ * DPR (2D drawing engine)
+ */
+
+#define DPR_COORDS(x, y) (((x) << 16) | (y))
+
+#define DPR_BASE 0x00408000
+#define DPR_SRC_COORDS 0x00
+#define DPR_DST_COORDS 0x04
+#define DPR_SPAN_COORDS 0x08
+#define DPR_DE_CTRL 0x0c
+#define DPR_PITCH 0x10
+#define DPR_FG_COLOR 0x14
+#define DPR_BG_COLOR 0x18
+#define DPR_STRETCH 0x1c
+#define DPR_COLOR_COMPARE 0x20
+#define DPR_COLOR_COMPARE_MASK 0x24
+#define DPR_BYTE_BIT_MASK 0x28
+#define DPR_CROP_TOPLEFT_COORDS 0x2c
+#define DPR_CROP_BOTRIGHT_COORDS 0x30
+#define DPR_MONO_PATTERN_LO32 0x34
+#define DPR_MONO_PATTERN_HI32 0x38
+#define DPR_SRC_WINDOW 0x3c
+#define DPR_SRC_BASE 0x40
+#define DPR_DST_BASE 0x44
+
+#define DE_CTRL_START 0x80000000
+#define DE_CTRL_RTOL 0x08000000
+#define DE_CTRL_COMMAND_MASK 0x001f0000
+#define DE_CTRL_COMMAND_SHIFT 16
+#define DE_CTRL_COMMAND_BITBLT 0x00
+#define DE_CTRL_COMMAND_SOLIDFILL 0x01
+#define DE_CTRL_ROP_ENABLE 0x00008000
+#define DE_CTRL_ROP_MASK 0x000000ff
+#define DE_CTRL_ROP_SHIFT 0
+#define DE_CTRL_ROP_SRC 0x0c
+
+/*
+ * VPR (Video Parameter Registers)
+ */
+
+#define VPR_BASE 0x0040c000
+
+/*
+ * MMIO
+ */
+
+#define MMIO_BASE 0x00700000