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-rw-r--r--sys/arch/mips64/include/proc.h3
-rw-r--r--sys/arch/mips64/mips64/context.S23
-rw-r--r--sys/arch/mips64/mips64/vm_machdep.c19
3 files changed, 32 insertions, 13 deletions
diff --git a/sys/arch/mips64/include/proc.h b/sys/arch/mips64/include/proc.h
index 587ee4be25f..2d9682d8800 100644
--- a/sys/arch/mips64/include/proc.h
+++ b/sys/arch/mips64/include/proc.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: proc.h,v 1.4 2009/11/19 20:13:51 miod Exp $ */
+/* $OpenBSD: proc.h,v 1.5 2009/12/07 19:01:03 miod Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -46,6 +46,7 @@ struct mdproc {
int md_flags; /* machine-dependent flags */
long md_ss_addr; /* single step address for ptrace */
int md_ss_instr; /* single step instruction for ptrace */
+ vaddr_t md_uarea; /* allocated uarea virtual addr */
/* The following is RM7000 dependent, but kept in for compatibility */
int md_pc_ctrl; /* performance counter control */
int md_pc_count; /* performance counter */
diff --git a/sys/arch/mips64/mips64/context.S b/sys/arch/mips64/mips64/context.S
index 0c8ed024f7c..322a99d942b 100644
--- a/sys/arch/mips64/mips64/context.S
+++ b/sys/arch/mips64/mips64/context.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: context.S,v 1.31 2009/11/19 20:16:27 miod Exp $ */
+/* $OpenBSD: context.S,v 1.32 2009/12/07 19:01:06 miod Exp $ */
/*
* Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -159,13 +159,6 @@ NON_LEAF(cpu_switchto, FRAMESZ(CF_SZ), ra)
li t1, SONPROC
sb t1, P_STAT(s0) # set to onproc.
- /*
- * We need to wire the process kernel stack mapping so there
- * will be no tlb misses in exception handlers. This is done
- * by invalidating any tlb entries mapping the U-area and
- * put valid mappings in tlb entries 0 and 1.
- */
-
/* get process ASID */
PTR_L t0, P_VMSPACE(s0) # p->p_vmspace
PTR_L t1, VMSPACE_PMAP(t0) # ->vm_map.pmap
@@ -173,6 +166,15 @@ NON_LEAF(cpu_switchto, FRAMESZ(CF_SZ), ra)
or v0, t3
dmtc0 v0, COP_0_TLB_HI # init high entry (tlbid)
+
+#if UPAGES > 1
+ /*
+ * We need to wire the process kernel stack mapping so there
+ * will be no tlb misses in exception handlers. This is done
+ * by invalidating any tlb entries mapping the U-area and
+ * put valid mappings in tlb entries 0 and 1.
+ */
+
LA t1, (VM_MIN_KERNEL_ADDRESS)
PTR_SUBU t2, t3, t1
bltz t2, ctx3 # not mapped.
@@ -215,7 +217,7 @@ ctx1:
nop
tlbwi
-#if (UPAGES != 2)
+#if UPAGES > 2
dmtc0 v0, COP_0_TLB_HI # init high entry (tlbid)
lw ta0, 8(t1)
lw ta1, 12(t1)
@@ -252,11 +254,12 @@ ctx2:
nop
nop
tlbwi
-#endif
+#endif /* UPAGES > 2 */
nop
nop
nop
nop
+#endif /* UPAGES > 1 */
ctx3:
diff --git a/sys/arch/mips64/mips64/vm_machdep.c b/sys/arch/mips64/mips64/vm_machdep.c
index a73db7dfd0a..94352a1bad0 100644
--- a/sys/arch/mips64/mips64/vm_machdep.c
+++ b/sys/arch/mips64/mips64/vm_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: vm_machdep.c,v 1.20 2009/10/22 22:08:54 miod Exp $ */
+/* $OpenBSD: vm_machdep.c,v 1.21 2009/12/07 19:01:06 miod Exp $ */
/*
* Copyright (c) 1988 University of Utah.
* Copyright (c) 1992, 1993
@@ -68,9 +68,20 @@ cpu_fork(p1, p2, stack, stacksize, func, arg)
void (*func)(void *);
void *arg;
{
- struct pcb *pcb = &p2->p_addr->u_pcb;
+ struct pcb *pcb;
+#if UPAGES == 1
+ paddr_t pa;
+#endif
extern struct proc *machFPCurProcPtr;
+#if UPAGES == 1
+ /* replace p_addr with a direct translation address */
+ p2->p_md.md_uarea = (vaddr_t)p2->p_addr;
+ pmap_extract(pmap_kernel(), p2->p_md.md_uarea, &pa);
+ p2->p_addr = (void *)PHYS_TO_XKPHYS(pa, CCA_CACHED);
+#endif
+ pcb = &p2->p_addr->u_pcb;
+
/*
* If we own the FPU, save its state before copying the PCB.
*/
@@ -135,6 +146,10 @@ cpu_exit(p)
machFPCurProcPtr = (struct proc *)0;
pmap_deactivate(p);
+#if UPAGES == 1
+ /* restore p_addr for proper deallocation */
+ p->p_addr = (void *)p->p_md.md_uarea;
+#endif
sched_exit(p);
}