diff options
Diffstat (limited to 'sys/arch/mvme88k')
| -rw-r--r-- | sys/arch/mvme88k/mvme88k/m88110.c | 63 | ||||
| -rw-r--r-- | sys/arch/mvme88k/mvme88k/m8820x.c | 60 |
2 files changed, 9 insertions, 114 deletions
diff --git a/sys/arch/mvme88k/mvme88k/m88110.c b/sys/arch/mvme88k/mvme88k/m88110.c index 543baca087c..a4e7d09fd79 100644 --- a/sys/arch/mvme88k/mvme88k/m88110.c +++ b/sys/arch/mvme88k/mvme88k/m88110.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m88110.c,v 1.17 2004/08/02 08:35:00 miod Exp $ */ +/* $OpenBSD: m88110.c,v 1.18 2004/08/04 15:54:38 miod Exp $ */ /* * Copyright (c) 1998 Steve Murphree, Jr. * All rights reserved. @@ -96,10 +96,7 @@ void m88110_cmmu_parity_enable(void); unsigned m88110_cmmu_cpu_number(void); void m88110_cmmu_set_sapr(unsigned, unsigned); void m88110_cmmu_set_uapr(unsigned); -void m88110_cmmu_set_pair_batc_entry(unsigned, unsigned, unsigned); void m88110_cmmu_flush_tlb(unsigned, unsigned, vaddr_t, vsize_t); -void m88110_cmmu_pmap_activate(unsigned, unsigned, - u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]); void m88110_cmmu_flush_cache(int, paddr_t, psize_t); void m88110_cmmu_flush_inst_cache(int, paddr_t, psize_t); void m88110_cmmu_flush_data_cache(int, paddr_t, psize_t); @@ -119,9 +116,7 @@ struct cmmu_p cmmu88110 = { m88110_cmmu_cpu_number, m88110_cmmu_set_sapr, m88110_cmmu_set_uapr, - m88110_cmmu_set_pair_batc_entry, m88110_cmmu_flush_tlb, - m88110_cmmu_pmap_activate, m88110_cmmu_flush_cache, m88110_cmmu_flush_inst_cache, m88110_cmmu_flush_data_cache, @@ -235,7 +230,10 @@ m88110_cmmu_init(void) /* clear BATCs */ for (i = 0; i < 8; i++) { - m88110_cmmu_set_pair_batc_entry(0, i, 0); + set_dir(i); + set_dbp(0); + set_iir(i); + set_ibp(0); } /* clear PATCs */ @@ -344,30 +342,12 @@ m88110_cmmu_set_uapr(unsigned ap) CMMU_LOCK; set_iuap(ap); set_duap(ap); + set_icmd(CMMU_ICMD_INV_UATC); set_dcmd(CMMU_DCMD_INV_UATC); - mc88110_inval_inst(); - CMMU_UNLOCK; -} - -/* - * Set batc entry number entry_no to value in - * the data and instruction cache for the named CPU. - * - * Except for the cmmu_init, this function and m88110_cmmu_pmap_activate - * are the only functions which may set the batc values. - */ -void -m88110_cmmu_set_pair_batc_entry(unsigned cpu, unsigned entry_no, unsigned value) -{ - CMMU_LOCK; - - set_dir(entry_no); - set_dbp(value); - - set_iir(entry_no); - set_ibp(value); + /* We need to at least invalidate the TIC, as it is va-addressed */ + mc88110_inval_inst(); CMMU_UNLOCK; } @@ -377,7 +357,6 @@ m88110_cmmu_set_pair_batc_entry(unsigned cpu, unsigned entry_no, unsigned value) /* * flush any tlb - * Some functionality mimiced in m88110_cmmu_pmap_activate. */ void m88110_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr, @@ -399,32 +378,6 @@ m88110_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr, } /* - * New fast stuff for pmap_activate. - * Does what a few calls used to do. - * Only called from pmap.c's pmap_activate(). - */ -void -m88110_cmmu_pmap_activate(unsigned cpu, unsigned uapr, - u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]) -{ - m88110_cmmu_set_uapr(uapr); - - /* - for (entry_no = 0; entry_no < 8; entry_no++) { - m88110_cmmu_set_batc_entry(cpu, entry_no, 0, i_batc[entry_no]); - m88110_cmmu_set_batc_entry(cpu, entry_no, 1, d_batc[entry_no]); - } - */ - /* - * Flush the user TLB. - * IF THE KERNEL WILL EVER CARE ABOUT THE BATC ENTRIES, - * THE SUPERVISOR TLBs SHOULD BE FLUSHED AS WELL. - */ - set_icmd(CMMU_ICMD_INV_UATC); - set_dcmd(CMMU_DCMD_INV_UATC); -} - -/* * Functions that invalidate caches. * * Cache invalidates require physical addresses. Care must be exercised when diff --git a/sys/arch/mvme88k/mvme88k/m8820x.c b/sys/arch/mvme88k/mvme88k/m8820x.c index 20b65def78f..8011a7e5abc 100644 --- a/sys/arch/mvme88k/mvme88k/m8820x.c +++ b/sys/arch/mvme88k/mvme88k/m8820x.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m8820x.c,v 1.37 2004/08/04 13:16:14 miod Exp $ */ +/* $OpenBSD: m8820x.c,v 1.38 2004/08/04 15:54:38 miod Exp $ */ /* * Copyright (c) 2004, Miodrag Vallat. * @@ -120,10 +120,7 @@ void m8820x_cmmu_parity_enable(void); unsigned m8820x_cmmu_cpu_number(void); void m8820x_cmmu_set_sapr(unsigned, unsigned); void m8820x_cmmu_set_uapr(unsigned); -void m8820x_cmmu_set_pair_batc_entry(unsigned, unsigned, unsigned); void m8820x_cmmu_flush_tlb(unsigned, unsigned, vaddr_t, vsize_t); -void m8820x_cmmu_pmap_activate(unsigned, unsigned, - u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]); void m8820x_cmmu_flush_cache(int, paddr_t, psize_t); void m8820x_cmmu_flush_inst_cache(int, paddr_t, psize_t); void m8820x_cmmu_flush_data_cache(int, paddr_t, psize_t); @@ -143,9 +140,7 @@ struct cmmu_p cmmu8820x = { m8820x_cmmu_cpu_number, m8820x_cmmu_set_sapr, m8820x_cmmu_set_uapr, - m8820x_cmmu_set_pair_batc_entry, m8820x_cmmu_flush_tlb, - m8820x_cmmu_pmap_activate, m8820x_cmmu_flush_cache, m8820x_cmmu_flush_inst_cache, m8820x_cmmu_flush_data_cache, @@ -833,37 +828,17 @@ m8820x_cmmu_set_uapr(unsigned ap) int cpu = cpu_number(); CMMU_LOCK; - /* this functionality also mimiced in m8820x_cmmu_pmap_activate() */ m8820x_cmmu_set(CMMU_UAPR, ap, 0, cpu, 0, 0); CMMU_UNLOCK; splx(s); } /* - * Set batc entry number entry_no to value in - * the data and instruction cache for the named CPU. - * - * Except for the cmmu_init, this function and m8820x_cmmu_pmap_activate - * are the only functions which may set the batc values. - */ -void -m8820x_cmmu_set_pair_batc_entry(unsigned cpu, unsigned entry_no, unsigned value) -{ - CMMU_LOCK; - - m8820x_cmmu_set(CMMU_BWP(entry_no), value, MODE_VAL, cpu, DATA_CMMU, 0); - m8820x_cmmu_set(CMMU_BWP(entry_no), value, MODE_VAL, cpu, INST_CMMU, 0); - - CMMU_UNLOCK; -} - -/* * Functions that invalidate TLB entries. */ /* * flush any tlb - * Some functionality mimiced in m8820x_cmmu_pmap_activate. */ void m8820x_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr, @@ -908,39 +883,6 @@ m8820x_cmmu_flush_tlb(unsigned cpu, unsigned kernel, vaddr_t vaddr, } /* - * New fast stuff for pmap_activate. - * Does what a few calls used to do. - * Only called from pmap_activate(). - */ -void -m8820x_cmmu_pmap_activate(unsigned cpu, unsigned uapr, u_int32_t i_batc[], - u_int32_t d_batc[]) -{ - int entry_no; - - CMMU_LOCK; - - /* the following is from m8820x_cmmu_set_uapr */ - m8820x_cmmu_set(CMMU_UAPR, uapr, 0, cpu, 0, 0); - - for (entry_no = 0; entry_no < BATC_MAX; entry_no++) { - m8820x_cmmu_set(CMMU_BWP(entry_no), i_batc[entry_no], - MODE_VAL, cpu, INST_CMMU, 0); - m8820x_cmmu_set(CMMU_BWP(entry_no), d_batc[entry_no], - MODE_VAL, cpu, DATA_CMMU, 0); - } - - /* - * Flush the user TLB. - * IF THE KERNEL WILL EVER CARE ABOUT THE BATC ENTRIES, - * THE SUPERVISOR TLBs SHOULD BE FLUSHED AS WELL. - */ - m8820x_cmmu_set(CMMU_SCR, CMMU_FLUSH_USER_ALL, 0, cpu, 0, 0); - - CMMU_UNLOCK; -} - -/* * Functions that invalidate caches. * * Cache invalidates require physical addresses. Care must be exercised when |