diff options
Diffstat (limited to 'sys/arch/sgi/gio')
| -rw-r--r-- | sys/arch/sgi/gio/Makefile | 8 | ||||
| -rw-r--r-- | sys/arch/sgi/gio/devlist2h.awk | 152 | ||||
| -rw-r--r-- | sys/arch/sgi/gio/files.gio | 31 | ||||
| -rw-r--r-- | sys/arch/sgi/gio/gio.c | 518 | ||||
| -rw-r--r-- | sys/arch/sgi/gio/giodevs | 21 | ||||
| -rw-r--r-- | sys/arch/sgi/gio/gioreg.h | 68 | ||||
| -rw-r--r-- | sys/arch/sgi/gio/giovar.h | 75 |
7 files changed, 873 insertions, 0 deletions
diff --git a/sys/arch/sgi/gio/Makefile b/sys/arch/sgi/gio/Makefile new file mode 100644 index 00000000000..130e520dcfb --- /dev/null +++ b/sys/arch/sgi/gio/Makefile @@ -0,0 +1,8 @@ +# $OpenBSD: Makefile,v 1.1 2012/03/28 20:44:23 miod Exp $ +# $NetBSD: Makefile.giodevs,v 1.5 2008/10/19 22:05:21 apb Exp $ + +AWK= awk + +giodevs.h giodevs_data.h: giodevs devlist2h.awk + /bin/rm -f giodevs.h giodevs_data.h + ${AWK} -f devlist2h.awk giodevs diff --git a/sys/arch/sgi/gio/devlist2h.awk b/sys/arch/sgi/gio/devlist2h.awk new file mode 100644 index 00000000000..361a2eb2a25 --- /dev/null +++ b/sys/arch/sgi/gio/devlist2h.awk @@ -0,0 +1,152 @@ +#! /usr/bin/awk -f +# $OpenBSD: devlist2h.awk,v 1.1 2012/03/28 20:44:23 miod Exp $ +# $NetBSD: devlist2h.awk,v 1.5 2008/05/02 18:11:05 martin Exp $ +# +# Copyright (c) 1998 The NetBSD Foundation, Inc. +# All rights reserved. +# +# This code is derived from software contributed to The NetBSD Foundation +# by Christos Zoulas. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS +# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS +# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Copyright (c) 1995, 1996 Christopher G. Demetriou +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. All advertising materials mentioning features or use of this software +# must display the following acknowledgement: +# This product includes software developed by Christopher G. Demetriou. +# This product includes software developed by Christos Zoulas +# 4. The name of the author(s) may not be used to endorse or promote products +# derived from this software without specific prior written permission +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +function collectline(_f, _line) { + _oparen = 0 + _line = "" + while (_f <= NF) { + if ($_f == "#") { + _line = _line "(" + _oparen = 1 + _f++ + continue + } + if (_oparen) { + _line = _line $_f + if (_f < NF) + _line = _line " " + _f++ + continue + } + _line = _line $_f + if (_f < NF) + _line = _line " " + _f++ + } + if (_oparen) + _line = _line ")" + return _line +} +BEGIN { + nproducts = nvendors = blanklines = 0 + dfile="giodevs_data.h" + hfile="giodevs.h" + line="" +} +NR == 1 { + VERSION = $0 + gsub("\\$", "", VERSION) + + printf("/*\n") > hfile + printf(" * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.\n") \ + > hfile + printf(" *\n") > hfile + printf(" * generated from:\n") > hfile + printf(" *\t%s\n", VERSION) > hfile + printf(" */\n\n") > hfile + + printf("/*\n") > dfile + printf(" * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.\n") \ + > dfile + printf(" *\n") > dfile + printf(" * generated from:\n") > dfile + printf(" *\t%s\n", VERSION) > dfile + printf(" */\n\n") > dfile + + next +} +NF > 0 && $1 == "product" { + nproducts++ + + products[nproducts, 1] = $2; + products[nproducts, 2] = $3 + products[nproducts, 3] = collectline(4, line) + + next +} +{ + if ($0 == "") + blanklines++ + if (blanklines < 2) + print $0 > dfile +} +END { + # print out the match tables + + printf("\n") > dfile + + printf("struct gio_knowndev {\n") > dfile + printf("\tint productid;\n") > dfile + printf("\tconst char *product;\n") > dfile + printf("};\n") > dfile + printf("\nstruct gio_knowndev gio_knowndevs[] = {\n") > dfile + + printf("\n") > hfile + for (i = 1; i <= nproducts; i++) { + printf("#define %s\t%s\t/* %s */\n", products[i, 1], products[i,2], products[i, 3]) > hfile + + printf("\t{ %s, \"%s\" },\n", + products[i, 2], products[i, 3]) > dfile + } + printf("\t{ 0, NULL }\n") > dfile + printf("};\n") > dfile + close(dfile) + close(hfile) +} diff --git a/sys/arch/sgi/gio/files.gio b/sys/arch/sgi/gio/files.gio new file mode 100644 index 00000000000..fe393862625 --- /dev/null +++ b/sys/arch/sgi/gio/files.gio @@ -0,0 +1,31 @@ +# $OpenBSD: files.gio,v 1.1 2012/03/28 20:44:23 miod Exp $ +# $NetBSD: files.gio,v 1.11 2009/02/12 06:33:57 rumble Exp $ + +device gio {[slot = -1], [addr = -1]} +attach gio at giobus + +file arch/sgi/gio/gio.c gio needs-flag + +device hpc {[offset = -1]}: smc93cx6 +attach hpc at gio +file arch/sgi/hpc/hpc.c hpc + +# XL graphics +device newport: wsemuldisplaydev, rasops8 +attach newport at gio +file arch/sgi/gio/newport.c newport needs-flag + +# GR2 graphics +device grtwo: wsemuldisplaydev +attach grtwo at gio +file arch/sgi/gio/grtwo.c grtwo needs-flag + +# LG1/LG2 graphics +device light: wsemuldisplaydev +attach light at gio +file arch/sgi/gio/light.c light needs-flag + +# PCI cards glued to the GIO bus +device giopci: pcibus +attach giopci at gio +file arch/sgi/gio/pci_gio.c giopci diff --git a/sys/arch/sgi/gio/gio.c b/sys/arch/sgi/gio/gio.c new file mode 100644 index 00000000000..b201adab5b9 --- /dev/null +++ b/sys/arch/sgi/gio/gio.c @@ -0,0 +1,518 @@ +/* $OpenBSD: gio.c,v 1.1 2012/03/28 20:44:23 miod Exp $ */ +/* $NetBSD: gio.c,v 1.32 2011/07/01 18:53:46 dyoung Exp $ */ + +/* + * Copyright (c) 2000 Soren S. Jorvang + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed for the + * NetBSD Project. See http://www.NetBSD.org/ for + * information about NetBSD. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/device.h> + +#include <mips64/archtype.h> + +#include <machine/autoconf.h> +#include <machine/bus.h> + +#include <sgi/gio/gioreg.h> +#include <sgi/gio/giovar.h> +#include <sgi/gio/giodevs_data.h> + +#include <sgi/localbus/imcvar.h> +#include <sgi/localbus/intvar.h> +#include <sgi/sgi/ip22.h> + +int gio_match(struct device *, void *, void *); +void gio_attach(struct device *, struct device *, void *); +int gio_print(void *, const char *); +int gio_print_fb(void *, const char *); +int gio_search(struct device *, void *, void *); +int gio_submatch(struct device *, void *, void *); +uint32_t gio_id(paddr_t, int); + +struct gio_softc { + struct device sc_dev; + + bus_space_tag_t sc_iot; + bus_dma_tag_t sc_dmat; +}; + +const struct cfattach gio_ca = { + sizeof(struct gio_softc), gio_match, gio_attach +}; + +struct cfdriver gio_cd = { + NULL, "gio", DV_DULL +}; + +struct gio_probe { + uint32_t slot; + uint64_t base; + uint32_t mach_type; + uint32_t mach_subtype; +}; + +/* + * Expansion Slot Base Addresses + * + * IP12, IP20 and IP24 have two GIO connectors: GIO_SLOT_EXP0 and + * GIO_SLOT_EXP1. + * + * On IP24 these slots exist on the graphics board or the IOPLUS + * "mezzanine" on Indy and Challenge S, respectively. The IOPLUS or + * graphics board connects to the mainboard via a single GIO64 connector. + * + * IP22 has either three or four physical connectors, but only two + * electrically distinct slots: GIO_SLOT_GFX and GIO_SLOT_EXP0. + * + * It should also be noted that DMA is (mostly) not supported in Challenge S's + * GIO_SLOT_EXP1. See gio(4) for the story. + */ +static const struct gio_probe slot_bases[] = { + { GIO_SLOT_GFX, 0x1f000000, SGI_IP22, IP22_INDIGO2 }, + + { GIO_SLOT_EXP0, 0x1f400000, SGI_IP20, -1 }, + { GIO_SLOT_EXP0, 0x1f400000, SGI_IP22, -1 }, + + { GIO_SLOT_EXP1, 0x1f600000, SGI_IP20, -1 }, + { GIO_SLOT_EXP1, 0x1f600000, SGI_IP22, IP22_INDY }, + + { 0, 0, 0, 0 } +}; + +/* + * Graphic Board Base Addresses + * + * Graphics boards are not treated like expansion slot cards. Their base + * addresses do not necessarily correspond to GIO slot addresses and they + * do not contain product identification words. + */ +static const struct gio_probe gfx_bases[] = { + /* grtwo, and newport on IP22 */ + { -1, 0x1f000000, SGI_IP20, -1 }, + { -1, 0x1f000000, SGI_IP22, -1 }, + + /* light */ + { -1, 0x1f3f0000, SGI_IP20, -1 }, + + /* light (dual headed) */ + { -1, 0x1f3f8000, SGI_IP20, -1 }, + + /* grtwo, and newport on IP22 */ + { -1, 0x1f400000, SGI_IP20, -1 }, + { -1, 0x1f400000, SGI_IP22, -1 }, + + /* grtwo */ + { -1, 0x1f600000, SGI_IP20, -1 }, + { -1, 0x1f600000, SGI_IP22, -1 }, + + /* newport */ + { -1, 0x1f800000, SGI_IP22, IP22_INDIGO2 }, + + /* newport */ + { -1, 0x1fc00000, SGI_IP22, IP22_INDIGO2 }, + + { 0, 0, 0, 0 } +}; + +/* maximum number of graphics boards possible (arbitrarily large estimate) */ +#define MAXGFX (nitems(gfx_bases) - 1) + +int +gio_match(struct device *parent, void *match, void *aux) +{ + struct imc_attach_args *iaa = aux; + + if (strcmp(iaa->iaa_name, gio_cd.cd_name) != 0) + return 0; + + return 1; +} + +void +gio_attach(struct device *parent, struct device *self, void *aux) +{ + struct gio_softc *sc = (struct gio_softc *)self; + struct imc_attach_args *iaa = (struct imc_attach_args *)aux; + struct gio_attach_args ga; + uint32_t gfx[MAXGFX]; + uint i, j, ngfx; + + printf("\n"); + + sc->sc_iot = iaa->iaa_st; + sc->sc_dmat = iaa->iaa_dmat; + + ngfx = 0; + memset(gfx, 0, sizeof(gfx)); + + /* + * Try and attach graphics devices first. + * Unfortunately, they - not being GIO devices after all - do not + * contain a Product Identification Word, nor have a slot number. + * + * Record addresses to which graphics devices attach so that + * we do not confuse them with expansion slots, should the + * addresses coincide. + * + * Unfortunately graphics devices for which we have no configured + * driver, which address matches a regular slot number, will show + * up as rogue devices attached to real slots. + * + * If only the ARCBios component tree would be so kind as to give + * us the address of the frame buffer components... + */ + for (i = 0; gfx_bases[i].base != 0; i++) { + /* skip slots that don't apply to us */ + if (gfx_bases[i].mach_type != sys_config.system_type) + continue; + + if (gfx_bases[i].mach_subtype != -1 && + gfx_bases[i].mach_subtype != sys_config.system_subtype) + continue; + + ga.ga_slot = -1; + ga.ga_addr = gfx_bases[i].base; + ga.ga_iot = sc->sc_iot; + ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC); + ga.ga_dmat = sc->sc_dmat; + ga.ga_product = -1; + + if (gio_id(ga.ga_ioh, 1) == 0) + continue; + + if (config_found_sm(self, &ga, gio_print_fb, gio_submatch)) { + gfx[ngfx++] = gfx_bases[i].base; + } + } + + /* + * Now attach any GIO expansion cards. + * + * Be sure to skip any addresses to which a graphics device has + * already been attached. + */ + for (i = 0; slot_bases[i].base != 0; i++) { + int skip = 0; + + /* skip slots that don't apply to us */ + if (slot_bases[i].mach_type != sys_config.system_type) + continue; + + if (slot_bases[i].mach_subtype != -1 && + slot_bases[i].mach_subtype != sys_config.system_subtype) + continue; + + for (j = 0; j < ngfx; j++) { + if (slot_bases[i].base == gfx[j]) { + skip = 1; + break; + } + } + if (skip) + continue; + + ga.ga_slot = slot_bases[i].slot; + ga.ga_addr = slot_bases[i].base; + ga.ga_iot = sc->sc_iot; + ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC); + ga.ga_dmat = sc->sc_dmat; + + if (gio_id(ga.ga_ioh, 0) == 0) + continue; + + ga.ga_product = bus_space_read_4(ga.ga_iot, ga.ga_ioh, 0); + + config_found_sm(self, &ga, gio_print, gio_submatch); + } + + config_search(gio_search, self, aux); +} + +/* + * Try and figure out whether there is a device at the given slot address. + */ +uint32_t +gio_id(paddr_t pa, int maybe_gfx) +{ + uint32_t id32; + uint16_t id16 = 0; + uint8_t id8 = 0; + + if (guarded_read_4(pa, &id32) != 0) + return 0; + + id16 = id32 ^ 0xffff; + (void)guarded_read_2(pa | 2, &id16); + id8 = id16 ^ 0xff; + (void)guarded_read_1(pa | 3, &id8); + + /* + * If there is a real GIO device at this address (as opposed to + * a graphics card), then the low-order 8 bits of each read need + * to be consistent... + */ + if (id8 == (id16 & 0xff) && id8 == (id32 & 0xff)) { + if (GIO_PRODUCT_32BIT_ID(id8)) { + if (id16 == (id32 & 0xffff)) + return id32; + } else { + if (id8 != 0) + return id32; + } + } + + if (maybe_gfx) + return 1; + + return 0; +} + +int +gio_print(void *aux, const char *pnp) +{ + struct gio_attach_args *ga = aux; + const char *descr; + int product, revision; + uint i; + + product = GIO_PRODUCT_PRODUCTID(ga->ga_product); + if (GIO_PRODUCT_32BIT_ID(ga->ga_product)) + revision = GIO_PRODUCT_REVISION(ga->ga_product); + else + revision = 0; + + descr = "unknown GIO card"; + for (i = 0; gio_knowndevs[i].productid != 0; i++) { + if (gio_knowndevs[i].productid == product) { + descr = gio_knowndevs[i].product; + break; + } + } + + if (pnp != NULL) { + printf("%s", descr); + if (ga->ga_product != -1) + printf(" (product 0x%02x revision 0x%02x)", + product, revision); + printf(" at %s", pnp); + } + + if (ga->ga_slot != -1) + printf(" slot %d", ga->ga_slot); + printf(" addr 0x%lx", ga->ga_addr); + + return UNCONF; +} + +int +gio_print_fb(void *aux, const char *pnp) +{ +#if 0 /* once we can know for sure there really is a frame buffer here */ + if (pnp != NULL) + printf("framebuffer at %s", pnp); + + if (ga->ga_addr != (uint64_t)-1) + printf(" addr 0x%lx", ga->ga_addr); + + return UNCONF; +#else + return QUIET; +#endif +} + +int +gio_search(struct device *parent, void *vcf, void *aux) +{ + struct gio_softc *sc = (struct gio_softc *)parent; + struct cfdata *cf = (struct cfdata *)vcf; + struct gio_attach_args ga; + + /* Handled by direct configuration, so skip here */ + if (cf->cf_loc[1 /*GIOCF_ADDR*/] == -1) + return 0; + + ga.ga_product = -1; + ga.ga_slot = cf->cf_loc[0 /*GIOCF_SLOT*/]; + ga.ga_addr = (uint64_t)cf->cf_loc[1 /*GIOCF_ADDR*/]; + ga.ga_iot = sc->sc_iot; + ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC); + ga.ga_dmat = sc->sc_dmat; + + if ((*cf->cf_attach->ca_match)(parent, cf, &ga) == 0) + return 0; + + config_attach(parent, cf, &ga, gio_print); + + return 1; +} + +int +gio_submatch(struct device *parent, void *vcf, void *aux) +{ + struct cfdata *cf = (struct cfdata *)vcf; + struct gio_attach_args *ga = (struct gio_attach_args *)aux; + + if (cf->cf_loc[0 /*GIOCF_SLOT*/] != -1 && + cf->cf_loc[0 /*GIOCF_SLOT*/] != ga->ga_slot) + return 0; + + if (cf->cf_loc[1 /*GIOCF_ADDR*/] != -1 && + (uint64_t)cf->cf_loc[1 /*GIOCF_ADDR*/] != ga->ga_addr) + return 0; + + return (*cf->cf_attach->ca_match)(parent, cf, aux); +} + +#if 0 /* XXX involve wscons_machdep somehow */ +int +gio_cnattach(void) +{ + extern struct machine_bus_dma_tag imc_bus_dma_tag; /* XXX */ + extern bus_space_t imcbus_tag; /* XXX */ + struct gio_attach_args ga; + uint32_t dummy; + int i; + + for (i = 0; gfx_bases[i].base != 0; i++) { + /* skip bases that don't apply to us */ + if (gfx_bases[i].mach_type != sys_config.system_type) + continue; + + if (gfx_bases[i].mach_subtype != -1 && + gfx_bases[i].mach_subtype != sys_config.system_subtype) + continue; + + ga.ga_slot = -1; + ga.ga_addr = gfx_bases[i].base; + ga.ga_iot = &imcbus_tag; /* XXX */ + ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC); + ga.ga_dmat = &imc_bus_dma_tag; /* XXX */ + ga.ga_product = -1; + + if (gio_id(ga.ga_ioh, 1) == 0) + continue; + +#if NGRTWO > 0 + if (grtwo_cnattach(&ga) == 0) + return 0; +#endif + +#if NLIGHT > 0 + if (light_cnattach(&ga) == 0) + return 0; +#endif + +#if NNEWPORT > 0 + if (newport_cnattach(&ga) == 0) + return 0; +#endif + + } + + return ENXIO; +} +#endif + +/* + * Devices living in the expansion slots must enable or disable some + * GIO arbiter settings. This is accomplished via imc(4) registers. + */ +int +gio_arb_config(int slot, uint32_t flags) +{ + if (flags == 0) + return (EINVAL); + + if (flags & ~(GIO_ARB_RT | GIO_ARB_LB | GIO_ARB_MST | GIO_ARB_SLV | + GIO_ARB_PIPE | GIO_ARB_NOPIPE | GIO_ARB_32BIT | GIO_ARB_64BIT | + GIO_ARB_HPC2_32BIT | GIO_ARB_HPC2_64BIT)) + return (EINVAL); + + if (((flags & GIO_ARB_RT) && (flags & GIO_ARB_LB)) || + ((flags & GIO_ARB_MST) && (flags & GIO_ARB_SLV)) || + ((flags & GIO_ARB_PIPE) && (flags & GIO_ARB_NOPIPE)) || + ((flags & GIO_ARB_32BIT) && (flags & GIO_ARB_64BIT)) || + ((flags & GIO_ARB_HPC2_32BIT) && (flags & GIO_ARB_HPC2_64BIT))) + return (EINVAL); + + return (imc_gio64_arb_config(slot, flags)); +} + +/* + * Establish an interrupt handler for the specified slot. + * + * Indy and Challenge S have an interrupt per GIO slot. Indigo and Indigo2 + * share a single interrupt, however. + */ +void * +gio_intr_establish(int slot, int level, int (*func)(void *), void *arg, + const char *what) +{ + int intr; + + switch (sys_config.system_type) { + case SGI_IP20: + if (slot == GIO_SLOT_GFX) + return NULL; + intr = 6; + break; + case SGI_IP22: + case SGI_IP26: + case SGI_IP28: + if (sys_config.system_subtype == IP22_INDIGO2) { + if (slot == GIO_SLOT_EXP1) + return NULL; + intr = 6; + } else { + if (slot == GIO_SLOT_GFX) + return NULL; + intr = (slot == GIO_SLOT_EXP0) ? 22 : 23; + } + break; + default: + return NULL; + } + + return int2_intr_establish(intr, level, func, arg, what); +} + +const char * +gio_product_string(int prid) +{ + int i; + + for (i = 0; gio_knowndevs[i].product != NULL; i++) + if (gio_knowndevs[i].productid == prid) + return (gio_knowndevs[i].product); + + return (NULL); +} diff --git a/sys/arch/sgi/gio/giodevs b/sys/arch/sgi/gio/giodevs new file mode 100644 index 00000000000..8189affed20 --- /dev/null +++ b/sys/arch/sgi/gio/giodevs @@ -0,0 +1,21 @@ +$OpenBSD: giodevs,v 1.1 2012/03/28 20:44:23 miod Exp $ +/* $NetBSD: giodevs,v 1.8 2007/02/19 04:46:33 rumble Exp $ */ + +product XPI 0x01 XPI low cost FDDI +product GTR 0x02 GTR TokenRing +product ISDN 0x04 Synchronous ISDN +product CANON 0x06 Canon Interface +product JPEG_D 0x08 JPEG (Double Wide) +product JPEG_S 0x09 JPEG (Single Wide) +product XPI_M0 0x0a XPI mez. FDDI device 0 +product XPI_M1 0x0b XPI mez. FDDI device 1 +product EP 0x0e E-Plex 8-port Ethernet +product IVAS 0x30 Lyon Lamb IVAS +product PHOBOS_G160 0x35 Phobos G160 10/100 Ethernet +product PHOBOS_G130 0x36 Phobos G130 10/100 Ethernet +product PHOBOS_G100 0x37 Phobos G100 100baseTX Fast Ethernet +product SETENG_GFE 0x38 Set Engineering GFE 10/100 Ethernet +product ATM 0x85 ATM board +product SCSI 0x87 16 bit SCSI Card +product SMPTE 0x8c SMPTE 259M Video +product BABBLE 0x8d Babblefish Compression diff --git a/sys/arch/sgi/gio/gioreg.h b/sys/arch/sgi/gio/gioreg.h new file mode 100644 index 00000000000..a5bf76444e3 --- /dev/null +++ b/sys/arch/sgi/gio/gioreg.h @@ -0,0 +1,68 @@ +/* $OpenBSD: gioreg.h,v 1.1 2012/03/28 20:44:23 miod Exp $ */ +/* $NetBSD: gioreg.h,v 1.4 2006/08/31 00:01:10 rumble Exp $ */ + +/* + * Copyright (c) 2003 Ilpo Ruotsalainen + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>> + */ + +/* + * The GIO Product Identification Word is the first word (1 or 4 bytes) + * in each GIO device's address space. It is the same format for GIO32, + * GIO32-bis, and GIO64 devices. The macros below extract the following + * fields: + * + * Bits: + * 0-6 Product ID Code + * 7 Product Identification Word size (0: 8 bits, 1: 32 bits) + * 8-15 Product Revision + * 16 GIO Interface Size (0: 32, 1: 64; NB: GIO64 devices may be 32) + * 17 Rom Present (1: present) + * 18-31 Manufacturer-specific Code + * + * The upper three bytes containing the Product Revision, GIO Interface + * Size, Rom Presence indicator, and Manufacturer-specific Code are only + * valid if bit 7 is set in the Product ID Word. If it is not set, all + * values default to 0. + * + * If the Rom Present bit is set, the three words after the Product ID are + * reserved for three ROM registers: + * Board Serial Number Register (base_address + 0x4) + * ROM Index Register (base_address + 0x8) + * ROM Read Register (base_address + 0xc) + * + * The ROM Index Register is initialised by the CPU to 0 and incremented by + * 4 on each read from the ROM Read Register. The Board Serial Number + * Register contains a manufacturer-specific serial number. + */ + +#define GIO_PRODUCT_32BIT_ID(x) ((x) & 0x80) +#define GIO_PRODUCT_PRODUCTID(x) ((x) & 0x7f) +#define GIO_PRODUCT_REVISION(x) (((x) >> 8) & 0xff) +#define GIO_PRODUCT_IS_64BIT(x) (!!((x) & 0x8000)) +#define GIO_PRODUCT_HAS_ROM(x) (!!((x) & 0x10000)) +#define GIO_PRODUCT_MANUCODE(x) ((x) >> 18) diff --git a/sys/arch/sgi/gio/giovar.h b/sys/arch/sgi/gio/giovar.h new file mode 100644 index 00000000000..6c35c7561da --- /dev/null +++ b/sys/arch/sgi/gio/giovar.h @@ -0,0 +1,75 @@ +/* $OpenBSD: giovar.h,v 1.1 2012/03/28 20:44:23 miod Exp $ */ +/* $NetBSD: giovar.h,v 1.10 2011/07/01 18:53:46 dyoung Exp $ */ + +/* + * Copyright (c) 2000 Soren S. Jorvang + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed for the + * NetBSD Project. See http://www.NetBSD.org/ for + * information about NetBSD. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * GIO 32/32-bis/64 bus + */ + +struct gio_attach_args { + bus_space_tag_t ga_iot; + bus_space_handle_t ga_ioh; + bus_dma_tag_t ga_dmat; + + int ga_slot; /* not valid if graphics */ + u_int64_t ga_addr; + + u_int32_t ga_product; /* not valid if graphics */ +}; + + +#define GIO_SLOT_GFX 0 +#define GIO_SLOT_EXP0 1 +#define GIO_SLOT_EXP1 2 + +#define GIO_ARB_RT 0x001 /* real-time device */ +#define GIO_ARB_LB 0x002 /* long-burst device */ + +#define GIO_ARB_MST 0x004 /* bus master enable */ +#define GIO_ARB_SLV 0x008 /* slave */ + +#define GIO_ARB_PIPE 0x010 /* pipelining enable */ +#define GIO_ARB_NOPIPE 0x020 /* pipelining disable */ + +#define GIO_ARB_32BIT 0x040 /* 32-bit transfers */ +#define GIO_ARB_64BIT 0x080 /* 64-bit transfers */ + +#define GIO_ARB_HPC2_32BIT 0x100 /* 32-bit secondary HPC (ignores slot)*/ +#define GIO_ARB_HPC2_64BIT 0x200 /* 64-bit secondary HPC (ignores slot)*/ + +int gio_cnattach(void); +int gio_arb_config(int, uint32_t); +void *gio_intr_establish(int, int, int (*)(void *), void *, + const char *); +const char *gio_product_string(int); |