diff options
Diffstat (limited to 'sys/arch/sgi/include/intr.h')
| -rw-r--r-- | sys/arch/sgi/include/intr.h | 105 |
1 files changed, 46 insertions, 59 deletions
diff --git a/sys/arch/sgi/include/intr.h b/sys/arch/sgi/include/intr.h index 33cbd8aec22..1829fc7dd22 100644 --- a/sys/arch/sgi/include/intr.h +++ b/sys/arch/sgi/include/intr.h @@ -1,4 +1,4 @@ -/* $OpenBSD: intr.h,v 1.33 2009/10/22 20:39:17 miod Exp $ */ +/* $OpenBSD: intr.h,v 1.34 2009/10/22 22:08:54 miod Exp $ */ /* * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -30,14 +30,19 @@ #define _MACHINE_INTR_H_ /* - * The interrupt mask cpl is a mask which is used with an external - * HW mask register. - * The CPU mask is never changed from the value it gets when interrupt - * dispatchers are registered. + * The interrupt level ipl is a logical level; per-platform interrupt + * code will turn it into the appropriate hardware interrupt masks + * values. * - * Clock interrupts are always allowed to happen but will not be serviced + * Interrupt sources on the CPU are kept enabled regardless of the + * current ipl value; individual hardware sources interrupting while + * logically masked are masked on the fly, remembered as pending, and + * unmasked at the first splx() opportunity. + * + * An exception to this rule is the clock interrupt. Clock interrupts + * are always allowed to happen, but will (of course!) not be serviced * if logically masked. The reason for this is that clocks usually sit on - * INT5 and cannot be easily masked if external HW masking is used. + * INT5 and cannot be easily masked if external hardware masking is used. */ /* Interrupt priority `levels'; not mutually exclusive. */ @@ -58,12 +63,9 @@ #define IST_EDGE 2 /* edge-triggered */ #define IST_LEVEL 3 /* level-triggered */ -#define SINTBIT(q) (31 - (q)) +#define SINTBIT(q) (q) #define SINTMASK(q) (1 << SINTBIT(q)) -#define SPL_CLOCK SINTBIT(SI_NQUEUES) -#define SPL_CLOCKMASK SINTMASK(SI_NQUEUES) - /* Soft interrupt masks. */ #define IPL_SOFT 0 @@ -76,8 +78,6 @@ #define SI_SOFTNET 2 /* for IPL_SOFTNET */ #define SI_SOFTTTY 3 /* for IPL_SOFTTTY */ -#define SINT_ALLMASK (SINTMASK(SI_SOFT) | SINTMASK(SI_SOFTCLOCK) | \ - SINTMASK(SI_SOFTNET) | SINTMASK(SI_SOFTTTY)) #define SI_NQUEUES 4 #ifndef _LOCORE @@ -110,45 +110,32 @@ extern struct soft_intrhand *softnet_intrhand; #define setsoftnet() softintr_schedule(softnet_intrhand) -#define splsoft() splraise(imask[IPL_SOFTINT]) -#define splbio() splraise(imask[IPL_BIO]) -#define splnet() splraise(imask[IPL_NET]) -#define spltty() splraise(imask[IPL_TTY]) -#define splaudio() splraise(imask[IPL_AUDIO]) -#define splclock() splraise(imask[IPL_CLOCK]) -#define splvm() splraise(imask[IPL_VM]) -#define splsoftclock() splraise(SINTMASK(SI_SOFTCLOCK) | \ - SINTMASK(SI_SOFT)) -#define splsoftnet() splraise(SINTMASK(SI_SOFTNET) | \ - SINTMASK(SI_SOFTCLOCK) | \ - SINTMASK(SI_SOFT)) -#define splstatclock() splhigh() -#define splsched() splhigh() -#define spllock() splhigh() -#define splhigh() splraise(-1) -#define spl0() spllower(0) +#define splsoft() splraise(IPL_SOFTINT) +#define splbio() splraise(IPL_BIO) +#define splnet() splraise(IPL_NET) +#define spltty() splraise(IPL_TTY) +#define splaudio() splraise(IPL_AUDIO) +#define splclock() splraise(IPL_CLOCK) +#define splvm() splraise(IPL_VM) +#define splhigh() splraise(IPL_HIGH) + +#define splsoftclock() splsoft() +#define splsoftnet() splsoft() +#define splstatclock() splhigh() + +#define splsched() splhigh() +#define spllock() splhigh() +#define spl0() spllower(0) void splinit(void); #define splassert(X) #define splsoftassert(X) -/* - * Schedule prioritys for base interrupts (CPU) - */ -#define INTPRI_CLOCK 1 -#define INTPRI_MACEIO 2 /* O2 I/O interrupt */ -#define INTPRI_XBOWMUX 2 /* Origin 200/2000 I/O interrupt */ -#define INTPRI_MACEAUX 3 - -#define INTMASKSIZE 32 - -extern uint32_t imask[NIPLS]; - /* Inlines */ static __inline void register_splx_handler(void (*)(int)); -typedef void (int_f) (int); +typedef void (int_f)(int); extern int_f *splx_hand; static __inline void @@ -169,32 +156,32 @@ int spllower(int); #include <sys/evcount.h> struct intrhand { - struct intrhand *ih_next; - int (*ih_fun)(void *); - void *ih_arg; - int ih_level; - int ih_irq; - void *frame; - struct evcount ih_count; + struct intrhand *ih_next; + int (*ih_fun)(void *); + void *ih_arg; + int ih_level; + int ih_irq; + void *frame; + struct evcount ih_count; }; -extern struct intrhand *intrhand[INTMASKSIZE]; - /* * Low level interrupt dispatcher registration data. */ -#define NLOWINT 16 /* Number of low level registrations possible */ -struct trap_frame; +/* Schedule priorities for base interrupts (CPU) */ +#define INTPRI_CLOCK 0 +/* other values are system-specific */ + +#define NLOWINT 16 /* Number of low level registrations possible */ extern uint32_t idle_mask; -extern int last_low_int; -void set_intr(int, uint32_t, uint32_t(*)(uint32_t, struct trap_frame *)); +struct trap_frame; +void set_intr(int, uint32_t, uint32_t(*)(uint32_t, struct trap_frame *)); -void hw_setintrmask(uint32_t); -u_int32_t updateimask(uint32_t); -void dosoftint(uint32_t); +uint32_t updateimask(uint32_t); +void dosoftint(void); #endif /* _LOCORE */ |