diff options
Diffstat (limited to 'sys/arch/sgi/include')
52 files changed, 2340 insertions, 0 deletions
diff --git a/sys/arch/sgi/include/ansi.h b/sys/arch/sgi/include/ansi.h new file mode 100644 index 00000000000..30695652224 --- /dev/null +++ b/sys/arch/sgi/include/ansi.h @@ -0,0 +1,5 @@ +/* $OpenBSD: ansi.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/ansi.h> diff --git a/sys/arch/sgi/include/arcbios.h b/sys/arch/sgi/include/arcbios.h new file mode 100644 index 00000000000..a0b3ff03fac --- /dev/null +++ b/sys/arch/sgi/include/arcbios.h @@ -0,0 +1,475 @@ +/* $OpenBSD: arcbios.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */ +/* $NetBSD: arcbios.h,v 1.5 2004/04/10 19:32:53 pooka Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * The ARC BIOS (which is similar, but not 100% compatible with SGI ARCS) + * specification can be found at: + * + * http://www.microsoft.com/hwdev/download/respec/riscspec.zip + */ + +#ifndef _ARCBIOS_H_ +#define _ARCBIOS_H_ + +#define ARCBIOS_STDIN 0 +#define ARCBIOS_STDOUT 1 + +#define ARCBIOS_PAGESIZE 4096 + +/* ARC BIOS status codes. */ +#define ARCBIOS_ESUCCESS 0 /* Success */ +#define ARCBIOS_E2BIG 1 /* argument list too long */ +#define ARCBIOS_EACCES 2 /* permission denied */ +#define ARCBIOS_EAGAIN 3 /* resource temporarily unavailable */ +#define ARCBIOS_EBADF 4 /* bad file number */ +#define ARCBIOS_EBUSY 5 /* device or resource busy */ +#define ARCBIOS_EFAULT 6 /* bad address */ +#define ARCBIOS_EINVAL 7 /* invalid argument */ +#define ARCBIOS_EIO 8 /* I/O error */ +#define ARCBIOS_EISDIR 9 /* is a directory */ +#define ARCBIOS_EMFILE 10 /* too many open files */ +#define ARCBIOS_EMLINK 11 /* too many links */ +#define ARCBIOS_ENAMETOOLONG 12 /* file name too long */ +#define ARCBIOS_ENODEV 13 /* no such device */ +#define ARCBIOS_ENOENT 14 /* no such file or directory */ +#define ARCBIOS_ENOEXEC 15 /* exec format error */ +#define ARCBIOS_ENOMEM 16 /* out of memory */ +#define ARCBIOS_ENOSPC 17 /* no space left on device */ +#define ARCBIOS_ENOTDIR 18 /* not a directory */ +#define ARCBIOS_ENOTTY 19 /* not a typewriter */ +#define ARCBIOS_ENXIO 20 /* media not loaded */ +#define ARCBIOS_EROFS 21 /* read-only file system */ +#if defined(__sgi__) +#define ARCBIOS_EADDRNOTAVAIL 31 /* address not available */ +#define ARCBIOS_ETIMEDOUT 32 /* operation timed out */ +#define ARCBIOS_ECONNABORTED 33 /* connection aborted */ +#define ARCBIOS_ENOCONNECT 34 /* not connected */ +#endif /* __sgi__ */ + +/* + * 4.2.2: System Parameter Block + */ +struct arcbios_spb { + uint32_t SPBSignature; + uint32_t SPBLength; + uint16_t Version; + uint16_t Revision; + void *RestartBlock; + void *DebugBlock; + void *GEVector; + void *UTLBMissVector; + uint32_t FirmwareVectorLength; + void *FirmwareVector; + uint32_t PrivateVectorLength; + void *PrivateVector; + uint32_t AdapterCount; + uint32_t AdapterType; + uint32_t AdapterVectorLength; + void *AdapterVector; +}; + +#define ARCBIOS_SPB_SIGNATURE 0x53435241 /* A R C S */ +#define ARCBIOS_SPB_SIGNATURE_1 0x41524353 /* S C R A */ + +/* + * 4.2.5: System Configuration Data + */ +struct arcbios_component { + uint32_t Class; + uint32_t Type; + uint32_t Flags; + uint16_t Version; + uint16_t Revision; + uint32_t Key; + uint32_t AffinityMask; + uint32_t ConfigurationDataSize; + uint32_t IdentifierLength; + char *Identifier; +}; + +/* + * SGI ARCS likes to be `special', so it moved some of the class/type + * numbers around from the ARC standard definitions. + */ +#if defined(__sgi__) +/* Component Class */ +#define COMPONENT_CLASS_SystemClass 0 +#define COMPONENT_CLASS_ProcessorClass 1 +#define COMPONENT_CLASS_CacheClass 2 +#define COMPONENT_CLASS_MemoryClass 3 +#define COMPONENT_CLASS_AdapterClass 4 +#define COMPONENT_CLASS_ControllerClass 5 +#define COMPONENT_CLASS_PeripheralClass 6 +#else +/* Component Class */ +#define COMPONENT_CLASS_SystemClass 0 +#define COMPONENT_CLASS_ProcessorClass 1 +#define COMPONENT_CLASS_CacheClass 2 +#define COMPONENT_CLASS_AdapterClass 3 +#define COMPONENT_CLASS_ControllerClass 4 +#define COMPONENT_CLASS_PeripheralClass 5 +#define COMPONENT_CLASS_MemoryClass 6 +#endif + +/* Component Types */ +#if defined(__sgi__) +/* System Class */ +#define COMPONENT_TYPE_ARC 0 + +/* Processor Class */ +#define COMPONENT_TYPE_CPU 1 +#define COMPONENT_TYPE_FPU 2 + +/* Cache Class */ +#define COMPONENT_TYPE_PrimaryICache 3 +#define COMPONENT_TYPE_PrimaryDCache 4 +#define COMPONENT_TYPE_SecondaryICache 5 +#define COMPONENT_TYPE_SecondaryDCache 6 +#define COMPONENT_TYPE_SecondaryCache 7 + +/* Memory Class */ +#define COMPONENT_TYPE_MemoryUnit 8 + +/* Adapter Class */ +#define COMPONENT_TYPE_EISAAdapter 9 +#define COMPONENT_TYPE_TCAdapter 10 +#define COMPONENT_TYPE_SCSIAdapter 11 +#define COMPONENT_TYPE_DTIAdapter 12 +#define COMPONENT_TYPE_MultiFunctionAdapter 13 + +/* Controller Class */ +#define COMPONENT_TYPE_DiskController 14 +#define COMPONENT_TYPE_TapeController 15 +#define COMPONENT_TYPE_CDROMController 16 +#define COMPONENT_TYPE_WORMController 17 +#define COMPONENT_TYPE_SerialController 18 +#define COMPONENT_TYPE_NetworkController 19 +#define COMPONENT_TYPE_DisplayController 20 +#define COMPONENT_TYPE_ParallelController 21 +#define COMPONENT_TYPE_PointerController 22 +#define COMPONENT_TYPE_KeyboardController 23 +#define COMPONENT_TYPE_AudioController 24 +#define COMPONENT_TYPE_OtherController 25 + +/* Peripheral Class */ +#define COMPONENT_TYPE_DiskPeripheral 26 +#define COMPONENT_TYPE_FloppyDiskPeripheral 27 +#define COMPONENT_TYPE_TapePeripheral 28 +#define COMPONENT_TYPE_ModemPeripheral 29 +#define COMPONENT_TYPE_MonitorPeripheral 30 +#define COMPONENT_TYPE_PrinterPeripheral 31 +#define COMPONENT_TYPE_PointerPeripheral 32 +#define COMPONENT_TYPE_KeyboardPeripheral 33 +#define COMPONENT_TYPE_TerminalPeripheral 34 +#define COMPONENT_TYPE_LinePeripheral 35 +#define COMPONENT_TYPE_NetworkPeripheral 36 +#define COMPONENT_TYPE_OtherPeripheral 37 +#else /* not __sgi__ */ +/* System Class */ +#define COMPONENT_TYPE_ARC 0 + +/* Processor Class */ +#define COMPONENT_TYPE_CPU 1 +#define COMPONENT_TYPE_FPU 2 + +/* Cache Class */ +#define COMPONENT_TYPE_PrimaryICache 3 +#define COMPONENT_TYPE_PrimaryDCache 4 +#define COMPONENT_TYPE_SecondaryICache 5 +#define COMPONENT_TYPE_SecondaryDCache 6 +#define COMPONENT_TYPE_SecondaryCache 7 + +/* Adapter Class */ +#define COMPONENT_TYPE_EISAAdapter 8 +#define COMPONENT_TYPE_TCAdapter 9 +#define COMPONENT_TYPE_SCSIAdapter 10 +#define COMPONENT_TYPE_DTIAdapter 11 +#define COMPONENT_TYPE_MultiFunctionAdapter 12 + +/* Controller Class */ +#define COMPONENT_TYPE_DiskController 13 +#define COMPONENT_TYPE_TapeController 14 +#define COMPONENT_TYPE_CDROMController 15 +#define COMPONENT_TYPE_WORMController 16 +#define COMPONENT_TYPE_SerialController 17 +#define COMPONENT_TYPE_NetworkController 18 +#define COMPONENT_TYPE_DisplayController 19 +#define COMPONENT_TYPE_ParallelController 20 +#define COMPONENT_TYPE_PointerController 21 +#define COMPONENT_TYPE_KeyboardController 22 +#define COMPONENT_TYPE_AudioController 23 +#define COMPONENT_TYPE_OtherController 24 + +/* Peripheral Class */ +#define COMPONENT_TYPE_DiskPeripheral 25 +#define COMPONENT_TYPE_FloppyDiskPeripheral 26 +#define COMPONENT_TYPE_TapePeripheral 27 +#define COMPONENT_TYPE_ModemPeripheral 28 +#define COMPONENT_TYPE_MonitorPeripheral 29 +#define COMPONENT_TYPE_PrinterPeripheral 30 +#define COMPONENT_TYPE_PointerPeripheral 31 +#define COMPONENT_TYPE_KeyboardPeripheral 32 +#define COMPONENT_TYPE_TerminalPeripheral 33 +#define COMPONENT_TYPE_OtherPeripheral 34 +#define COMPONENT_TYPE_LinePeripheral 35 +#define COMPONENT_TYPE_NetworkPeripheral 36 + +/* Memory Class */ +#define COMPONENT_TYPE_MemoryUnit 37 +#endif + +/* Component flags */ +#define COMPONENT_FLAG_Failed 1 +#define COMPONENT_FLAG_ReadOnly 2 +#define COMPONENT_FLAG_Removable 4 +#define COMPONENT_FLAG_ConsoleIn 8 +#define COMPONENT_FLAG_ConsoleOut 16 +#define COMPONENT_FLAG_Input 32 +#define COMPONENT_FLAG_Output 64 + +/* Key for Cache: */ +#define COMPONENT_KEY_Cache_CacheSize(x) \ + (ARCBIOS_PAGESIZE << ((x) & 0xffff)) +#define COMPONENT_KEY_Cache_LineSize(x) \ + (1U << (((x) >> 16) & 0xff)) +#define COMPONENT_KEY_Cache_RefillSize(x) \ + (((x) >> 24) & 0xff) + +/* + * ARC system ID + */ +#define ARCBIOS_SYSID_FIELDLEN 8 +struct arcbios_sysid { + char VendorId[ARCBIOS_SYSID_FIELDLEN]; + char ProductId[ARCBIOS_SYSID_FIELDLEN]; +}; + +/* + * ARC memory descriptor + */ +struct arcbios_mem { + uint32_t Type; + uint32_t BasePage; + uint32_t PageCount; +}; + +#if defined(__sgi__) +#define ARCBIOS_MEM_ExceptionBlock 0 +#define ARCBIOS_MEM_SystemParameterBlock 1 +#define ARCBIOS_MEM_FreeContiguous 2 +#define ARCBIOS_MEM_FreeMemory 3 +#define ARCBIOS_MEM_BadMemory 4 +#define ARCBIOS_MEM_LoadedProgram 5 +#define ARCBIOS_MEM_FirmwareTemporary 6 +#define ARCBIOS_MEM_FirmwarePermanent 7 +#elif defined(arc) +#define ARCBIOS_MEM_ExceptionBlock 0 +#define ARCBIOS_MEM_SystemParameterBlock 1 +#define ARCBIOS_MEM_FreeMemory 2 +#define ARCBIOS_MEM_BadMemory 3 +#define ARCBIOS_MEM_LoadedProgram 4 +#define ARCBIOS_MEM_FirmwareTemporary 5 +#define ARCBIOS_MEM_FirmwarePermanent 6 +#define ARCBIOS_MEM_FreeContiguous 7 +#endif + +/* + * ARC display status + */ +struct arcbios_dsp_stat { + uint16_t CursorXPosition; + uint16_t CursorYPosition; + uint16_t CursorMaxXPosition; + uint16_t CursorMaxYPosition; + uint8_t ForegroundColor; + uint8_t BackgroundColor; + uint8_t HighIntensity; + uint8_t Underscored; + uint8_t ReverseVideo; +}; + +/* + * ARC firmware vector + */ +struct arcbios_fv { + uint32_t (*Load)( + char *, /* image to load */ + uint32_t, /* top address */ + uint32_t, /* entry address */ + uint32_t *); /* low address */ + + uint32_t (*Invoke)( + uint32_t, /* entry address */ + uint32_t, /* stack address */ + uint32_t, /* argc */ + char **, /* argv */ + char **); /* envp */ + + uint32_t (*Execute)( + char *, /* image path */ + uint32_t, /* argc */ + char **, /* argv */ + char **); /* envp */ + + void (*Halt)(void) + __attribute__((__noreturn__)); + + void (*PowerDown)(void) + __attribute__((__noreturn__)); + + void (*Restart)(void) + __attribute__((__noreturn__)); + + void (*Reboot)(void) + __attribute__((__noreturn__)); + + void (*EnterInteractiveMode)(void) + __attribute__((__noreturn__)); +#if defined(__sgi__) + void *reserved0; +#else + void (*ReturnFromMain)(void) + __attribute__((__noreturn__)); +#endif + void *(*GetPeer)( + void *); /* component */ + + void *(*GetChild)( + void *); /* component */ + + void *(*GetParent)( + void *); /* component */ + + uint32_t (*GetConfigurationData)( + void *, /* configuration data */ + void *); /* component */ + + void *(*AddChild)( + void *, /* component */ + void *); /* new component */ + + uint32_t (*DeleteComponent)( + void *); /* component */ + + uint32_t (*GetComponent)( + char *); /* path */ + + uint32_t (*SaveConfiguration)(void); + + void *(*GetSystemId)(void); + + void *(*GetMemoryDescriptor)( + void *); /* memory descriptor */ +#if defined(__sgi__) + void *reserved1; +#else + void (*Signal)( + uint32_t, /* signal number */ + void *); /* handler */ +#endif + void *(*GetTime)(void); + + uint32_t (*GetRelativeTime)(void); + + uint32_t (*GetDirectoryEntry)( + uint32_t, /* file ID */ + void *, /* directory entry */ + uint32_t, /* length */ + uint32_t *); /* count */ + + uint32_t (*Open)( + char *, /* path */ + uint32_t, /* open mode */ + uint32_t *); /* file ID */ + + uint32_t (*Close)( + uint32_t); /* file ID */ + + uint32_t (*Read)( + uint32_t, /* file ID */ + void *, /* buffer */ + uint32_t, /* length */ + uint32_t *); /* count */ + + uint32_t (*GetReadStatus)( + uint32_t); /* file ID */ + + uint32_t (*Write)( + uint32_t, /* file ID */ + void *, /* buffer */ + uint32_t, /* length */ + uint32_t *); /* count */ + + uint32_t (*Seek)( + uint32_t, /* file ID */ + int64_t *, /* offset */ + uint32_t); /* whence */ + + uint32_t (*Mount)( + char *, /* path */ + uint32_t); /* operation */ + + char *(*GetEnvironmentVariable)( + char *); /* variable */ + + uint32_t (*SetEnvironmentVariable)( + char *, /* variable */ + char *); /* contents */ + + uint32_t (*GetFileInformation)( + uint32_t, /* file ID */ + void *); /* XXX */ + + uint32_t (*SetFileInformation)( + uint32_t, /* file ID */ + uint32_t, /* XXX */ + uint32_t); /* XXX */ + + void (*FlushAllCaches)(void); +#if !defined(__sgi__) + uint32_t (*TestUnicode)( + uint32_t, /* file ID */ + uint16_t); /* unicode character */ + + void *(*GetDisplayStatus)( + uint32_t); /* file ID */ +#endif +}; + +#endif /* _ARCBIOS_H_ */ diff --git a/sys/arch/sgi/include/asm.h b/sys/arch/sgi/include/asm.h new file mode 100644 index 00000000000..997fa0dc94d --- /dev/null +++ b/sys/arch/sgi/include/asm.h @@ -0,0 +1,5 @@ +/* $OpenBSD: asm.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/asm.h> diff --git a/sys/arch/sgi/include/autoconf.h b/sys/arch/sgi/include/autoconf.h new file mode 100644 index 00000000000..8761e9ac4da --- /dev/null +++ b/sys/arch/sgi/include/autoconf.h @@ -0,0 +1,131 @@ +/* $OpenBSD: autoconf.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */ + +/* + * Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Opsycon AB, Sweden. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +/* + * Definitions used buy autoconfiguration. + */ + +#ifndef _MACHINE_AUTOCONF_H_ +#define _MACHINE_AUTOCONF_H_ + +#include <machine/bus.h> + +/* + * Structure holding all misc config information. + */ + +struct sys_rec { + int system_type; + struct { + u_int32_t type; + u_int32_t vers_maj; + u_int32_t vers_min; + u_int32_t clock; + u_int32_t clock_bus; + u_int32_t tlbsize; + u_int32_t tlbwired; + u_int32_t cfg_reg; + u_int32_t stat_reg; + } cpu; + struct mips_bus_space local; + struct mips_bus_space isa_io; + struct mips_bus_space isa_mem; + struct mips_bus_space pci_io[2]; + struct mips_bus_space pci_mem[2]; + + int cons_baudclk; + struct mips_bus_space console_io; /* for stupid map designs */ + struct mips_bus_space *cons_iot; + bus_addr_t cons_ioaddr[8]; /* up to eight loclbus tty's */ +}; + +extern struct sys_rec sys_config; + +/* + * Give com.c method to find console address and speeds + */ +#define COM_FREQ (sys_config.cons_baudclk) +#define CONCOM_FREQ (sys_config.cons_baudclk) +#define CONADDR (sys_config.cons_ioaddr[0]) + + +/**/ +struct confargs; + +typedef int (*intr_handler_t)(void *); + +struct abus { + struct device *ab_dv; /* back-pointer to device */ + int ab_type; /* bus type (see below) */ + void *(*ab_intr_establish) /* bus's set-handler function */ + (void *, u_long, int, int, int (*)(void *), void *, char *); + void (*ab_intr_disestablish) /* bus's unset-handler function */ + (void *, void *); + caddr_t (*ab_cvtaddr) /* convert slot/offset to address */ + (struct confargs *); + int (*ab_matchname) /* see if name matches driver */ + (struct confargs *, char *); +}; + +#define BUS_MAIN 1 /* mainbus */ +#define BUS_LOCAL 2 /* localbus */ +#define BUS_ISABR 3 /* ISA Bridge Bus */ +#define BUS_PLCHLDR 4 /* placeholder */ +#define BUS_PCIBR 5 /* PCI bridge Bus */ + +#define BUS_INTR_ESTABLISH(ca, a, b, c, d, e, f, h) \ + (*(ca)->ca_bus->ab_intr_establish)((a),(b),(c),(d),(e),(f),(h)) +#define BUS_INTR_DISESTABLISH(ca) \ + (*(ca)->ca_bus->ab_intr_establish)(ca) +#define BUS_MATCHNAME(ca, name) \ + (((ca)->ca_bus->ab_matchname) ? \ + (*(ca)->ca_bus->ab_matchname)((ca), (name)) : \ + -1) + +struct confargs { + char *ca_name; /* Device name. */ + struct abus *ca_bus; /* Bus device resides on. */ + bus_space_tag_t ca_iot; + bus_space_tag_t ca_memt; + u_int32_t ca_num; /* which system */ + u_int32_t ca_sys; /* which system */ + int ca_nreg; + u_int32_t *ca_reg; + int ca_nintr; + int32_t ca_intr; + bus_addr_t ca_baseaddr; +}; + +int badaddr(void *, u_int64_t); + +#endif /* _MACHINE_AUTOCONF_H_ */ diff --git a/sys/arch/sgi/include/bus.h b/sys/arch/sgi/include/bus.h new file mode 100644 index 00000000000..d1ec5c94d4a --- /dev/null +++ b/sys/arch/sgi/include/bus.h @@ -0,0 +1,428 @@ +/* $OpenBSD: bus.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */ + +/* + * Copyright (c) 2003-2004 Opsycon AB Sweden. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _MACHINE_BUS_H_ +#define _MACHINE_BUS_H_ + +#include <machine/pio.h> + +#ifdef __STDC__ +#define CAT(a,b) a##b +#define CAT3(a,b,c) a##b##c +#else +#define CAT(a,b) a/**/b +#define CAT3(a,b,c) a/**/b/**/c +#endif + +/* + * Bus access types. + */ +struct mips_bus_space; +typedef u_long bus_addr_t; +typedef u_long bus_size_t; +typedef u_long bus_space_handle_t; +typedef struct mips_bus_space *bus_space_tag_t; +typedef struct mips_bus_space bus_space_t; + +struct mips_bus_space { + struct extent *bus_extent; + bus_addr_t bus_base; + bus_addr_t bus_base_dma; + int32_t bus_reverse; + u_int8_t (*_space_read_1)(bus_space_tag_t , bus_space_handle_t, + bus_size_t); + void (*_space_write_1)(bus_space_tag_t , bus_space_handle_t, + bus_size_t, u_int8_t); + u_int16_t (*_space_read_2)(bus_space_tag_t , bus_space_handle_t, + bus_size_t); + void (*_space_write_2)(bus_space_tag_t , bus_space_handle_t, + bus_size_t, u_int16_t); + u_int32_t (*_space_read_4)(bus_space_tag_t , bus_space_handle_t, + bus_size_t); + void (*_space_write_4)(bus_space_tag_t , bus_space_handle_t, + bus_size_t, u_int32_t); + u_int64_t (*_space_read_8)(bus_space_tag_t , bus_space_handle_t, + bus_size_t); + void (*_space_write_8)(bus_space_tag_t , bus_space_handle_t, + bus_size_t, u_int64_t); + int (*_space_map)(bus_space_tag_t , bus_addr_t, + bus_size_t, int, bus_space_handle_t *); + void (*_space_unmap)(bus_space_tag_t, bus_space_handle_t, + bus_size_t); + int (*_space_subregion)(bus_space_tag_t, bus_space_handle_t, + bus_size_t, bus_size_t, bus_space_handle_t *); +}; + +#define bus_space_read_1(t, h, o) (*(t)->_space_read_1)((t), (h), (o)) +#define bus_space_read_2(t, h, o) (*(t)->_space_read_2)((t), (h), (o)) +#define bus_space_read_4(t, h, o) (*(t)->_space_read_4)((t), (h), (o)) +#define bus_space_read_8(t, h, o) (*(t)->_space_read_8)((t), (h), (o)) + +#define bus_space_write_1(t, h, o, v) (*(t)->_space_write_1)((t), (h), (o), (v)) +#define bus_space_write_2(t, h, o, v) (*(t)->_space_write_2)((t), (h), (o), (v)) +#define bus_space_write_4(t, h, o, v) (*(t)->_space_write_4)((t), (h), (o), (v)) +#define bus_space_write_8(t, h, o, v) (*(t)->_space_write_8)((t), (h), (o), (v)) + +#define bus_space_map(t, o, s, c, p) (*(t)->_space_map)((t), (o), (s), (c), (p)) +#define bus_space_unmap(t, h, s) (*(t)->_space_unmap)((t), (h), (s)) +#define bus_space_subregion(t, h, o, s, p) (*(t)->_space_map)((t), (h), (o), (s), (p)) + +/* Helper function in pmap.c */ +int bus_mem_add_mapping(bus_addr_t, bus_size_t, int, bus_space_handle_t *); + + +/*----------------------------------------------------------------------------*/ +#define bus_space_read_multi(n,m) \ +static __inline void \ +CAT(bus_space_read_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ + bus_size_t o, CAT3(u_int,m,_t) *x, size_t cnt) \ +{ \ + while (cnt--) \ + *x++ = CAT(bus_space_read_,n)(bst, bsh, o); \ +} + +bus_space_read_multi(1,8) +bus_space_read_multi(2,16) +bus_space_read_multi(4,32) + +#define bus_space_read_multi_8 !!! bus_space_read_multi_8 not implemented !!! + +/*----------------------------------------------------------------------------*/ +#define bus_space_read_region(n,m) \ +static __inline void \ +CAT(bus_space_read_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ + bus_addr_t ba, CAT3(u_int,m,_t) *x, size_t cnt) \ +{ \ + while (cnt--) \ + *x++ = CAT(bus_space_read_,n)(bst, bsh, ba++); \ +} + +bus_space_read_region(1,8) +bus_space_read_region(2,16) +bus_space_read_region(4,32) + +#define bus_space_read_region_8 !!! bus_space_read_region_8 not implemented !!! + +/*----------------------------------------------------------------------------*/ +#define bus_space_write_multi(n,m) \ +static __inline void \ +CAT(bus_space_write_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ + bus_size_t o, const CAT3(u_int,m,_t) *x, size_t cnt) \ +{ \ + while (cnt--) { \ + CAT(bus_space_write_,n)(bst, bsh, o, *x++); \ + } \ +} + +bus_space_write_multi(1,8) +bus_space_write_multi(2,16) +bus_space_write_multi(4,32) + +#define bus_space_write_multi_8 !!! bus_space_write_multi_8 not implemented !!! + +/*----------------------------------------------------------------------------*/ +#define bus_space_write_region(n,m) \ +static __inline void \ +CAT(bus_space_write_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ + bus_addr_t ba, const CAT3(u_int,m,_t) *x, size_t cnt) \ +{ \ + while (cnt--) { \ + CAT(bus_space_write_,n)(bst, bsh, ba, *x++); \ + ba += sizeof(x); \ + } \ +} + +bus_space_write_region(1,8) +bus_space_write_region(2,16) +bus_space_write_region(4,32) + +#define bus_space_write_region_8 \ + !!! bus_space_write_region_8 not implemented !!! + +/*----------------------------------------------------------------------------*/ +#define bus_space_set_region(n,m) \ +static __inline void \ +CAT(bus_space_set_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ + bus_addr_t ba, CAT3(u_int,m,_t) x, size_t cnt) \ +{ \ + while (cnt--) { \ + CAT(bus_space_write_,n)(bst, bsh, ba, x); \ + ba += sizeof(x); \ + } \ +} + +bus_space_set_region(1,8) +bus_space_set_region(2,16) +bus_space_set_region(4,32) + +/*----------------------------------------------------------------------------*/ +#define bus_space_read_raw_multi(n,m,l) \ +static __inline void \ +CAT(bus_space_read_raw_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ + bus_addr_t ba, u_int8_t *buf, bus_size_t cnt) \ +{ \ + CAT(bus_space_read_multi_,n)(bst, bsh, ba, (CAT3(u_int,m,_t) *)buf, \ + cnt >> l); \ +} + +bus_space_read_raw_multi(2,16,1) +bus_space_read_raw_multi(4,32,2) + +#define bus_space_read_raw_multi_8 \ + !!! bus_space_read_raw_multi_8 not implemented !!! + +/*----------------------------------------------------------------------------*/ +#define bus_space_write_raw_multi(n,m,l) \ +static __inline void \ +CAT(bus_space_write_raw_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,\ + bus_addr_t ba, const u_int8_t *buf, bus_size_t cnt) \ +{ \ + CAT(bus_space_write_multi_,n)(bst, bsh, ba, \ + (const CAT3(u_int,m,_t) *)buf, cnt >> l); \ +} + +bus_space_write_raw_multi(2,16,1) +bus_space_write_raw_multi(4,32,2) + +#define bus_space_write_raw_multi_8 \ + !!! bus_space_write_raw_multi_8 not implemented !!! + +/*----------------------------------------------------------------------------*/ +static __inline void +bus_space_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1, + bus_space_handle_t h2, bus_size_t o2, bus_size_t c) +{ + char *s = (char *)(h1 + o1); + char *d = (char *)(h2 + o2); + + while (c--) + *d++ = *s++; +} + + +static __inline void +bus_space_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1, + bus_space_handle_t h2, bus_size_t o2, bus_size_t c) +{ + short *s = (short *)(h1 + o1); + short *d = (short *)(h2 + o2); + + while (c--) + *d++ = *s++; +} + +static __inline void +bus_space_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1, + bus_space_handle_t h2, bus_size_t o2, bus_size_t c) +{ + int *s = (int *)(h1 + o1); + int *d = (int *)(h2 + o2); + + while (c--) + *d++ = *s++; +} + +#define bus_space_copy_8 \ + !!! bus_space_write_raw_multi_8 not implemented !!! + +/*----------------------------------------------------------------------------*/ +/* + * Bus read/write barrier methods. + * + * void bus_space_barrier(bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * bus_size_t len, int flags); + * + */ +#define bus_space_barrier(t, h, o, l, f) \ + ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) +#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ +#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ +/* Compatibility defines */ +#define BUS_BARRIER_READ BUS_SPACE_BARRIER_READ +#define BUS_BARRIER_WRITE BUS_SPACE_BARRIER_WRITE + + +#define BUS_DMA_WAITOK 0x00 +#define BUS_DMA_NOWAIT 0x01 +#define BUS_DMA_ALLOCNOW 0x02 +#define BUS_DMAMEM_NOSYNC 0x04 +#define BUS_DMA_COHERENT 0x08 +#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */ +#define BUS_DMA_BUS2 0x20 +#define BUS_DMA_BUS3 0x40 +#define BUS_DMA_BUS4 0x80 +#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ +#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ +#define BUS_DMA_STREAMING 0x400 /* hint: sequential, unidirectional */ + +/* Forwards needed by prototypes below. */ +struct mbuf; +struct proc; +struct uio; + +#define BUS_DMASYNC_POSTREAD 0x0001 +#define BUS_DMASYNC_POSTWRITE 0x0002 +#define BUS_DMASYNC_PREREAD 0x0004 +#define BUS_DMASYNC_PREWRITE 0x0008 +typedef int bus_dmasync_op_t; + +typedef struct machine_bus_dma_tag *bus_dma_tag_t; +typedef struct machine_bus_dmamap *bus_dmamap_t; + +/* + * bus_dma_segment_t + * + * Describes a single contiguous DMA transaction. Values + * are suitable for programming into DMA registers. + */ +struct machine_bus_dma_segment { + bus_addr_t ds_addr; /* DMA address */ + bus_addr_t ds_vaddr; /* CPU address */ + bus_size_t ds_len; /* length of transfer */ +}; +typedef struct machine_bus_dma_segment bus_dma_segment_t; + +/* + * bus_dma_tag_t + * + * A machine-dependent opaque type describing the implementation of + * DMA for a given bus. + */ + +struct machine_bus_dma_tag { + void *_cookie; /* cookie used in the guts */ + + /* + * DMA mapping methods. + */ + int (*_dmamap_create)(bus_dma_tag_t , bus_size_t, int, + bus_size_t, bus_size_t, int, bus_dmamap_t *); + void (*_dmamap_destroy)(bus_dma_tag_t , bus_dmamap_t); + int (*_dmamap_load)(bus_dma_tag_t , bus_dmamap_t, void *, + bus_size_t, struct proc *, int); + int (*_dmamap_load_mbuf)(bus_dma_tag_t , bus_dmamap_t, + struct mbuf *, int); + int (*_dmamap_load_uio)(bus_dma_tag_t , bus_dmamap_t, + struct uio *, int); + int (*_dmamap_load_raw)(bus_dma_tag_t , bus_dmamap_t, + bus_dma_segment_t *, int, bus_size_t, int); + void (*_dmamap_unload)(bus_dma_tag_t , bus_dmamap_t); + void (*_dmamap_sync)(bus_dma_tag_t , bus_dmamap_t, + bus_addr_t, bus_size_t, int); + + /* + * DMA memory utility functions. + */ + int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, + bus_size_t, bus_dma_segment_t *, int, int *, int); + void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int); + int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, + int, size_t, caddr_t *, int); + void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t); + paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, + int, off_t, int, int); + paddr_t dma_offs; +}; + +#define bus_dmamap_create(t, s, n, m, b, f, p) \ + (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) +#define bus_dmamap_destroy(t, p) \ + (*(t)->_dmamap_destroy)((t), (p)) +#define bus_dmamap_load(t, m, b, s, p, f) \ + (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) +#define bus_dmamap_load_mbuf(t, m, b, f) \ + (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) +#define bus_dmamap_load_uio(t, m, u, f) \ + (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) +#define bus_dmamap_load_raw(t, m, sg, n, s, f) \ + (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) +#define bus_dmamap_unload(t, p) \ + (*(t)->_dmamap_unload)((t), (p)) +#define bus_dmamap_sync(t, p, a, l, o) \ + (void)((t)->_dmamap_sync ? \ + (*(t)->_dmamap_sync)((t), (p), (a), (l), (o)) : (void)0) + +#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ + (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) +#define bus_dmamem_free(t, sg, n) \ + (*(t)->_dmamem_free)((t), (sg), (n)) +#define bus_dmamem_map(t, sg, n, s, k, f) \ + (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) +#define bus_dmamem_unmap(t, k, s) \ + (*(t)->_dmamem_unmap)((t), (k), (s)) +#define bus_dmamem_mmap(t, sg, n, o, p, f) \ + (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) + +int _dmamap_create(bus_dma_tag_t, bus_size_t, int, + bus_size_t, bus_size_t, int, bus_dmamap_t *); +void _dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); +int _dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, + bus_size_t, struct proc *, int); +int _dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int); +int _dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int); +int _dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, + bus_dma_segment_t *, int, bus_size_t, int); +void _dmamap_unload(bus_dma_tag_t, bus_dmamap_t); +void _dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, + bus_size_t, int); + +int _dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, + bus_size_t, bus_dma_segment_t *, int, int *, int); +void _dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int); +int _dmamem_map(bus_dma_tag_t, bus_dma_segment_t *, + int, size_t, caddr_t *, int); +void _dmamem_unmap(bus_dma_tag_t, caddr_t, size_t); +paddr_t _dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, off_t, int, int); +int _dmamem_alloc_range(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, + bus_dma_segment_t *, int, int *, int, vaddr_t, vaddr_t); + +/* + * bus_dmamap_t + * + * Describes a DMA mapping. + */ +struct machine_bus_dmamap { + /* + * PRIVATE MEMBERS: not for use by machine-independent code. + */ + bus_size_t _dm_size; /* largest DMA transfer mappable */ + int _dm_segcnt; /* number of segs this map can map */ + bus_size_t _dm_maxsegsz; /* largest possible segment */ + bus_size_t _dm_boundary; /* don't cross this */ + int _dm_flags; /* misc. flags */ + + void *_dm_cookie; /* cookie for bus-specific functions */ + + /* + * PUBLIC MEMBERS: these are used by machine-independent code. + */ + bus_size_t dm_mapsize; /* size of the mapping */ + int dm_nsegs; /* # valid segments in mapping */ + bus_dma_segment_t dm_segs[1]; /* segments; variable length */ +}; + +#endif /* _MACHINE_BUS_H_ */ diff --git a/sys/arch/sgi/include/cdefs.h b/sys/arch/sgi/include/cdefs.h new file mode 100644 index 00000000000..476278fafec --- /dev/null +++ b/sys/arch/sgi/include/cdefs.h @@ -0,0 +1,5 @@ +/* $OpenBSD: cdefs.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/cdefs.h> diff --git a/sys/arch/sgi/include/cpu.h b/sys/arch/sgi/include/cpu.h new file mode 100644 index 00000000000..2c56835ee63 --- /dev/null +++ b/sys/arch/sgi/include/cpu.h @@ -0,0 +1,6 @@ +/* $OpenBSD: cpu.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/cpu.h> + diff --git a/sys/arch/sgi/include/cpustate.h b/sys/arch/sgi/include/cpustate.h new file mode 100644 index 00000000000..d915f5c2428 --- /dev/null +++ b/sys/arch/sgi/include/cpustate.h @@ -0,0 +1,3 @@ +/* $OpenBSD: cpustate.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */ + +#include <mips64/cpustate.h> diff --git a/sys/arch/sgi/include/db_machdep.h b/sys/arch/sgi/include/db_machdep.h new file mode 100644 index 00000000000..43621cb7c22 --- /dev/null +++ b/sys/arch/sgi/include/db_machdep.h @@ -0,0 +1,5 @@ +/* $OpenBSD: db_machdep.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/db_machdep.h> diff --git a/sys/arch/sgi/include/disklabel.h b/sys/arch/sgi/include/disklabel.h new file mode 100644 index 00000000000..8e56377a893 --- /dev/null +++ b/sys/arch/sgi/include/disklabel.h @@ -0,0 +1,110 @@ +/* $OpenBSD: disklabel.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ +/* $NetBSD: disklabel.h,v 1.3 1996/03/09 20:52:54 ghudson Exp $ */ + +/* + * Copyright (c) 1994 Christopher G. Demetriou + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Christopher G. Demetriou. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _MACHINE_DISKLABEL_H_ +#define _MACHINE_DISKLABEL_H_ + +#define LABELSECTOR 1 /* sector containing label */ +#define LABELOFFSET 0 /* offset of label in sector */ +#define MAXPARTITIONS 16 /* number of partitions */ +#define RAW_PART 2 /* raw partition: ie. rsd0c */ + +/* DOS partition table -- located in boot block */ +#define DOSBBSECTOR 0 /* DOS boot block relative sector # */ +#define DOSPARTOFF 446 +#define DOSACTIVE 0x80 +#define NDOSPART 4 +#define DOSMBR_SIGNATURE 0xAA55 +#define DOSMBR_SIGNATURE_OFF 0x1FE + +struct dos_partition { + u_int8_t dp_flag; /* bootstrap flags */ + u_int8_t dp_shd; /* starting head */ + u_int8_t dp_ssect; /* starting sector */ + u_int8_t dp_scyl; /* starting cylinder */ + u_int8_t dp_typ; /* partition type (see below) */ + u_int8_t dp_ehd; /* end head */ + u_int8_t dp_esect; /* end sector */ + u_int8_t dp_ecyl; /* end cylinder */ + u_int32_t dp_start; /* absolute starting sector number */ + u_int32_t dp_size; /* partition size in sectors */ +}; + +/* Known DOS partition types. */ +#define DOSPTYP_UNUSED 0x00 /* Unused partition */ +#define DOSPTYP_FAT12 0x01 /* 12-bit FAT */ +#define DOSPTYP_FAT16S 0x04 /* 16-bit FAT, less than 32M */ +#define DOSPTYP_EXTEND 0x05 /* Extended; contains sub-partitions */ +#define DOSPTYP_FAT16B 0x06 /* 16-bit FAT, more than 32M */ +#define DOSPTYP_FAT32 0x0b /* 32-bit FAT */ +#define DOSPTYP_FAT32L 0x0c /* 32-bit FAT, LBA-mapped */ +#define DOSPTYP_FAT16L 0x0e /* 16-bit FAT, LBA-mapped */ +#define DOSPTYP_ONTRACK 0x54 +#define DOSPTYP_EXTENDL 0x0f /* Extended, LBA-mapped; contains sub-partitions */ +#define DOSPTYP_LINUX 0x83 /* That other thing */ +#define DOSPTYP_FREEBSD 0xa5 /* FreeBSD partition type */ +#define DOSPTYP_OPENBSD 0xa6 /* OpenBSD partition type */ +#define DOSPTYP_NETBSD 0xa9 /* NetBSD partition type */ + +#include <sys/dkbad.h> +struct cpu_disklabel { + struct dos_partition dosparts[NDOSPART]; + struct dkbad bad; +}; + +#define DKBAD(x) ((x)->bad) + +/* Isolate the relevant bits to get sector and cylinder. */ +#define DPSECT(s) ((s) & 0x3f) +#define DPCYL(c, s) ((c) + (((s) & 0xc0) << 2)) + +static __inline u_int32_t get_le __P((void *)); + +static __inline u_int32_t +#ifdef __cplusplus +get_le(void *p) +#else +get_le(p) + void *p; +#endif +{ + u_int8_t *_p = (u_int8_t *)p; + u_int32_t x; + x = _p[0]; + x |= _p[1] << 8; + x |= _p[2] << 16; + x |= _p[3] << 24; + return x; +} + +#endif /* _MACHINE_DISKLABEL_H_ */ diff --git a/sys/arch/sgi/include/dlfcn.h b/sys/arch/sgi/include/dlfcn.h new file mode 100644 index 00000000000..815cef633e1 --- /dev/null +++ b/sys/arch/sgi/include/dlfcn.h @@ -0,0 +1,5 @@ +/* $OpenBSD: dlfcn.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/dlfcn.h> diff --git a/sys/arch/sgi/include/ecoff_machdep.h b/sys/arch/sgi/include/ecoff_machdep.h new file mode 100644 index 00000000000..23bd9003d24 --- /dev/null +++ b/sys/arch/sgi/include/ecoff_machdep.h @@ -0,0 +1,5 @@ +/* $OpenBSD: ecoff_machdep.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/ecoff_machdep.h> diff --git a/sys/arch/sgi/include/endian.h b/sys/arch/sgi/include/endian.h new file mode 100644 index 00000000000..82fa9b6a860 --- /dev/null +++ b/sys/arch/sgi/include/endian.h @@ -0,0 +1,3 @@ +/* $OpenBSD: endian.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +#include <mips64/endian.h> diff --git a/sys/arch/sgi/include/exec.h b/sys/arch/sgi/include/exec.h new file mode 100644 index 00000000000..256af3ea9dd --- /dev/null +++ b/sys/arch/sgi/include/exec.h @@ -0,0 +1,177 @@ +/* $OpenBSD: exec.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* + * Copyright (c) 1996-2003 Per Fogelstrom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed under OpenBSD by + * Per Fogelstrom. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#ifndef _MIPS_EXEC_H_ +#define _MIPS_EXEC_H_ + +#define __LDPGSZ 4096 + +/* + * Define what exec "formats" we should handle. + */ +#define NATIVE_EXEC_ELF +#define EXEC_SCRIPT + +#define ARCH_ELFSIZE 32 + +#define ELF_TARG_CLASS ELFCLASS32 +#if defined(__MIPSEB__) +#define ELF_TARG_DATA ELFDATA2MSB +#else +#define ELF_TARG_DATA ELFDATA2LSB +#endif +#define ELF_TARG_MACH EM_MIPS + +#define _NLIST_DO_ELF +#define _NLIST_DO_ECOFF + +#define _KERN_DO_ECOFF /* XXX obsolete */ +#define _KERN_DO_ELF +#if defined(_LP64) +#define _KERN_DO_ELF64 +#endif + +/* Information taken from MIPS ABI supplemental */ + +/* Architecture dependent Segment types - p_type */ +#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */ + +/* Architecture dependent d_tag field for Elf32_Dyn. */ +#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime Linker Interface ID */ +#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */ +#define DT_MIPS_ICHECKSUM 0x70000003 /* Cksum of ext. str. and com. sizes */ +#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */ +#define DT_MIPS_FLAGS 0x70000005 /* Flags */ +#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Segment base address */ +#define DT_MIPS_CONFLICT 0x70000008 /* Adr of .conflict section */ +#define DT_MIPS_LIBLIST 0x70000009 /* Address of .liblist section */ +#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local .GOT entries */ +#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of .conflict entries */ +#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of .liblist entries */ +#define DT_MIPS_SYMTABNO 0x70000011 /* Number of .dynsym entries */ +#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */ +#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in .dynsym */ +#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */ +#define DT_MIPS_RLD_MAP 0x70000016 /* Address of debug map pointer */ + +#define DT_PROCNUM (DT_MIPS_RLD_MAP - DT_LOPROC + 1) + +/* + * Legal values for e_flags field of Elf32_Ehdr. + */ +#define EF_MIPS_NOREORDER 0x00000001 /* .noreorder was used */ +#define EF_MIPS_PIC 0x00000002 /* Contains PIC code */ +#define EF_MIPS_CPIC 0x00000004 /* Uses PIC calling sequence */ +#define EF_MIPS_ABI2 0x00000020 /* -n32 on Irix 6 */ +#define EF_MIPS_32BITMODE 0x00000100 /* 64 bit in 32 bit mode... */ +#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */ +#define E_MIPS_ARCH_1 0x00000000 +#define E_MIPS_ARCH_2 0x10000000 +#define E_MIPS_ARCH_3 0x20000000 +#define E_MIPS_ARCH_4 0x30000000 +#define EF_MIPS_ABI 0x0000f000 /* ABI level */ +#define E_MIPS_ABI_NONE 0x00000000 /* ABI level not set */ +#define E_MIPS_ABI_O32 0x00001000 +#define E_MIPS_ABI_O64 0x00002000 +#define E_MIPS_ABI_EABI32 0x00004000 +#define E_MIPS_ABI_EABI64 0x00004000 + +/* + * Mips special sections. + */ +#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */ +#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */ +#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */ + +/* + * Legal values for sh_type field of Elf32_Shdr. + */ +#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */ +#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */ +#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */ +#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */ +#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information */ +#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */ + +/* + * Legal values for sh_flags field of Elf32_Shdr. + */ +#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */ + +#if 0 +/* + * Entries found in sections of type SHT_MIPS_GPTAB. + */ +typedef union { + struct { + Elf32_Word gt_current_g_value; /* -G val used in compilation */ + Elf32_Word gt_unused; /* Not used */ + } gt_header; /* First entry in section */ + struct { + Elf32_Word gt_g_value; /* If this val were used for -G */ + Elf32_Word gt_bytes; /* This many bytes would be used */ + } gt_entry; /* Subsequent entries in section */ +} Elf32_gptab; + +/* + * Entry found in sections of type SHT_MIPS_REGINFO. + */ +typedef struct { + Elf32_Word ri_gprmask; /* General registers used */ + Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */ + Elf32_Sword ri_gp_value; /* $gp register value */ +} Elf32_RegInfo; +#endif + + +/* + * Mips relocations. + */ + +#define R_MIPS_NONE 0 /* No reloc */ +#define R_MIPS_16 1 /* Direct 16 bit */ +#define R_MIPS_32 2 /* Direct 32 bit */ +#define R_MIPS_REL32 3 /* PC relative 32 bit */ +#define R_MIPS_26 4 /* Direct 26 bit shifted */ +#define R_MIPS_HI16 5 /* High 16 bit */ +#define R_MIPS_LO16 6 /* Low 16 bit */ +#define R_MIPS_GPREL16 7 /* GP relative 16 bit */ +#define R_MIPS_LITERAL 8 /* 16 bit literal entry */ +#define R_MIPS_GOT16 9 /* 16 bit GOT entry */ +#define R_MIPS_PC16 10 /* PC relative 16 bit */ +#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */ +#define R_MIPS_GPREL32 12 /* GP relative 32 bit */ + + +#endif /* !_MIPS_EXEC_H_ */ diff --git a/sys/arch/sgi/include/float.h b/sys/arch/sgi/include/float.h new file mode 100644 index 00000000000..6d6aefba17c --- /dev/null +++ b/sys/arch/sgi/include/float.h @@ -0,0 +1,5 @@ +/* $OpenBSD: float.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/float.h> diff --git a/sys/arch/sgi/include/frame.h b/sys/arch/sgi/include/frame.h new file mode 100644 index 00000000000..86edb4c0a9b --- /dev/null +++ b/sys/arch/sgi/include/frame.h @@ -0,0 +1,5 @@ +/* $OpenBSD: frame.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/frame.h> diff --git a/sys/arch/sgi/include/ieee.h b/sys/arch/sgi/include/ieee.h new file mode 100644 index 00000000000..53af586b1a9 --- /dev/null +++ b/sys/arch/sgi/include/ieee.h @@ -0,0 +1,5 @@ +/* $OpenBSD: ieee.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/ieee.h> diff --git a/sys/arch/sgi/include/ieeefp.h b/sys/arch/sgi/include/ieeefp.h new file mode 100644 index 00000000000..3bf6eca07a6 --- /dev/null +++ b/sys/arch/sgi/include/ieeefp.h @@ -0,0 +1,5 @@ +/* $OpenBSD: ieeefp.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/ieeefp.h> diff --git a/sys/arch/sgi/include/internal_types.h b/sys/arch/sgi/include/internal_types.h new file mode 100644 index 00000000000..ecfa665964e --- /dev/null +++ b/sys/arch/sgi/include/internal_types.h @@ -0,0 +1,3 @@ +/* $OpenBSD: internal_types.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +#include <mips64/internal_types.h> diff --git a/sys/arch/sgi/include/intr.h b/sys/arch/sgi/include/intr.h new file mode 100644 index 00000000000..23754885270 --- /dev/null +++ b/sys/arch/sgi/include/intr.h @@ -0,0 +1,258 @@ +/* $OpenBSD: intr.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* + * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#ifndef _MACHINE_INTR_H_ +#define _MACHINE_INTR_H_ + +/* + * The interrupt mask cpl is a mask which can be used with the + * CPU interrupt mask register or an external HW mask register. + * If interrupts are masked by the CPU interrupt mask all external + * masks should be enabled and any routing set up so that the + * interrupt source is routed to the CPU interrupt corresponding + * to the interrupts "priority level". In this case the generic + * interrupt handler can be used. + * + * The IMASK_EXTERNAL define is used to select wether the CPU + * interrupt mask should be controlled by the cpl mask value + * or not. If the mask is external, the CPU mask is never changed + * from the value it gets when interrupt dispatchers are registred. + * When an external masking register is used dedicated interrupt + * handlers must be written as well as ipending handlers. + */ +#define IMASK_EXTERNAL /* XXX move this to config */ + + + +/* Interrupt priority `levels'; not mutually exclusive. */ +#define IPL_BIO 0 /* block I/O */ +#define IPL_NET 1 /* network */ +#define IPL_TTY 2 /* terminal */ +#define IPL_VM 3 /* memory allocation */ +#define IPL_CLOCK 4 /* clock */ +#define IPL_NONE 5 /* nothing */ +#define IPL_HIGH 6 /* everything */ +#define NIPLS 7 /* Number of levels */ + +/* Interrupt sharing types. */ +#define IST_NONE 0 /* none */ +#define IST_PULSE 1 /* pulsed */ +#define IST_EDGE 2 /* edge-triggered */ +#define IST_LEVEL 3 /* level-triggered */ + +/* Soft interrupt masks. */ +#define SINT_CLOCK 31 +#define SINT_CLOCKMASK (1 << SINT_CLOCK) +#define SINT_NET 30 +#define SINT_NETMASK ((1 << SINT_NET) | SINT_CLOCKMASK) +#define SINT_TTY 29 +#define SINT_TTYMASK ((1 << SINT_TTY) | SINT_CLOCKMASK) +#define SINT_ALLMASK (SINT_CLOCKMASK | SINT_NETMASK | SINT_TTYMASK) +#define SPL_CLOCK 28 +#define SPL_CLOCKMASK (1 << SPL_CLOCK) + +#ifndef _LOCORE + +#if 1 +#define splbio() splraise(imask[IPL_BIO]) +#define splnet() splraise(imask[IPL_NET]) +#define spltty() splraise(imask[IPL_TTY]) +#define splclock() splraise(SPL_CLOCKMASK|SINT_ALLMASK) +#define splimp() splraise(imask[IPL_VM]) +#define splvm() splraise(imask[IPL_VM]) +#define splsoftclock() splraise(SINT_CLOCKMASK) +#define splsoftnet() splraise(SINT_NETMASK|SINT_CLOCKMASK) +#define splsofttty() splraise(SINT_TTYMASK) +#else +#define splbio() splhigh() +#define splnet() splhigh() +#define spltty() splhigh() +#define splclock() splhigh() +#define splimp() splhigh() +#define splvm() splhigh() +#define splsoftclock() splhigh() +#define splsoftnet() splhigh() +#define splsofttty() splhigh() +#endif +#define splstatclock() splhigh() +#define splhigh() splraise(-1) +#define spl0() spllower(0) +#define spllowersoftclock() spllower(SINT_CLOCKMASK) + + +#define setsoftclock() set_sint(SINT_CLOCKMASK); +#define setsoftnet() set_sint(SINT_NETMASK); +#define setsofttty() set_sint(SINT_TTYMASK); + +void splinit(void); + +#define splassert(X) + +/* + * Schedule prioritys for base interrupts (cpu) + */ +#define INTPRI_CLOCK 1 +#define INTPRI_MACEIO 2 +#define INTPRI_MACEAUX 3 + +/* + * Define a type for interrupt masks. We may need 64 bits here. + */ +typedef u_int32_t intrmask_t; /* Type of var holding interrupt mask */ + +#define INTMASKSIZE (sizeof(intrmask_t) * 8) + +void clearsoftclock(void); +void clearsoftnet(void); +#if 0 +void clearsofttty(void); +#endif + + +volatile intrmask_t cpl; +volatile intrmask_t ipending, astpending; + +intrmask_t imask[NIPLS]; + +/* + * A note on clock interrupts. Clock interrupts are always + * allowed to happen but will not be serviced if masked. + * The reason for this is that clocks usually sits on INT5 + * and can not be easily masked if external HW masking is used. + */ + +/* Inlines */ +static __inline void register_pending_int_handler(void (*)(void)); +static __inline int splraise(int newcpl); +static __inline void splx(int newcpl); +static __inline int spllower(int newcpl); + +typedef void (void_f) (void); +void_f *pending_hand; + +static __inline void +register_pending_int_handler(void(*pending)(void)) +{ + pending_hand = pending; +} + +/* + */ +static __inline int +splraise(int newcpl) +{ + int oldcpl; + + __asm__ (" .set noreorder\n"); + oldcpl = cpl; + cpl = oldcpl | newcpl; + __asm__ (" sync\n .set reorder\n"); + return(oldcpl); +} + +static __inline void +splx(int newcpl) +{ + cpl = newcpl; + if((ipending & ~newcpl) && (pending_hand != NULL)) { + (*pending_hand)(); + } +} + +static __inline int +spllower(int newcpl) +{ + int oldcpl; + + oldcpl = cpl; + cpl = newcpl; + if((ipending & ~newcpl) && (pending_hand != NULL)) { + (*pending_hand)(); + } + return(oldcpl); +} + +/* + * Atomically update ipending. + */ +void set_sint(int pending); + +/* + * Interrupt control struct used by interrupt dispatchers + * to hold interrupt handler info. + */ + +struct intrhand { + struct intrhand *ih_next; + int (*ih_fun)(void *); + void *ih_arg; + u_long ih_count; + int ih_level; + int ih_irq; + char *ih_what; + void *frame; +}; + +/* + * Low level interrupt dispatcher registration data. + */ +#define NLOWINT 16 /* Number of low level registrations possible */ + +struct trap_frame; + +struct { + intrmask_t int_mask; + intrmask_t (*int_hand)(intrmask_t, struct trap_frame *); +} cpu_int_tab[NLOWINT]; + +intrmask_t idle_mask; +int last_low_int; + +void set_intr(int, intrmask_t, intrmask_t(*)(intrmask_t, struct trap_frame *)); + +#ifdef IMASK_EXTERNAL +void hw_setintrmask(intrmask_t); +extern void *hwmask_addr; +#endif + +/* + * Generic interrupt handling code that can be used for simple + * interrupt hardware models. Functions can also be used by + * more complex code especially the mask calculation code. + */ + +void *generic_intr_establish(void *, u_long, int, int, + int (*) __P((void *)), void *, char *); +void generic_intr_disestablish(void *, void *); +void generic_intr_makemasks(void); +void generic_do_pending_int(void); +intrmask_t generic_iointr(intrmask_t, struct trap_frame *); + +#endif /* _LOCORE */ + +#endif /* _MACHINE_INTR_H_ */ diff --git a/sys/arch/sgi/include/kbdreg.h b/sys/arch/sgi/include/kbdreg.h new file mode 100644 index 00000000000..5bcfc60ff8d --- /dev/null +++ b/sys/arch/sgi/include/kbdreg.h @@ -0,0 +1,82 @@ +/* $OpenBSD: kbdreg.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* + * Copyright (c) 1996 Per Fogelstrom + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Per Fogelstrom. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* + * Keyboard definitions + * + */ + +#define KBSTATP (0x61) /* controller status port (I) */ +#define KBS_DIB 0x01 /* data in buffer */ +#define KBS_IBF 0x02 /* input buffer low */ +#define KBS_WARM 0x04 /* input buffer low */ +#define KBS_OCMD 0x08 /* output buffer has command */ +#define KBS_NOSEC 0x10 /* security lock not engaged */ +#define KBS_PMS 0x20 /* mouse data */ +#define KBS_RERR 0x40 /* receive error */ +#define KBS_PERR 0x80 /* parity error */ + +#define KBCMDP (0x61) /* controller port (O) */ +#define KBDATAP (0x60) /* data port (I) */ +#define KBOUTP (0x60) /* data port (O) */ + +#define K_RDCMDBYTE 0x20 +#define K_LDCMDBYTE 0x60 + +#define KC8_TRANS 0x40 /* convert to old scan codes */ +#define KC8_MDISABLE 0x20 /* disable mouse */ +#define KC8_KDISABLE 0x10 /* disable keyboard */ +#define KC8_IGNSEC 0x08 /* ignore security lock */ +#define KC8_CPU 0x04 /* exit from protected mode reset */ +#define KC8_MENABLE 0x02 /* enable mouse interrupt */ +#define KC8_KENABLE 0x01 /* enable keyboard interrupt */ +#define CMDBYTE (KC8_TRANS|KC8_CPU|KC8_MENABLE|KC8_KENABLE) + +/* keyboard commands */ +#define KBC_RESET 0xFF /* reset the keyboard */ +#define KBC_RESEND 0xFE /* request the keyboard resend the last byte */ +#define KBC_SETDEFAULT 0xF6 /* resets keyboard to its power-on defaults */ +#define KBC_DISABLE 0xF5 /* as per KBC_SETDEFAULT, but also disable key scanning */ +#define KBC_ENABLE 0xF4 /* enable key scanning */ +#define KBC_TYPEMATIC 0xF3 /* set typematic rate and delay */ +#define KBC_SETTABLE 0xF0 /* set scancode translation table */ +#define KBC_MODEIND 0xED /* set mode indicators (i.e. LEDs) */ +#define KBC_ECHO 0xEE /* request an echo from the keyboard */ + +/* keyboard responses */ +#define KBR_EXTENDED 0xE0 /* extended key sequence */ +#define KBR_RESEND 0xFE /* needs resend of command */ +#define KBR_ACK 0xFA /* received a valid command */ +#define KBR_OVERRUN 0x00 /* flooded */ +#define KBR_FAILURE 0xFD /* diagnosic failure */ +#define KBR_BREAK 0xF0 /* break code prefix - sent on key release */ +#define KBR_RSTDONE 0xAA /* reset complete */ +#define KBR_ECHO 0xEE /* echo response */ diff --git a/sys/arch/sgi/include/kcore.h b/sys/arch/sgi/include/kcore.h new file mode 100644 index 00000000000..35f8b8090e6 --- /dev/null +++ b/sys/arch/sgi/include/kcore.h @@ -0,0 +1,5 @@ +/* $OpenBSD: kcore.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/kcore.h> diff --git a/sys/arch/sgi/include/kdbparam.h b/sys/arch/sgi/include/kdbparam.h new file mode 100644 index 00000000000..96e687c8acc --- /dev/null +++ b/sys/arch/sgi/include/kdbparam.h @@ -0,0 +1,5 @@ +/* $OpenBSD: kdbparam.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/kdbparam.h> diff --git a/sys/arch/sgi/include/limits.h b/sys/arch/sgi/include/limits.h new file mode 100644 index 00000000000..d9c3dc1468c --- /dev/null +++ b/sys/arch/sgi/include/limits.h @@ -0,0 +1,5 @@ +/* $OpenBSD: limits.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/limits.h> diff --git a/sys/arch/sgi/include/link.h b/sys/arch/sgi/include/link.h new file mode 100644 index 00000000000..d6638b93bda --- /dev/null +++ b/sys/arch/sgi/include/link.h @@ -0,0 +1,5 @@ +/* $OpenBSD: link.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/link.h> diff --git a/sys/arch/sgi/include/loadfile_machdep.h b/sys/arch/sgi/include/loadfile_machdep.h new file mode 100644 index 00000000000..d0e5940445b --- /dev/null +++ b/sys/arch/sgi/include/loadfile_machdep.h @@ -0,0 +1,63 @@ +/* $OpenBSD: loadfile_machdep.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ +/* $NetBSD: loadfile_machdep.h,v 1.2 2001/10/31 17:20:49 thorpej Exp $ */ + +/*- + * Copyright (c) 1999 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Christos Zoulas. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _SGIMIPS_LOADFILE_MACHDEP_H_ +#define _SGIMIPS_LOADFILE_MACHDEP_H_ + +#define BOOT_AOUT +#define BOOT_ECOFF +#define BOOT_ELF32 + +#define LOAD_KERNEL (LOAD_ALL & ~LOAD_TEXTA) +#define COUNT_KERNEL (COUNT_ALL & ~COUNT_TEXTA) + +#define LOADADDR(a) (((u_long)(a)) + offset) +#define ALIGNENTRY(a) ((u_long)(a)) +#define READ(f, b, c) read((f), (void *)LOADADDR(b), (c)) +#define BCOPY(s, d, c) memcpy((void *)LOADADDR(d), (void *)(s), (c)) +#define BZERO(d, c) memset((void *)LOADADDR(d), 0, (c)) +#define WARN(a) (void)(printf a, \ + printf((errno ? ": %s\n" : "\n"), \ + strerror(errno))) +#define PROGRESS(a) (void) printf a +#define ALLOC(a) alloc(a) +#define FREE(a, b) free(a, b) +#define OKMAGIC(a) ((a) == OMAGIC) + +#endif /* !_SGIMIPS_LOADFILE_MACHDEP_H_ */ diff --git a/sys/arch/sgi/include/m48t37.h b/sys/arch/sgi/include/m48t37.h new file mode 100644 index 00000000000..02b70e4cad6 --- /dev/null +++ b/sys/arch/sgi/include/m48t37.h @@ -0,0 +1,68 @@ +#include <sys/endian.h> +/* + * M48T37Y TOD Registers + */ + +#ifndef _LOCORE +typedef struct { + unsigned char flags; + unsigned char century; + unsigned char alarm_secs; + unsigned char alarm_mins; + unsigned char alarm_hours; + unsigned char interrupts; + unsigned char watchdog; + unsigned char control; + unsigned char seconds; + unsigned char minutes; + unsigned char hour; + unsigned char day; + unsigned char date; + unsigned char month; + unsigned char year; +} plddev; + +#endif + +#define TOD_FLAG 0 +#define TOD_CENTURY 1 +#define TOD_ALRM_SECS 2 +#define TOD_ALRM_MINS 3 +#define TOD_ALRM_HRS 4 +#define TOD_ALRM_DATE 5 +#define TOD_INTS 6 +#define TOD_WDOG 7 +#define TOD_CTRL 8 +#define TOD_SECOND 9 +#define TOD_MINUTE 10 +#define TOD_HOUR 11 +#define TOD_DAY 12 +#define TOD_DATE 13 +#define TOD_MONTH 14 +#define TOD_YEAR 15 + +#define TOD_FLAG_WDF (1 << 7) /* Watchdog Flag */ +#define TOD_FLAG_AF (1 << 6) /* Alarm Flag */ +#define TOD_FLAG_BL (1 << 4) /* Battery Low Flag */ + +#define TOD_ALRM_SECS_RPT1 (1 << 7) /* Alarm Repeat Mode Bit 1 */ +#define TOD_ALRM_MINS_RPT2 (1 << 7) /* Alarm Repeat Mode Bit 2 */ +#define TOD_ALRM_HRS_RPT3 (1 << 7) /* Alarm Repeat Mode Bit 3 */ +#define TOD_ALRM_DATE_RPT4 (1 << 7) /* Alarm Repeat Mode Bit 4 */ + +#define TOD_INTS_AFE (1 << 7) /* Alarm Flag Enable */ +#define TOD_INTS_ABE (1 << 5) /* Alarm Battery Backup Mode Enable */ + +#define TOD_WDOG_WDS (1 << 7) /* Watchdog Steering */ +#define TOD_WDOG_BMB (31 << 2) /* Watchdog Multiplier */ +#define TOD_WDOG_RB (3 << 2) /* Watchdog Resolution */ + +#define TOD_CTRL_W (1 << 7) /* Write Bit */ +#define TOD_CTRL_R (1 << 6) /* Read Bit */ +#define TOD_CTRL_S (1 << 5) /* Sign Bit */ +#define TOD_CTRL_CAL (31 << 0) /* Calibration */ + +#define TOD_SECOND_ST (1 << 7) /* Stop Bit */ + +#define TOD_DAY_FT (1 << 6) /* Frequency Test */ + diff --git a/sys/arch/sgi/include/memconf.h b/sys/arch/sgi/include/memconf.h new file mode 100644 index 00000000000..0c67ae975bd --- /dev/null +++ b/sys/arch/sgi/include/memconf.h @@ -0,0 +1,5 @@ +/* $OpenBSD: memconf.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/memconf.h> diff --git a/sys/arch/sgi/include/mips_opcode.h b/sys/arch/sgi/include/mips_opcode.h new file mode 100644 index 00000000000..c9ed582317e --- /dev/null +++ b/sys/arch/sgi/include/mips_opcode.h @@ -0,0 +1,5 @@ +/* $OpenBSD: mips_opcode.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/mips_opcode.h> diff --git a/sys/arch/sgi/include/mouse.h b/sys/arch/sgi/include/mouse.h new file mode 100644 index 00000000000..de439d840aa --- /dev/null +++ b/sys/arch/sgi/include/mouse.h @@ -0,0 +1,52 @@ +/* $OpenBSD: mouse.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ +/* $NetBSD: mouse.h,v 1.4 1994/10/27 04:16:10 cgd Exp $ */ + +/*- + * Copyright (c) 1992, 1993 Erik Forsberg. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _MOUSE_H_ +#define _MOUSE_H_ + +struct mouseinfo { + unsigned char status; + char xmotion, ymotion; +}; + +#define BUTSTATMASK 0x07 /* Any mouse button down if any bit set */ +#define BUTCHNGMASK 0x38 /* Any mouse button changed if any bit set */ + +#define BUT3STAT 0x01 /* Button 3 down if set */ +#define BUT2STAT 0x02 /* Button 2 down if set */ +#define BUT1STAT 0x04 /* Button 1 down if set */ +#define BUT3CHNG 0x08 /* Button 3 changed if set */ +#define BUT2CHNG 0x10 /* Button 2 changed if set */ +#define BUT1CHNG 0x20 /* Button 1 changed if set */ +#define MOVEMENT 0x40 /* Mouse movement detected */ + +/* Ioctl definitions */ + +#define MOUSEIOC ('M'<<8) +#define MOUSEIOCREAD (MOUSEIOC|60) +#define MOUSEIOCSRAW (MOUSEIOC|61) +#define MOUSEIOCSCOOKED (MOUSEIOC|62) + +#endif /* !_MOUSE_H_ */ diff --git a/sys/arch/sgi/include/param.h b/sys/arch/sgi/include/param.h new file mode 100644 index 00000000000..785c14acede --- /dev/null +++ b/sys/arch/sgi/include/param.h @@ -0,0 +1,49 @@ +/* $OpenBSD: param.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* + * Copyright (c) 2003 Opsycon AB (www.opsycon.se / www.opsycon.com) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Opsycon AB, Sweden. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#ifndef _MACHINE_PARAM_H_ +#define _MACHINE_PARAM_H_ + +/* + * Machine dependent constants. + */ +#define MACHINE "sgi" +#define _MACHINE sgi +#define MACHINE_ARCH "mips64" +#define _MACHINE_ARCH mips64 + +#define MID_MACHINE 0 /* None but has to be defined */ + +#include <mips64/param.h> + +#endif /* _MACHINE_PARAM_H_ */ diff --git a/sys/arch/sgi/include/pcb.h b/sys/arch/sgi/include/pcb.h new file mode 100644 index 00000000000..5ef67f15474 --- /dev/null +++ b/sys/arch/sgi/include/pcb.h @@ -0,0 +1,5 @@ +/* $OpenBSD: pcb.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/pcb.h> diff --git a/sys/arch/sgi/include/pio.h b/sys/arch/sgi/include/pio.h new file mode 100644 index 00000000000..d2da74f73fd --- /dev/null +++ b/sys/arch/sgi/include/pio.h @@ -0,0 +1,5 @@ +/* $OpenBSD: pio.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/pio.h> diff --git a/sys/arch/sgi/include/pmap.h b/sys/arch/sgi/include/pmap.h new file mode 100644 index 00000000000..a0c9a5da2a4 --- /dev/null +++ b/sys/arch/sgi/include/pmap.h @@ -0,0 +1,5 @@ +/* $OpenBSD: pmap.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/pmap.h> diff --git a/sys/arch/sgi/include/proc.h b/sys/arch/sgi/include/proc.h new file mode 100644 index 00000000000..7faa033afd6 --- /dev/null +++ b/sys/arch/sgi/include/proc.h @@ -0,0 +1,5 @@ +/* $OpenBSD: proc.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/proc.h> diff --git a/sys/arch/sgi/include/profile.h b/sys/arch/sgi/include/profile.h new file mode 100644 index 00000000000..751bcd1a4aa --- /dev/null +++ b/sys/arch/sgi/include/profile.h @@ -0,0 +1,5 @@ +/* $OpenBSD: profile.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/profile.h> diff --git a/sys/arch/sgi/include/psl.h b/sys/arch/sgi/include/psl.h new file mode 100644 index 00000000000..307ebaa88a5 --- /dev/null +++ b/sys/arch/sgi/include/psl.h @@ -0,0 +1,39 @@ +/* $OpenBSD: psl.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* + * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ +#include <machine/cpu.h> + +/* + * Macros to decode processor status word. + */ +#define USERMODE(ps) (((ps) & SR_KSU_MASK) == SR_KSU_USER) +#define BASEPRI(ps) (((ps) & (INT_MASK | SR_INT_ENA_PREV)) \ + == (INT_MASK | SR_INT_ENA_PREV)) + +#ifdef _KERNEL +#include <machine/intr.h> +#endif diff --git a/sys/arch/sgi/include/pte.h b/sys/arch/sgi/include/pte.h new file mode 100644 index 00000000000..232b8bc709e --- /dev/null +++ b/sys/arch/sgi/include/pte.h @@ -0,0 +1,126 @@ +/* $OpenBSD: pte.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* + * Copyright (c) 1988 University of Utah. + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * the Systems Programming Group of the University of Utah Computer + * Science Department and Ralph Campbell. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: Utah Hdr: pte.h 1.11 89/09/03 + * from: @(#)pte.h 8.1 (Berkeley) 6/10/93 + */ + +/* + * R4000 hardware page table entry + */ + +#ifndef _LOCORE + +/* + * Structure defining an tlb entry data set. + */ + +struct tlb { + int tlb_mask; + int tlb_hi; + int tlb_lo0; + int tlb_lo1; +}; + +typedef union pt_entry { + unsigned int pt_entry; /* for copying, etc. */ + unsigned int pt_pte; /* XXX void */ +} pt_entry_t; /* Mips page table entry */ +#endif /* _LOCORE */ + +#define PT_ENTRY_NULL ((pt_entry_t *) 0) + +#define PG_RO 0x40000000 /* SW */ + +#define PG_SVPN 0xfffff000 /* Software page no mask */ +#define PG_HVPN 0xffffe000 /* Hardware page no mask */ +#define PG_ODDPG 0x00001000 /* Odd even pte entry */ +#define PG_ASID 0x000000ff /* Address space ID */ +#define PG_G 0x00000001 /* HW */ +#define PG_V 0x00000002 +#define PG_NV 0x00000000 +#define PG_M 0x00000004 +#define PG_ATTR 0x0000003f +#define PG_UNCACHED 0x00000010 +#define PG_CACHED 0x00000018 +#define PG_CACHEMODE 0x00000038 +#define PG_ROPAGE (PG_V | PG_RO | PG_CACHED) /* Write protected */ +#define PG_RWPAGE (PG_V | PG_M | PG_CACHED) /* Not wr-prot not clean */ +#define PG_CWPAGE (PG_V | PG_CACHED) /* Not wr-prot but clean */ +#define PG_IOPAGE (PG_G | PG_V | PG_M | PG_UNCACHED) +#define PG_FRAME 0x3fffffc0 +#define PG_SHIFT 6 +#define pfn_is_ext(x) ((x) & 0x3c000000) +#define vad_to_pfn(x) (((unsigned)(x) >> PG_SHIFT) & PG_FRAME) +#define vad_to_pfn64(x) (((quad_t)(x) >> PG_SHIFT) & PG_FRAME) +#define vad_to_vpn(x) ((int)((unsigned)(x) & PG_SVPN)) +#define vpn_to_vad(x) ((int)((x) & PG_SVPN)) +/* User viritual to pte page entry */ +#define uvtopte(adr) (((adr) >> PGSHIFT) & (NPTEPG -1)) + +#define PG_SIZE_4K 0x00000000 +#define PG_SIZE_16K 0x00006000 +#define PG_SIZE_64K 0x0001e000 +#define PG_SIZE_256K 0x0007e000 +#define PG_SIZE_1M 0x001fe000 +#define PG_SIZE_4M 0x007fe000 +#define PG_SIZE_16M 0x01ffe000 + +#if defined(_KERNEL) && !defined(_LOCORE) + +static __inline vaddr_t +pfn_to_pad(unsigned int pte) +{ + vaddr_t pa; + + pa = (long)(int)(((pte & PG_FRAME) << PG_SHIFT)); + return pa; +} + +/* + * Kernel virtual address to page table entry and visa versa. + */ +#define kvtopte(va) \ + (Sysmap + (((vaddr_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT)) +#define ptetokv(pte) \ + ((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS) + +extern pt_entry_t *Sysmap; /* kernel pte table */ +extern u_int Sysmapsize; /* number of pte's in Sysmap */ +#endif diff --git a/sys/arch/sgi/include/ptrace.h b/sys/arch/sgi/include/ptrace.h new file mode 100644 index 00000000000..9f0a1a22e40 --- /dev/null +++ b/sys/arch/sgi/include/ptrace.h @@ -0,0 +1,5 @@ +/* $OpenBSD: ptrace.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/ptrace.h> diff --git a/sys/arch/sgi/include/reg.h b/sys/arch/sgi/include/reg.h new file mode 100644 index 00000000000..1384ab67a31 --- /dev/null +++ b/sys/arch/sgi/include/reg.h @@ -0,0 +1,5 @@ +/* $OpenBSD: reg.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/reg.h> diff --git a/sys/arch/sgi/include/regdef.h b/sys/arch/sgi/include/regdef.h new file mode 100644 index 00000000000..5c6c04429b0 --- /dev/null +++ b/sys/arch/sgi/include/regdef.h @@ -0,0 +1,5 @@ +/* $OpenBSD: regdef.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/regdef.h> diff --git a/sys/arch/sgi/include/regnum.h b/sys/arch/sgi/include/regnum.h new file mode 100644 index 00000000000..02742e484c4 --- /dev/null +++ b/sys/arch/sgi/include/regnum.h @@ -0,0 +1,5 @@ +/* $OpenBSD: regnum.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/regnum.h> diff --git a/sys/arch/sgi/include/reloc.h b/sys/arch/sgi/include/reloc.h new file mode 100644 index 00000000000..a42bb322df8 --- /dev/null +++ b/sys/arch/sgi/include/reloc.h @@ -0,0 +1,5 @@ +/* $OpenBSD: reloc.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/reloc.h> diff --git a/sys/arch/sgi/include/rm7000.h b/sys/arch/sgi/include/rm7000.h new file mode 100644 index 00000000000..2fd5584e72e --- /dev/null +++ b/sys/arch/sgi/include/rm7000.h @@ -0,0 +1,99 @@ +/* $OpenBSD: rm7000.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* + * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#ifndef _MACHINE_RM7000_H +#define _MACHINE_RM7000_H + +/* + * QED RM7000 specific defines. + */ + +/* + * Performance counters. + */ + +#define PCNT_SRC_CLOCKS 0x00 /* Clock cycles */ +#define PCNT_SRC_INSTR 0x01 /* Total instructions issued */ +#define PCNT_SRC_FPINSTR 0x02 /* Float instructions issued */ +#define PCNT_SRC_IINSTR 0x03 /* Integer instructions issued */ +#define PCNT_SRC_LOAD 0x04 /* Load instructions issued */ +#define PCNT_SRC_STORE 0x05 /* Store instructions issued */ +#define PCNT_SRC_DUAL 0x06 /* Dual issued pairs */ +#define PCNT_SRC_BRPREF 0x07 /* Branch prefetches */ +#define PCNT_SRC_EXTMISS 0x08 /* External cache misses */ +#define PCNT_SRC_STALL 0x09 /* Stall cycles */ +#define PCNT_SRC_SECMISS 0x0a /* Secondary cache misses */ +#define PCNT_SRC_INSMISS 0x0b /* Instruction cache misses */ +#define PCNT_SRC_DTAMISS 0x0c /* Data cache misses */ +#define PCNT_SRC_DTLBMISS 0x0d /* Data TLB misses */ +#define PCNT_SRC_ITLBMISS 0x0e /* Instruction TLB misses */ +#define PCNT_SRC_JTLBIMISS 0x0f /* Joint TLB instruction misses */ +#define PCNT_SRC_JTLBDMISS 0x10 /* Joint TLB data misses */ +#define PCNT_SRC_BRTAKEN 0x11 /* Branches taken */ +#define PCNT_SRC_BRISSUED 0x12 /* Branches issued */ +#define PCNT_SRC_SECWBACK 0x13 /* Secondary cache writebacks */ +#define PCNT_SRC_PRIWBACK 0x14 /* Primary cache writebacks */ +#define PCNT_SRC_DCSTALL 0x15 /* Dcache miss stall cycles */ +#define PCNT_SRC_MISS 0x16 /* Cache misses */ +#define PCNT_SRC_FPEXC 0x17 /* FP possible execption cycles */ +#define PCNT_SRC_MULSLIP 0x18 /* Slip cycles due to mult. busy */ +#define PCNT_SRC_CP0SLIP 0x19 /* CP0 Slip cycles */ +#define PCNT_SRC_LDSLIP 0x1a /* Slip cycles due to pend. non-b ld */ +#define PCNT_SRC_WBFULL 0x1b /* Write buffer full stall cycles */ +#define PCNT_SRC_CISTALL 0x1c /* Cache instruction stall cycles */ +#define PCNT_SRC_MULSTALL 0x1d /* Multiplier stall cycles */ +#define PCNT_SRC_ELDSTALL 0x1d /* Excepion stall due to non-b ld */ +#define PCNT_SRC_MAX 0x1d /* Maximum PCNT select code */ + +/* + * Counter control bits. + */ + +#define PCNT_CE 0x0400 /* Count enable */ +#define PCNT_UM 0x0200 /* Count in User mode */ +#define PCNT_KM 0x0100 /* Count in kernel mode */ + +/* + * Performance counter system call function codes. + */ +#define PCNT_FNC_SELECT 0x0001 /* Select counter source */ +#define PCNT_FNC_READ 0x0002 /* Read current value of counter */ + + +#ifdef _KERNEL +__BEGIN_DECLS +int rm7k_perfcntr __P((int, long, long, long)); +void rm7k_perfintr __P((struct trap_frame *)); +int rm7k_watchintr __P((struct trap_frame *)); +void cp0_setperfcount __P((int)); +void cp0_setperfctrl __P((int)); +int cp0_getperfcount __P((void)); +__END_DECLS +#endif /* _KERNEL */ + +#endif /* _MACHINE_RM7000_H */ diff --git a/sys/arch/sgi/include/setjmp.h b/sys/arch/sgi/include/setjmp.h new file mode 100644 index 00000000000..42c95a623a8 --- /dev/null +++ b/sys/arch/sgi/include/setjmp.h @@ -0,0 +1,5 @@ +/* $OpenBSD: setjmp.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/setjmp.h> diff --git a/sys/arch/sgi/include/signal.h b/sys/arch/sgi/include/signal.h new file mode 100644 index 00000000000..76c9c9af96a --- /dev/null +++ b/sys/arch/sgi/include/signal.h @@ -0,0 +1,5 @@ +/* $OpenBSD: signal.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/signal.h> diff --git a/sys/arch/sgi/include/spinlock.h b/sys/arch/sgi/include/spinlock.h new file mode 100644 index 00000000000..6a5d9013967 --- /dev/null +++ b/sys/arch/sgi/include/spinlock.h @@ -0,0 +1,3 @@ +/* $OpenBSD: spinlock.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +#include <mips64/spinlock.h> diff --git a/sys/arch/sgi/include/stdarg.h b/sys/arch/sgi/include/stdarg.h new file mode 100644 index 00000000000..06447d60e61 --- /dev/null +++ b/sys/arch/sgi/include/stdarg.h @@ -0,0 +1,5 @@ +/* $OpenBSD: stdarg.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/stdarg.h> diff --git a/sys/arch/sgi/include/trap.h b/sys/arch/sgi/include/trap.h new file mode 100644 index 00000000000..e85b26dc6f1 --- /dev/null +++ b/sys/arch/sgi/include/trap.h @@ -0,0 +1,5 @@ +/* $OpenBSD: trap.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/trap.h> diff --git a/sys/arch/sgi/include/types.h b/sys/arch/sgi/include/types.h new file mode 100644 index 00000000000..70e7353a24d --- /dev/null +++ b/sys/arch/sgi/include/types.h @@ -0,0 +1,5 @@ +/* $OpenBSD: types.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/types.h> diff --git a/sys/arch/sgi/include/varargs.h b/sys/arch/sgi/include/varargs.h new file mode 100644 index 00000000000..0249146b6eb --- /dev/null +++ b/sys/arch/sgi/include/varargs.h @@ -0,0 +1,5 @@ +/* $OpenBSD: varargs.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/varargs.h> diff --git a/sys/arch/sgi/include/vmparam.h b/sys/arch/sgi/include/vmparam.h new file mode 100644 index 00000000000..24909bbf04f --- /dev/null +++ b/sys/arch/sgi/include/vmparam.h @@ -0,0 +1,5 @@ +/* $OpenBSD: vmparam.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */ + +/* Use Mips generic include file */ + +#include <mips64/vmparam.h> |