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-rw-r--r--sys/arch/sh/dev/shpcic.c203
-rw-r--r--sys/arch/sh/dev/shpcicvar.h42
2 files changed, 242 insertions, 3 deletions
diff --git a/sys/arch/sh/dev/shpcic.c b/sys/arch/sh/dev/shpcic.c
index c1357e2d708..fe94c98fb50 100644
--- a/sys/arch/sh/dev/shpcic.c
+++ b/sys/arch/sh/dev/shpcic.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: shpcic.c,v 1.1 2006/10/06 21:02:55 miod Exp $ */
+/* $OpenBSD: shpcic.c,v 1.2 2006/10/07 20:52:40 miod Exp $ */
/* $NetBSD: shpcic.c,v 1.10 2005/12/24 20:07:32 perry Exp $ */
/*
@@ -600,7 +600,54 @@ shpcic_mem_read_multi_4(void *v, bus_space_handle_t bsh,
}
/*
- *
+ * read raw multi
+ */
+
+void
+shpcic_io_read_raw_multi_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ *(uint16_t *)addr = __shpcic_io_read_2(bsh, offset);
+ addr += 2;
+ }
+}
+
+void
+shpcic_io_read_raw_multi_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count)
+{
+ count >>= 2;
+ while (count--) {
+ *(uint32_t *)addr = __shpcic_io_read_4(bsh, offset);
+ addr += 4;
+ }
+}
+
+void
+shpcic_mem_read_raw_multi_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ *(uint16_t *)addr = __shpcic_mem_read_2(bsh, offset);
+ addr += 2;
+ }
+}
+
+void
+shpcic_mem_read_raw_multi_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count)
+{
+ count >>= 2;
+ while (count--) {
+ *(uint32_t *)addr = __shpcic_mem_read_4(bsh, offset);
+ addr += 4;
+ }
+}
+
+/*
* read region
*/
void
@@ -663,6 +710,58 @@ shpcic_mem_read_region_4(void *v, bus_space_handle_t bsh,
}
}
+/*
+ * read raw region
+ */
+
+void
+shpcic_io_read_raw_region_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ *(uint16_t *)addr = __shpcic_io_read_2(bsh, offset);
+ addr += 2;
+ offset += 2;
+ }
+}
+
+void
+shpcic_io_read_raw_region_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count)
+{
+ count >>= 2;
+ while (count--) {
+ *(uint32_t *)addr = __shpcic_io_read_4(bsh, offset);
+ addr += 4;
+ offset += 4;
+ }
+}
+
+void
+shpcic_mem_read_raw_region_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ *(uint16_t *)addr = __shpcic_mem_read_2(bsh, offset);
+ addr += 2;
+ offset += 2;
+ }
+}
+
+void
+shpcic_mem_read_raw_region_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count)
+{
+ count >>= 2;
+ while (count--) {
+ *(uint32_t *)addr = __shpcic_mem_read_4(bsh, offset);
+ addr += 4;
+ offset += 4;
+ }
+}
+
/* write */
static inline void __shpcic_io_write_1(bus_space_handle_t bsh,
bus_size_t offset, uint8_t value);
@@ -834,6 +933,54 @@ shpcic_mem_write_multi_4(void *v, bus_space_handle_t bsh,
}
/*
+ * write raw multi
+ */
+
+void
+shpcic_io_write_raw_multi_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ __shpcic_io_write_2(bsh, offset, *(uint16_t *)addr);
+ addr += 2;
+ }
+}
+
+void
+shpcic_io_write_raw_multi_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count)
+{
+ count >>= 2;
+ while (count--) {
+ __shpcic_io_write_4(bsh, offset, *(uint32_t *)addr);
+ addr += 4;
+ }
+}
+
+void
+shpcic_mem_write_raw_multi_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ __shpcic_mem_write_2(bsh, offset, *(uint16_t *)addr);
+ addr += 2;
+ }
+}
+
+void
+shpcic_mem_write_raw_multi_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count)
+{
+ count >>= 2;
+ while (count--) {
+ __shpcic_mem_write_4(bsh, offset, *(uint32_t *)addr);
+ addr += 4;
+ }
+}
+
+/*
* write region
*/
void
@@ -897,6 +1044,58 @@ shpcic_mem_write_region_4(void *v, bus_space_handle_t bsh,
}
/*
+ * write raw region
+ */
+
+void
+shpcic_io_write_raw_region_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ __shpcic_io_write_2(bsh, offset, *(uint16_t *)addr);
+ addr += 2;
+ offset += 2;
+ }
+}
+
+void
+shpcic_io_write_raw_region_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ __shpcic_io_write_4(bsh, offset, *(uint32_t *)addr);
+ addr += 4;
+ offset += 4;
+ }
+}
+
+void
+shpcic_mem_write_raw_region_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count)
+{
+ count >>= 1;
+ while (count--) {
+ __shpcic_mem_write_2(bsh, offset, *(uint16_t *)addr);
+ addr += 2;
+ offset += 2;
+ }
+}
+
+void
+shpcic_mem_write_raw_region_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count)
+{
+ count >>= 2;
+ while (count--) {
+ __shpcic_mem_write_4(bsh, offset, *(uint32_t *)addr);
+ addr += 4;
+ offset += 4;
+ }
+}
+
+/*
* set multi
*/
void
diff --git a/sys/arch/sh/dev/shpcicvar.h b/sys/arch/sh/dev/shpcicvar.h
index f000fec3084..2e2a2fa8d04 100644
--- a/sys/arch/sh/dev/shpcicvar.h
+++ b/sys/arch/sh/dev/shpcicvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: shpcicvar.h,v 1.1 2006/10/06 21:02:55 miod Exp $ */
+/* $OpenBSD: shpcicvar.h,v 1.2 2006/10/07 20:52:40 miod Exp $ */
/* $NetBSD: shpcicvar.h,v 1.6 2005/12/11 12:18:58 christos Exp $ */
/*-
@@ -79,6 +79,16 @@ void shpcic_mem_read_multi_2(void *v, bus_space_handle_t bsh,
void shpcic_mem_read_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count);
+/* read raw multi */
+void shpcic_io_read_raw_multi_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+void shpcic_io_read_raw_multi_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+void shpcic_mem_read_raw_multi_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+void shpcic_mem_read_raw_multi_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+
/* read region */
void shpcic_io_read_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count);
@@ -93,6 +103,16 @@ void shpcic_mem_read_region_2(void *v, bus_space_handle_t bsh,
void shpcic_mem_read_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count);
+/* read raw region */
+void shpcic_io_read_raw_region_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+void shpcic_io_read_raw_region_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+void shpcic_mem_read_raw_region_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+void shpcic_mem_read_raw_region_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+
/* write single */
void shpcic_io_write_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t data);
@@ -121,6 +141,16 @@ void shpcic_mem_write_multi_2(void *v, bus_space_handle_t bsh,
void shpcic_mem_write_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count);
+/* write raw multi */
+void shpcic_io_write_raw_multi_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+void shpcic_io_write_raw_multi_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+void shpcic_mem_write_raw_multi_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+void shpcic_mem_write_raw_multi_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+
/* write region */
void shpcic_io_write_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count);
@@ -135,6 +165,16 @@ void shpcic_mem_write_region_2(void *v, bus_space_handle_t bsh,
void shpcic_mem_write_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count);
+/* write raw region */
+void shpcic_io_write_raw_region_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+void shpcic_io_write_raw_region_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+void shpcic_mem_write_raw_region_2(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+void shpcic_mem_write_raw_region_4(void *v, bus_space_handle_t bsh,
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+
/* set multi */
void shpcic_io_set_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t val, bus_size_t count);
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-16 00:26:27 +0000