diff options
Diffstat (limited to 'sys/arch/sparc/dev/espvar.h')
| -rw-r--r-- | sys/arch/sparc/dev/espvar.h | 335 |
1 files changed, 188 insertions, 147 deletions
diff --git a/sys/arch/sparc/dev/espvar.h b/sys/arch/sparc/dev/espvar.h index c8592af5b29..8b0b414a08a 100644 --- a/sys/arch/sparc/dev/espvar.h +++ b/sys/arch/sparc/dev/espvar.h @@ -1,37 +1,7 @@ -/* $NetBSD: espvar.h,v 1.3 1994/11/20 20:52:12 deraadt Exp $ */ +/* $NetBSD: espvar.h,v 1.13 1996/05/16 20:31:30 pk Exp $ */ /* - * Copyright (c) 1995 Theo de Raadt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed under OpenBSD by - * Theo de Raadt. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * * Copyright (c) 1994 Peter Galbavy. All rights reserved. - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -58,82 +28,103 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* esp chip revisions */ -#define ESP100 0 -#define ESP100A 1 -#define ESP200 2 - -/* Grabbed from Julians SCSI aha-drivers */ -#ifdef DDB -int Debugger(); -#else DDB -#define Debugger() panic("should call debugger here (esp.c)") -#endif DDB - -#define ESP_MSGLEN_MAX 8 /* maximum msglen we handle */ -#define ESP_SYNC_REQOFF 0 /* offset we request */ -#define ESP_SYNC_MAXOFF 15 /* maximum supportable sync offset */ -#if ESP_SYNC_REQOFF > ESP_SYNC_MAXOFF -#warning requested sync offset is higher than maximum possible sync offset. -#endif +#define ESP_DEBUG 0 #define FREQTOCCF(freq) (((freq + 4) / 5)) -/* - * ECB. Holds additional information for each SCSI command - * Comments: We need a separate scsi command block because we may need - * to overwrite it with a request sense command. Basically, we refrain - * from fiddling with the scsi_xfer struct (except do the expected - * updating of return values). We'll generally update: - * xs->{flags,resid,error,sense,status} and occasionally xs->retries. +/* esp revisions */ +#define ESP100 0x01 +#define ESP100A 0x02 +#define ESP200 0x03 + +#if 0 +typedef caddr_t physaddr; + +struct esp_dma_seg { + physaddr addr; + long len; +}; +#endif + +/* + * ECB. Holds additional information for each SCSI command Comments: We + * need a separate scsi command block because we may need to overwrite it + * with a request sense command. Basicly, we refrain from fiddling with + * the scsi_xfer struct (except do the expected updating of return values). + * We'll generally update: xs->{flags,resid,error,sense,status} and + * occasionally xs->retries. */ struct ecb { TAILQ_ENTRY(ecb) chain; - struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ - int flags; /* Status */ -#define ECB_FREE 0x00 -#define ECB_ACTIVE 0x01 -#define ECB_DONE 0x04 + struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ + int flags; /* Status */ +#define ECB_QNONE 0 +#define ECB_QFREE 1 +#define ECB_QREADY 2 +#define ECB_QNEXUS 3 +#define ECB_QBITS 0x07 #define ECB_CHKSENSE 0x08 - struct scsi_generic cmd; /* SCSI command block */ - int clen; - caddr_t daddr; /* Saved data pointer */ - int dleft; /* Residue */ - int stat; /* SCSI status byte */ +#define ECB_ABORTED 0x10 +#define ECB_SETQ(e, q) do (e)->flags = ((e)->flags&~ECB_QBITS)|(q); while(0) + struct scsi_generic cmd; /* SCSI command block */ + int clen; + char *daddr; /* Saved data pointer */ + int dleft; /* Residue */ + u_char stat; /* SCSI status byte */ +#if ESP_DEBUG > 0 + char trace[1000]; +#endif }; +#if ESP_DEBUG > 0 +#define ECB_TRACE(ecb, msg, a, b) do { \ + const char *f = "[" msg "]"; \ + int n = strlen((ecb)->trace); \ + if (n < (sizeof((ecb)->trace)-100)) \ + sprintf((ecb)->trace + n, f, a, b); \ +} while(0) +#else +#define ECB_TRACE(ecb, msg, a, b) +#endif -/* - * Some info about each (possible) target on the SCSI bus. This should - * probably have been a "per target+lunit" structure, but we'll leave it at +/* + * Some info about each (possible) target on the SCSI bus. This should + * probably have been a "per target+lunit" structure, but we'll leave it at * this for now. Is there a way to reliably hook it up to sc->fordriver?? */ struct esp_tinfo { - int cmds; /* #commands processed */ - int dconns; /* #disconnects */ - int touts; /* #timeouts */ - int perrs; /* #parity errors */ - int senses; /* #request sense commands sent */ - u_char lubusy; /* What luns are busy? */ - u_char flags; -#define DO_NEGOTIATE 0x01 /* (re)negotiate synchronous options */ -#define TARGET_BUSY 0x02 /* target is busy, i.e. cmd in progress */ - u_char period; /* sync period */ - u_char synctp; /* sync period translated for SYNCTP */ - u_char offset; /* sync offset */ -}; + int cmds; /* #commands processed */ + int dconns; /* #disconnects */ + int touts; /* #timeouts */ + int perrs; /* #parity errors */ + int senses; /* #request sense commands sent */ + ushort lubusy; /* What local units/subr. are busy? */ + u_char flags; +#define T_NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ +#define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ +#define T_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ +#define T_SYNCMODE 0x08 /* sync mode has been negotiated */ +#define T_SYNCHOFF 0x10 /* .. */ +#define T_RSELECTOFF 0x20 /* .. */ + u_char period; /* Period suggestion */ + u_char offset; /* Offset suggestion */ +} tinfo_t; /* Register a linenumber (for debugging) */ #define LOGLINE(p) -#define ESP_SHOWECBS 0x01 -#define ESP_SHOWINTS 0x02 -#define ESP_SHOWCMDS 0x04 -#define ESP_SHOWMISC 0x08 -#define ESP_SHOWTRAC 0x10 -#define ESP_SHOWSTART 0x20 -#define ESP_SHOWPHASE 0x40 +#define ESP_SHOWECBS 0x01 +#define ESP_SHOWINTS 0x02 +#define ESP_SHOWCMDS 0x04 +#define ESP_SHOWMISC 0x08 +#define ESP_SHOWTRAC 0x10 +#define ESP_SHOWSTART 0x20 +#define ESP_SHOWPHASE 0x40 +#define ESP_SHOWDMA 0x80 +#define ESP_SHOWCCMDS 0x100 +#define ESP_SHOWMSGS 0x200 -#if ESP_DEBUG +#ifdef ESP_DEBUG +extern int esp_debug; #define ESP_ECBS(str) do {if (esp_debug & ESP_SHOWECBS) printf str;} while (0) #define ESP_MISC(str) do {if (esp_debug & ESP_SHOWMISC) printf str;} while (0) #define ESP_INTS(str) do {if (esp_debug & ESP_SHOWINTS) printf str;} while (0) @@ -141,6 +132,8 @@ struct esp_tinfo { #define ESP_CMDS(str) do {if (esp_debug & ESP_SHOWCMDS) printf str;} while (0) #define ESP_START(str) do {if (esp_debug & ESP_SHOWSTART) printf str;}while (0) #define ESP_PHASE(str) do {if (esp_debug & ESP_SHOWPHASE) printf str;}while (0) +#define ESP_DMA(str) do {if (esp_debug & ESP_SHOWDMA) printf str;}while (0) +#define ESP_MSGS(str) do {if (esp_debug & ESP_SHOWMSGS) printf str;}while (0) #else #define ESP_ECBS(str) #define ESP_MISC(str) @@ -149,85 +142,104 @@ struct esp_tinfo { #define ESP_CMDS(str) #define ESP_START(str) #define ESP_PHASE(str) +#define ESP_DMA(str) #endif +#define ESP_MAX_MSG_LEN 8 + struct esp_softc { - struct device sc_dev; - struct sbusdev sc_sd; /* sbus device */ - struct intrhand sc_ih; /* intr handler */ - struct evcnt sc_intrcnt; /* intr count */ - struct scsi_link sc_link; /* scsi lint struct */ - struct espregs *sc_regs; /* the registers */ - struct dma_softc *sc_dma; /* corresponding DMA ctrlr */ + struct device sc_dev; /* us as a device */ + struct sbusdev sc_sd; /* sbus device */ + struct intrhand sc_ih; /* intr handler */ + struct evcnt sc_intrcnt; /* intr count */ + struct scsi_link sc_link; /* scsi lint struct */ + volatile u_char *sc_reg; /* the registers */ + struct dma_softc *sc_dma; /* pointer to my dma */ /* register defaults */ - u_char sc_cfg1; /* config 1 */ - u_char sc_cfg2; /* config 2, only ESP100A/200 */ - u_char sc_cfg3; /* config 3, only ESP200 */ - u_char sc_ccf; /* clock conversion */ + u_char sc_cfg1; /* Config 1 */ + u_char sc_cfg2; /* Config 2, not ESP100 */ + u_char sc_cfg3; /* Config 3, only ESP200 */ + u_char sc_ccf; /* Clock Conversion */ u_char sc_timeout; - u_char sc_espintr; /* copies of registers */ + /* register copies, see espreadregs() */ + u_char sc_espintr; u_char sc_espstat; u_char sc_espstep; u_char sc_espfflags; - struct bootpath *sc_bp; /* current boot path component */ - /* Lists of command blocks */ - TAILQ_HEAD(ecb_list, ecb) free_list, ready_list, nexus_list; + TAILQ_HEAD(ecb_list, ecb) free_list, + ready_list, + nexus_list; - struct ecb *sc_nexus; /* current command */ - struct ecb sc_ecb[8]; /* one per target */ - struct esp_tinfo sc_tinfo[8]; + struct ecb *sc_nexus; /* current command */ + struct ecb sc_ecb[8]; /* one per target */ + struct esp_tinfo sc_tinfo[8]; - /* data about the current nexus (updated for every cmd switch) */ - caddr_t sc_dp; /* current data pointer */ - size_t sc_dleft; /* data left to transfer */ + /* Data about the current nexus (updated for every cmd switch) */ + caddr_t sc_dp; /* Current data pointer */ + ssize_t sc_dleft; /* Data left to transfer */ - /* adapter state */ - int sc_phase; /* bus phase (based on sc_espstat) */ - u_char sc_state; /* state applicable to the adapter */ + /* Adapter state */ + int sc_phase; /* Copy of what bus phase we are in */ + int sc_prevphase; /* Copy of what bus phase we were in */ + u_char sc_state; /* State applicable to the adapter */ u_char sc_flags; u_char sc_selid; + u_char sc_lastcmd; - /* message stuff */ - u_char sc_msgpriq; /* messages to send (see SEND_* below) */ - u_char sc_msgout; /* message that is on it's way out */ - u_char sc_omess[ESP_MSGLEN_MAX]; - u_char *sc_omp; /* message pointer (for multibyte messages) */ + /* Message stuff */ + u_char sc_msgpriq; /* One or more messages to send (encoded) */ + u_char sc_msgout; /* What message is on its way out? */ + u_char sc_omess[ESP_MAX_MSG_LEN]; + caddr_t sc_omp; /* Message pointer (for multibyte messages) */ size_t sc_omlen; - u_char sc_imess[ESP_MSGLEN_MAX + 1]; - u_char *sc_imp; /* message pointer (for multibyte messages) */ + u_char sc_imess[ESP_MAX_MSG_LEN + 1]; + caddr_t sc_imp; /* Message pointer (for multibyte messages) */ size_t sc_imlen; /* hardware/openprom stuff */ - int sc_node; /* PROM node ID */ - int sc_freq; /* Freq in HZ */ - int sc_pri; /* SBUS priority */ - int sc_id; /* our scsi id */ - int sc_rev; /* esp revision */ - int sc_minsync; /* minimum sync period / 4 */ + int sc_node; /* PROM node ID */ + int sc_freq; /* Freq in HZ */ + int sc_pri; /* SBUS priority */ + int sc_id; /* our scsi id */ + int sc_rev; /* esp revision */ + int sc_minsync; /* minimum sync period / 4 */ + int sc_maxxfer; /* maximum transfer size */ }; +/* + * Macros to read and write the chip's registers. + */ +#define ESP_READ_REG(sc, reg) \ + ((sc)->sc_reg[(reg) * 4]) +#define ESP_WRITE_REG(sc, reg, val) \ + do { \ + u_char v = (val); \ + (sc)->sc_reg[(reg) * 4] = v; \ + } while (0) + /* values for sc_state */ -#define ESPS_IDLE 0x01 /* waiting for something to do */ -#define ESPS_EXPECTDISC 0x02 /* a disconnect is going to happen */ -#define ESPS_SELECTING 0x03 /* SCSI command is arbiting */ -#define ESPS_RESELECTED 0x04 /* has been reselected */ -#define ESPS_NEXUS 0x05 /* actively using the SCSI bus */ -#define ESPS_DOINGDMA 0x06 /* doing a DMA transaction */ -#define ESPS_DOINGMSGOUT 0x07 /* message-out in progress */ -#define ESPS_DOINGMSGIN 0x08 /* message-in in progress */ -#define ESPS_DOINGSTATUS 0x09 /* status-in in progress */ -#define ESPS_SELECTSTOP 0x0a /* sent first byte of message.. */ -#define ESPS_MULTMSGEND 0x0b /* done sending multibyte msg */ +#define ESP_IDLE 0x01 /* waiting for something to do */ +#define ESP_TMP_UNAVAIL 0x02 /* Don't accept SCSI commands */ +#define ESP_SELECTING 0x03 /* SCSI command is arbiting */ +#define ESP_RESELECTED 0x04 /* Has been reselected */ +#define ESP_HASNEXUS 0x05 /* Actively using the SCSI bus */ +#define ESP_CLEANING 0x06 +#define ESP_SBR 0x07 /* Expect a SCSI RST because we commanded it */ /* values for sc_flags */ -#define ESPF_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ -#define ESPF_MAYDISCON 0x02 /* disconnection allowed */ -#define ESPF_DONE 0x04 /* finished transaction */ -#define ESPF_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ +#define ESP_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ +#define ESP_DOINGDMA 0x02 /* The FIFO data path is active! */ +#define ESP_BUSFREE_OK 0x04 /* Bus free phase is OK. */ +#define ESP_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ +/*#define ESP_BLOCKED 0x10 * Don't schedule new scsi bus operations */ +#define ESP_DISCON 0x10 /* Target sent DISCONNECT msg */ +#define ESP_ABORTING 0x20 /* Bailing out */ +#define ESP_ICCS 0x40 /* Expect status phase results */ +#define ESP_WAITI 0x80 /* Waiting for non-DMA data to arrive */ /* values for sc_msgout */ #define SEND_DEV_RESET 0x01 @@ -238,14 +250,25 @@ struct esp_softc { #define SEND_IDENTIFY 0x20 #define SEND_SDTR 0x40 -#define ST_MASK 0x3e /* bits 0, 6, and 7 are reserved */ +/* SCSI Status codes */ +#define ST_GOOD 0x00 +#define ST_CHKCOND 0x02 +#define ST_CONDMET 0x04 +#define ST_BUSY 0x08 +#define ST_INTERMED 0x10 +#define ST_INTERMED_CONDMET 0x14 +#define ST_RESERVATION_CONFLICT 0x18 +#define ST_CMD_TERM 0x22 +#define ST_QUEUE_FULL 0x28 -/* physical phase bits */ +#define ST_MASK 0x3e /* bit 0,6,7 is reserved */ + +/* phase bits */ #define IOI 0x01 #define CDI 0x02 #define MSGI 0x04 -/* values for sc_phase (where information transfer happens) */ +/* Information transfer phases */ #define DATA_OUT_PHASE (0) #define DATA_IN_PHASE (IOI) #define COMMAND_PHASE (CDI) @@ -255,5 +278,23 @@ struct esp_softc { #define PHASE_MASK (MSGI|CDI|IOI) -#define TARGETNAME(ecb) \ - ((struct device *)(ecb)->xs->sc_link->adapter_softc)->dv_xname +/* Some pseudo phases for getphase()*/ +#define BUSFREE_PHASE 0x100 /* Re/Selection no longer valid */ +#define INVALID_PHASE 0x101 /* Re/Selection valid, but no REQ yet */ +#define PSEUDO_PHASE 0x100 /* "pseudo" bit */ + +#ifdef ESP_DEBUG +#define ESPCMD(sc, cmd) do { \ + if (esp_debug & ESP_SHOWCCMDS) \ + printf("<cmd:0x%x>", (unsigned)cmd); \ + sc->sc_lastcmd = cmd; \ + ESP_WRITE_REG(sc, ESP_CMD, cmd); \ +} while (0) +#else +#define ESPCMD(sc, cmd) ESP_WRITE_REG(sc, ESP_CMD, cmd) +#endif + +#define SAME_ESP(sc, bp, ca) \ + ((bp->val[0] == ca->ca_slot && bp->val[1] == ca->ca_offset) || \ + (bp->val[0] == -1 && bp->val[1] == sc->sc_dev.dv_unit)) + |