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Diffstat (limited to 'sys/arch/sparc/include/cpu.h')
-rw-r--r--sys/arch/sparc/include/cpu.h88
1 files changed, 74 insertions, 14 deletions
diff --git a/sys/arch/sparc/include/cpu.h b/sys/arch/sparc/include/cpu.h
index 1dccb549d5d..88c05b45a98 100644
--- a/sys/arch/sparc/include/cpu.h
+++ b/sys/arch/sparc/include/cpu.h
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.17 1995/06/28 02:56:05 cgd Exp $ */
+/* $NetBSD: cpu.h,v 1.21 1996/03/31 22:17:14 pk Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -48,7 +48,7 @@
#define _CPU_H_
/*
- * CTL_MACHDEP definitinos.
+ * CTL_MACHDEP definitions.
*/
#define CPU_MAXID 1 /* no valid machdep ids */
@@ -73,15 +73,6 @@
#define cpu_wait(p) /* nothing */
/*
- * See syscall() for an explanation of the following. Note that the
- * locore bootstrap code follows the syscall stack protocol. The
- * framep argument is unused.
- */
-#define cpu_set_init_frame(p, fp) \
- (p)->p_md.md_tf = (struct trapframe *) \
- ((caddr_t)(p)->p_addr + USPACE - sizeof(struct trapframe))
-
-/*
* Arguments to hardclock, softclock and gatherstats encapsulate the
* previous machine state in an opaque clockframe. The ipl is here
* as well for strayintr (see locore.s:interrupt and intr.c:strayintr).
@@ -114,7 +105,17 @@ union sir {
#define SIR_NET 0
#define SIR_CLOCK 1
-#define setsoftint() ienab_bis(IE_L1)
+#if defined(SUN4M)
+extern void raise __P((int, int));
+#if !(defined(SUN4) || defined(SUN4C))
+#define setsoftint() raise(0,1)
+#else /* both defined */
+#define setsoftint() (cputyp == CPU_SUN4M ? raise(0,1) : ienab_bis(IE_L1))
+#endif /* !4,!4c */
+#else /* 4m not defined */
+#define setsoftint() ienab_bis(IE_L1)
+#endif /* SUN4M */
+
#define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint())
#define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint())
@@ -129,7 +130,7 @@ int want_resched; /* resched() was called */
/*
* Give a profiling tick to the current process when the user profiling
- * buffer pages are invalid. On the sparc, request an ast to send us
+ * buffer pages are invalid. On the sparc, request an ast to send us
* through trap(), marking the proc as needing a profiling tick.
*/
#define need_proftick(p) ((p)->p_flag |= P_OWEUPC, want_ast = 1)
@@ -170,6 +171,65 @@ void vmeintr_establish __P((int vec, int level, struct intrhand *));
*/
void intr_fasttrap __P((int level, void (*vec)(void)));
+/* disksubr.c */
+struct dkbad;
+int isbad __P((struct dkbad *bt, int, int, int));
+/* machdep.c */
+int ldcontrolb __P((caddr_t));
+void dumpconf __P((void));
+caddr_t reserve_dumppages __P((caddr_t));
+/* clock.c */
+struct timeval;
+void lo_microtime __P((struct timeval *));
+int statintr __P((void *));
+int clockintr __P((void *));/* level 10 (clock) interrupt code */
+int statintr __P((void *)); /* level 14 (statclock) interrupt code */
+/* locore.s */
+struct fpstate;
+void savefpstate __P((struct fpstate *));
+void loadfpstate __P((struct fpstate *));
+int probeget __P((caddr_t, int));
+void write_all_windows __P((void));
+void write_user_windows __P((void));
+void proc_trampoline __P((void));
+struct pcb;
+void snapshot __P((struct pcb *));
+struct frame *getfp __P((void));
+int xldcontrolb __P((caddr_t, struct pcb *));
+void copywords __P((const void *, void *, size_t));
+void qcopy __P((const void *, void *, size_t));
+void qzero __P((void *, size_t));
+/* locore2.c */
+void remrq __P((struct proc *));
+/* trap.c */
+void kill_user_windows __P((struct proc *));
+int rwindow_save __P((struct proc *));
+void child_return __P((struct proc *));
+/* amd7930intr.s */
+void amd7930_trap __P((void));
+/* cons.c */
+int cnrom __P((void));
+/* zs.c */
+void zsconsole __P((struct tty *, int, int, int (**)(struct tty *, int)));
+#ifdef KGDB
+void zs_kgdb_init __P((void));
+#endif
+/* fb.c */
+void fb_unblank __P((void));
+/* cache.c */
+void cache_flush __P((caddr_t, u_int));
+/* kgdb_stub.c */
+#ifdef KGDB
+void kgdb_attach __P((int (*)(void *), void (*)(void *, int), void *));
+void kgdb_connect __P((int));
+void kgdb_panic __P((void));
+#endif
+/* vm_machdep.c */
+void cpu_set_kpc __P((struct proc *, void (*)(struct proc *)));
+/* iommu.c */
+void iommu_enter __P((u_int, u_int));
+void iommu_remove __P((u_int, u_int));
+
/*
*
* The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits
@@ -187,7 +247,7 @@ void intr_fasttrap __P((int level, void (*vec)(void)));
struct trapvec {
int tv_instr[4]; /* the four instructions */
};
-extern struct trapvec trapbase[256]; /* the 256 vectors */
+extern struct trapvec *trapbase; /* the 256 vectors */
extern void wzero __P((void *, u_int));
extern void wcopy __P((const void *, void *, u_int));