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-rw-r--r--sys/arch/sparc64/dev/iommu.c16
-rw-r--r--sys/arch/sparc64/dev/psycho.c8
-rw-r--r--sys/arch/sparc64/dev/pyro.c6
-rw-r--r--sys/arch/sparc64/dev/schizo.c6
-rw-r--r--sys/arch/sparc64/dev/vdsk.c4
-rw-r--r--sys/arch/sparc64/dev/viommu.c6
6 files changed, 23 insertions, 23 deletions
diff --git a/sys/arch/sparc64/dev/iommu.c b/sys/arch/sparc64/dev/iommu.c
index b2f02f8f541..8f925c400af 100644
--- a/sys/arch/sparc64/dev/iommu.c
+++ b/sys/arch/sparc64/dev/iommu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: iommu.c,v 1.74 2017/04/30 16:45:45 mpi Exp $ */
+/* $OpenBSD: iommu.c,v 1.75 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: iommu.c,v 1.47 2002/02/08 20:03:45 eeh Exp $ */
/*
@@ -296,7 +296,7 @@ strbuf_reset(struct strbuf_ctl *sb)
bus_space_write_8(sb->sb_bustag, sb->sb_sb,
STRBUFREG(strbuf_ctl), STRBUF_EN);
- membar(Lookaside);
+ __membar("#Lookaside");
/* No streaming buffers? Disable them */
if (bus_space_read_8(sb->sb_bustag, sb->sb_sb,
@@ -412,7 +412,7 @@ iommu_remove(struct iommu_state *is, struct strbuf_ctl *sb, bus_addr_t va)
* IO operations are strongly ordered WRT each other. It is
* unclear how they relate to normal memory accesses.
*/
- membar(StoreStore);
+ __membar("#StoreStore");
IOMMUREG_WRITE(is, iommu_flush, va);
@@ -529,7 +529,7 @@ iommu_strbuf_flush_done(struct iommu_map_state *ims)
* memory is initialized before the IOMMU uses it.
* Is this Needed? How are IO and memory operations ordered?
*/
- membar(StoreStore);
+ __membar("#StoreStore");
bus_space_write_8(sb->sb_bustag, sb->sb_sb,
STRBUFREG(strbuf_flushsync), sf->sbf_flushpa);
@@ -538,7 +538,7 @@ iommu_strbuf_flush_done(struct iommu_map_state *ims)
("iommu_strbuf_flush_done: flush = %llx pa = %lx\n",
ldxa(sf->sbf_flushpa, ASI_PHYS_CACHED), sf->sbf_flushpa));
- membar(StoreLoad | Lookaside);
+ __membar("#StoreLoad | #Lookaside");
for(;;) {
int i;
@@ -549,7 +549,7 @@ iommu_strbuf_flush_done(struct iommu_map_state *ims)
* fetches.
*/
for (i = 0; i < 1000; ++i) {
- membar(LoadLoad);
+ __membar("#LoadLoad");
/* Bypass non-coherent D$ */
/* non-coherent...? Huh? */
flush = ldxa(sf->sbf_flushpa, ASI_PHYS_CACHED);
@@ -1560,14 +1560,14 @@ iommu_dvmamap_sync(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map,
return;
if (ops & BUS_DMASYNC_PREWRITE)
- membar(MemIssue);
+ __membar("#MemIssue");
if ((ims->ims_flags & IOMMU_MAP_STREAM) &&
(ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE)))
_iommu_dvmamap_sync(t, t0, map, offset, len, ops);
if (ops & BUS_DMASYNC_POSTREAD)
- membar(MemIssue);
+ __membar("#MemIssue");
}
/*
diff --git a/sys/arch/sparc64/dev/psycho.c b/sys/arch/sparc64/dev/psycho.c
index 997c9758e31..a35cf549d23 100644
--- a/sys/arch/sparc64/dev/psycho.c
+++ b/sys/arch/sparc64/dev/psycho.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: psycho.c,v 1.74 2016/08/23 03:28:01 guenther Exp $ */
+/* $OpenBSD: psycho.c,v 1.75 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp $ */
/*
@@ -1120,11 +1120,11 @@ psycho_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
int s;
s = splhigh();
- membar(Sync);
+ __membar("#Sync");
ci->ci_pci_probe = 1;
val = bus_space_read_4(pc->bustag, pc->bushandle,
PCITAG_OFFSET(tag) + reg);
- membar(Sync);
+ __membar("#Sync");
if (ci->ci_pci_fault)
val = 0xffffffff;
ci->ci_pci_probe = ci->ci_pci_fault = 0;
@@ -1333,7 +1333,7 @@ psycho_sabre_dvmamap_sync(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map,
psycho_psychoreg_read(sc, pci_dma_write_sync);
if (ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE))
- membar(MemIssue);
+ __membar("#MemIssue");
}
u_int
diff --git a/sys/arch/sparc64/dev/pyro.c b/sys/arch/sparc64/dev/pyro.c
index 777eccfdce1..bbed8fa4054 100644
--- a/sys/arch/sparc64/dev/pyro.c
+++ b/sys/arch/sparc64/dev/pyro.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pyro.c,v 1.30 2016/12/20 13:40:50 jsg Exp $ */
+/* $OpenBSD: pyro.c,v 1.31 2017/05/25 03:19:39 dlg Exp $ */
/*
* Copyright (c) 2002 Jason L. Wright (jason@thought.net)
@@ -372,11 +372,11 @@ pyro_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
int s;
s = splhigh();
- membar(Sync);
+ __membar("#Sync");
ci->ci_pci_probe = 1;
val = bus_space_read_4(pc->bustag, pc->bushandle,
(PCITAG_OFFSET(tag) << 4) + reg);
- membar(Sync);
+ __membar("#Sync");
if (ci->ci_pci_fault)
val = 0xffffffff;
ci->ci_pci_probe = ci->ci_pci_fault = 0;
diff --git a/sys/arch/sparc64/dev/schizo.c b/sys/arch/sparc64/dev/schizo.c
index 20799342bfd..33876416b64 100644
--- a/sys/arch/sparc64/dev/schizo.c
+++ b/sys/arch/sparc64/dev/schizo.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: schizo.c,v 1.67 2016/08/23 03:28:01 guenther Exp $ */
+/* $OpenBSD: schizo.c,v 1.68 2017/05/25 03:19:39 dlg Exp $ */
/*
* Copyright (c) 2002 Jason L. Wright (jason@thought.net)
@@ -476,11 +476,11 @@ schizo_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
int s;
s = splhigh();
- membar(Sync);
+ __membar("#Sync");
ci->ci_pci_probe = 1;
val = bus_space_read_4(pc->bustag, pc->bushandle,
PCITAG_OFFSET(tag) + reg);
- membar(Sync);
+ __membar("#Sync");
if (ci->ci_pci_fault)
val = 0xffffffff;
ci->ci_pci_probe = ci->ci_pci_fault = 0;
diff --git a/sys/arch/sparc64/dev/vdsk.c b/sys/arch/sparc64/dev/vdsk.c
index 5be1a856773..530f8e51a4b 100644
--- a/sys/arch/sparc64/dev/vdsk.c
+++ b/sys/arch/sparc64/dev/vdsk.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: vdsk.c,v 1.47 2016/10/13 18:16:42 tom Exp $ */
+/* $OpenBSD: vdsk.c,v 1.48 2017/05/25 03:19:39 dlg Exp $ */
/*
* Copyright (c) 2009, 2011 Mark Kettenis
*
@@ -1093,7 +1093,7 @@ vdsk_submit_cmd(struct scsi_xfer *xs)
sc->sc_vd->vd_desc[desc].offset = lba;
sc->sc_vd->vd_desc[desc].size = xs->datalen;
sc->sc_vd->vd_desc[desc].ncookies = ncookies;
- membar(Sync);
+ membar_sync();
sc->sc_vd->vd_desc[desc].hdr.dstate = VIO_DESC_READY;
sc->sc_vsd[desc].vsd_xs = xs;
diff --git a/sys/arch/sparc64/dev/viommu.c b/sys/arch/sparc64/dev/viommu.c
index 4ded11671eb..91e33cd93eb 100644
--- a/sys/arch/sparc64/dev/viommu.c
+++ b/sys/arch/sparc64/dev/viommu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: viommu.c,v 1.18 2017/04/30 16:45:45 mpi Exp $ */
+/* $OpenBSD: viommu.c,v 1.19 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: iommu.c,v 1.47 2002/02/08 20:03:45 eeh Exp $ */
/*
@@ -884,7 +884,7 @@ viommu_dvmamap_sync(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map,
return;
if (ops & BUS_DMASYNC_PREWRITE)
- membar(MemIssue);
+ __membar("#MemIssue");
#if 0
if (ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE))
@@ -892,7 +892,7 @@ viommu_dvmamap_sync(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map,
#endif
if (ops & BUS_DMASYNC_POSTREAD)
- membar(MemIssue);
+ __membar("#MemIssue");
}
int