diff options
Diffstat (limited to 'sys/arch/sparc64/include/ctlreg.h')
| -rw-r--r-- | sys/arch/sparc64/include/ctlreg.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/sys/arch/sparc64/include/ctlreg.h b/sys/arch/sparc64/include/ctlreg.h index 191b8eb49d2..e033f7ebb2f 100644 --- a/sys/arch/sparc64/include/ctlreg.h +++ b/sys/arch/sparc64/include/ctlreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ctlreg.h,v 1.18 2008/07/05 23:06:06 kettenis Exp $ */ +/* $OpenBSD: ctlreg.h,v 1.19 2008/07/12 07:37:25 kettenis Exp $ */ /* $NetBSD: ctlreg.h,v 1.28 2001/08/06 23:55:34 eeh Exp $ */ /* @@ -246,10 +246,17 @@ * The following are 4u control registers */ +/* Get the CPU's UPA port ID */ +#define UPA_CR_MID(x) (((x) >> 17) & 0x1f) +#define CPU_UPAID UPA_CR_MID(ldxa(0, ASI_MID_REG)) -/* Get the CPU's UPAID */ -#define UPA_CR_MID(x) (((x)>>17)&0x1f) -#define CPU_UPAID UPA_CR_MID(ldxa(0, ASI_MID_REG)) +/* Get the CPU's Fireplane agent ID */ +#define FIREPLANE_CR_AID(x) (((x) >> 17) & 0x3ff) +#define CPU_FIREPLANEID FIREPLANE_CR_AID(ldxa(0, ASI_MID_REG)) + +/* Get the CPU's Jupiter Bus interrupt target ID */ +#define JUPITER_CR_ITID(x) ((x) & 0x3ff) +#define CPU_JUPITERID JUPITER_CR_ITID(ldxa(0, ASI_MID_REG)) /* * [4u] MMU and Cache Control Register (MCCR) |