diff options
Diffstat (limited to 'sys/arch/sparc64/include')
-rw-r--r-- | sys/arch/sparc64/include/asm.h | 8 | ||||
-rw-r--r-- | sys/arch/sparc64/include/autoconf.h | 3 | ||||
-rw-r--r-- | sys/arch/sparc64/include/ctlreg.h | 374 | ||||
-rw-r--r-- | sys/arch/sparc64/include/db_machdep.h | 11 | ||||
-rw-r--r-- | sys/arch/sparc64/include/exec.h | 8 | ||||
-rw-r--r-- | sys/arch/sparc64/include/openfirm.h | 7 | ||||
-rw-r--r-- | sys/arch/sparc64/include/param.h | 20 | ||||
-rw-r--r-- | sys/arch/sparc64/include/psl.h | 11 | ||||
-rw-r--r-- | sys/arch/sparc64/include/reg.h | 10 | ||||
-rw-r--r-- | sys/arch/sparc64/include/signal.h | 31 | ||||
-rw-r--r-- | sys/arch/sparc64/include/vmparam.h | 7 |
11 files changed, 13 insertions, 477 deletions
diff --git a/sys/arch/sparc64/include/asm.h b/sys/arch/sparc64/include/asm.h index f431cd3f9b1..51032d1237c 100644 --- a/sys/arch/sparc64/include/asm.h +++ b/sys/arch/sparc64/include/asm.h @@ -1,4 +1,4 @@ -/* $OpenBSD: asm.h,v 1.2 2001/08/20 20:23:52 jason Exp $ */ +/* $OpenBSD: asm.h,v 1.3 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: asm.h,v 1.15 2000/08/02 22:24:39 eeh Exp $ */ /* @@ -50,12 +50,6 @@ #endif #include <machine/frame.h> -#ifdef __arch64__ -#ifndef __ELF__ -#define __ELF__ -#endif -#endif - /* Pull in CCFSZ, CC64FSZ, and BIAS from frame.h */ #ifndef _LOCORE #define _LOCORE diff --git a/sys/arch/sparc64/include/autoconf.h b/sys/arch/sparc64/include/autoconf.h index 079ea8a154a..cbe44f894ea 100644 --- a/sys/arch/sparc64/include/autoconf.h +++ b/sys/arch/sparc64/include/autoconf.h @@ -1,4 +1,4 @@ -/* $OpenBSD: autoconf.h,v 1.7 2002/03/14 03:16:00 millert Exp $ */ +/* $OpenBSD: autoconf.h,v 1.8 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: autoconf.h,v 1.10 2001/07/24 19:32:11 eeh Exp $ */ /*- @@ -162,7 +162,6 @@ struct bootpath { struct device *dev; /* device that recognised this component */ }; struct bootpath *bootpath_store(int, struct bootpath *); -int sd_crazymap(int); /* Parse a disk string into a dev_t, return device struct pointer */ struct device *parsedisk(char *, int, int, dev_t *); diff --git a/sys/arch/sparc64/include/ctlreg.h b/sys/arch/sparc64/include/ctlreg.h index 1ce17fa4f62..c6ffe50060b 100644 --- a/sys/arch/sparc64/include/ctlreg.h +++ b/sys/arch/sparc64/include/ctlreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ctlreg.h,v 1.6 2002/06/09 23:04:38 mdw Exp $ */ +/* $OpenBSD: ctlreg.h,v 1.7 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: ctlreg.h,v 1.28 2001/08/06 23:55:34 eeh Exp $ */ /* @@ -473,7 +473,6 @@ static __inline__ u_int64_t casxa(paddr_t loc, int asi, u_int64_t value, u_int64_t oldvalue); #endif -#ifdef __arch64__ static __inline__ u_char lduba(paddr_t loc, int asi) { @@ -495,34 +494,7 @@ lduba(paddr_t loc, int asi) } return (_lduba_v); } -#else -static __inline__ u_char -lduba(paddr_t loc, int asi) -{ - register unsigned int _lduba_v, _loc_hi, _pstate; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %4,%%g0,%%asi; " -" andn %2,0x1f,%0; stxa %%g0,[%0] %5; rdpr %%pstate,%1; " -" sllx %3,32,%0; or %0,%2,%0; wrpr %1,8,%%pstate; " -" membar #Sync; lduba [%0]%%asi,%0; wrpr %1,0,%%pstate; " -" andn %2,0x1f,%1; membar #Sync; stxa %%g0,[%1] %5; " -" membar #Sync; wr %%g0, 0x82, %%asi" : - "=&r" (_lduba_v), "=&r" (_pstate) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi), "n" (ASI_DCACHE_TAG)); - } else { - __asm __volatile("wr %3,%%g0,%%asi; sllx %2,32,%0; " -" or %0,%1,%0; lduba [%0]%%asi,%0; wr %%g0, 0x82, %%asi" : "=&r" (_lduba_v) : - "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi)); - } - return (_lduba_v); -} -#endif -#ifdef __arch64__ /* load half-word from alternate address space */ static __inline__ u_short lduha(paddr_t loc, int asi) @@ -545,34 +517,7 @@ lduha(paddr_t loc, int asi) } return (_lduha_v); } -#else -/* load half-word from alternate address space */ -static __inline__ u_short -lduha(paddr_t loc, int asi) { - register unsigned int _lduha_v, _loc_hi, _pstate; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %4,%%g0,%%asi; rdpr %%pstate,%1; " -" andn %2,0x1f,%0; stxa %%g0,[%0] %5; wrpr %1,8,%%pstate; sllx %3,32,%0; " -" or %0,%2,%0; membar #Sync; lduha [%0]%%asi,%0; wrpr %1,0,%%pstate; " -" andn %2,0x1f,%1; membar #Sync; stxa %%g0,[%1] %5; " -" membar #Sync; wr %%g0, 0x82, %%asi" : - "=&r" (_lduha_v), "=&r" (_pstate) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi), "n" (ASI_DCACHE_TAG)); - } else { - __asm __volatile("wr %3,%%g0,%%asi; sllx %2,32,%0; " -" or %0,%1,%0; lduha [%0]%%asi,%0; wr %%g0, 0x82, %%asi" : "=&r" (_lduha_v) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), "r" (asi)); - } - return (_lduha_v); -} -#endif - - -#ifdef __arch64__ /* load unsigned int from alternate address space */ static __inline__ u_int lda(paddr_t loc, int asi) @@ -617,59 +562,7 @@ ldswa(paddr_t loc, int asi) } return (_lda_v); } -#else /* __arch64__ */ -/* load unsigned int from alternate address space */ -static __inline__ u_int -lda(paddr_t loc, int asi) -{ - register unsigned int _lda_v, _loc_hi, _pstate; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %4,%%g0,%%asi; rdpr %%pstate,%1;" -" andn %2,0x1f,%0; stxa %%g0,[%0] %5; wrpr %1,8,%%pstate; " -" sllx %3,32,%0; or %0,%2,%0; membar #Sync;lda [%0]%%asi,%0; " -" wrpr %1,0,%%pstate; andn %2,0x1f,%1; membar #Sync; " -" stxa %%g0,[%1] %5; membar #Sync; " -" wr %%g0, 0x82, %%asi" : "=&r" (_lda_v), "=&r" (_pstate) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi), "n" (ASI_DCACHE_TAG)); - } else { - __asm __volatile("wr %3,%%g0,%%asi; sllx %2,32,%0; " -" or %0,%1,%0; lda [%0]%%asi,%0; wr %%g0, 0x82, %%asi" : "=&r" (_lda_v) : - "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi)); - } - return (_lda_v); -} - -/* load signed int from alternate address space */ -static __inline__ int -ldswa(paddr_t loc, int asi) -{ - register int _lda_v, _loc_hi, _pstate; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %4,%%g0,%%asi; rdpr %%pstate,%1;" -" andn %2,0x1f,%0; stxa %%g0,[%0] %5; wrpr %1,8,%%pstate; sllx %3,32,%0;" -" or %0,%2,%0; membar #Sync; ldswa [%0]%%asi,%0; wrpr %1,0,%%pstate; " -" andn %2,0x1f,%1; membar #Sync; stxa %%g0,[%1] %5; membar #Sync; " -" wr %%g0, 0x82, %%asi" : - "=&r" (_lda_v), "=&r" (_pstate) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi), "n" (ASI_DCACHE_TAG)); - } else { - __asm __volatile("wr %3,%%g0,%%asi; sllx %2,32,%0; " -" or %0,%1,%0; ldswa [%0]%%asi,%0; wr %%g0, 0x82, %%asi" : "=&r" (_lda_v) : - "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi)); - } - return (_lda_v); -} -#endif /* __arch64__ */ -#ifdef __arch64__ /* load 64-bit int from alternate address space -- these should never be used */ static __inline__ u_int64_t ldda(paddr_t loc, int asi) @@ -692,34 +585,7 @@ ldda(paddr_t loc, int asi) } return (_lda_v); } -#else -/* load 64-bit int from alternate address space */ -static __inline__ u_int64_t -ldda(paddr_t loc, int asi) -{ - register long long _lda_v, _loc_hi, _pstate; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %4,%%g0,%%asi; rdpr %%pstate,%1;" -" andn %2,0x1f,%0; rdpr %%pstate,%1; stxa %%g0,[%0] %5; wrpr %1,8,%%pstate;" -" sllx %3,32,%0; or %0,%2,%0; membar #Sync; ldda [%0]%%asi,%0; wrpr %1,0,%%pstate; " -" andn %2,0x1f,%1; membar #Sync; stxa %%g0,[%1] %5; membar #Sync; " -" wr %%g0, 0x82, %%asi" : - "=&r" (_lda_v), "=&r" (_pstate) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi), "n" (ASI_DCACHE_TAG)); - } else { - __asm __volatile("wr %3,%%g0,%%asi; sllx %2,32,%0; " -" or %0,%1,%0; ldda [%0]%%asi,%0; wr %%g0, 0x82, %%asi" : "=&r" (_lda_v) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), "r" (asi)); - } - return (_lda_v); -} -#endif - -#ifdef __arch64__ /* native load 64-bit int from alternate address space w/64-bit compiler*/ static __inline__ u_int64_t ldxa(paddr_t loc, int asi) @@ -742,37 +608,8 @@ ldxa(paddr_t loc, int asi) } return (_lda_v); } -#else -/* native load 64-bit int from alternate address space w/32-bit compiler*/ -static __inline__ u_int64_t -ldxa(paddr_t loc, int asi) -{ - register unsigned long _ldxa_lo, _ldxa_hi, _loc_hi; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %4,%%g0,%%asi; " -" andn %2,0x1f,%0; rdpr %%pstate,%1; stxa %%g0,[%0] %5; " -" sllx %3,32,%0; wrpr %1,8,%%pstate; or %0,%2,%0; membar #Sync; ldxa [%0]%%asi,%0; " -" wrpr %1,0,%%pstate; andn %2,0x1f,%1; membar #Sync; stxa %%g0,[%1] %5; membar #Sync; " -" srlx %0,32,%1; srl %0,0,%0; wr %%g0, 0x82, %%asi" : - "=&r" (_ldxa_lo), "=&r" (_ldxa_hi) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi), "n" (ASI_DCACHE_TAG)); - } else { - __asm __volatile("wr %4,%%g0,%%asi; sllx %3,32,%0; " -" or %0,%2,%0; ldxa [%0]%%asi,%0; srlx %0,32,%1; " -" srl %0,0,%0;; wr %%g0, 0x82, %%asi" : - "=&r" (_ldxa_lo), "=&r" (_ldxa_hi) : - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi)); - } - return ((((int64_t)_ldxa_hi)<<32)|_ldxa_lo); -} -#endif /* store byte to alternate address space */ -#ifdef __arch64__ static __inline__ void stba(paddr_t loc, int asi, u_char value) { @@ -790,32 +627,8 @@ stba(paddr_t loc, int asi, u_char value) "r" (asi)); } } -#else -static __inline__ void -stba(paddr_t loc, int asi, u_char value) -{ - register int _loc_hi, _pstate; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %5,%%g0,%%asi; sllx %4,32,%0; rdpr %%pstate,%1;" -" or %3,%0,%0; wrpr %1,8,%%pstate; stba %2,[%0]%%asi; wrpr %1,0,%%pstate; " -" andn %0,0x1f,%1; membar #Sync; stxa %%g0,[%1] %6; membar #Sync; " -" wr %%g0, 0x82, %%asi" : - "=&r" (_loc_hi), "=&r" (_pstate) : - "r" ((int)(value)), "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi), "n" (ASI_DCACHE_TAG)); - } else { - __asm __volatile("wr %4,%%g0,%%asi; sllx %3,32,%0; " -" or %2,%0,%0; stba %1,[%0]%%asi; wr %%g0, 0x82, %%asi" : "=&r" (_loc_hi) : - "r" ((int)(value)), "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi)); - } -} -#endif /* store half-word to alternate address space */ -#ifdef __arch64__ static __inline__ void stha(paddr_t loc, int asi, u_short value) { @@ -833,34 +646,8 @@ stha(paddr_t loc, int asi, u_short value) "r" (asi) : "memory"); } } -#else -static __inline__ void -stha(paddr_t loc, int asi, u_short value) -{ - register int _loc_hi, _pstate; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %5,%%g0,%%asi; sllx %4,32,%0; rdpr %%pstate,%1;" -" or %3,%0,%0; wrpr %1,8,%%pstate; stha %2,[%0]%%asi; wrpr %1,0,%%pstate; " -" andn %0,0x1f,%1; membar #Sync; stxa %%g0,[%1] %6; membar #Sync; " -" wr %%g0, 0x82, %%asi" : - "=&r" (_loc_hi), "=&r" (_pstate) : - "r" ((int)(value)), "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi), - "n" (ASI_DCACHE_TAG) : "memory"); - } else { - __asm __volatile("wr %4,%%g0,%%asi; sllx %3,32,%0; " -" or %2,%0,%0; stha %1,[%0]%%asi; wr %%g0, 0x82, %%asi" : "=&r" (_loc_hi) : - "r" ((int)(value)), "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi) : "memory"); - } -} -#endif - /* store int to alternate address space */ -#ifdef __arch64__ static __inline__ void sta(paddr_t loc, int asi, u_int value) { @@ -878,33 +665,8 @@ sta(paddr_t loc, int asi, u_int value) "r" (asi) : "memory"); } } -#else -static __inline__ void -sta(paddr_t loc, int asi, u_int value) -{ - register int _loc_hi, _pstate; - - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %5,%%g0,%%asi; sllx %4,32,%0; rdpr %%pstate,%1;" -" or %3,%0,%0; wrpr %1,8,%%pstate; sta %2,[%0]%%asi; wrpr %1,0,%%pstate; " -" andn %0,0x1f,%1; membar #Sync; stxa %%g0,[%1] %6; membar #Sync; " -" wr %%g0, 0x82, %%asi" : - "=&r" (_loc_hi), "=&r" (_pstate) : - "r" ((int)(value)), "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi), - "n" (ASI_DCACHE_TAG) : "memory"); - } else { - __asm __volatile("wr %4,%%g0,%%asi; sllx %3,32,%0; " -" or %2,%0,%0; sta %1,[%0]%%asi; wr %%g0, 0x82, %%asi" : "=&r" (_loc_hi) : - "r" ((int)(value)), "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi) : "memory"); - } -} -#endif /* store 64-bit int to alternate address space */ -#ifdef __arch64__ static __inline__ void stda(paddr_t loc, int asi, u_int64_t value) { @@ -922,33 +684,7 @@ stda(paddr_t loc, int asi, u_int64_t value) "r" (asi) : "memory"); } } -#else -static __inline__ void -stda(paddr_t loc, int asi, u_int64_t value) -{ - register int _loc_hi, _pstate; - _loc_hi = (((u_int64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm __volatile("wr %5,%%g0,%%asi; sllx %4,32,%0; rdpr %%pstate,%1; " -" or %3,%0,%0; wrpr %1,8,%%pstate; stda %2,[%0]%%asi; wrpr %1,0,%%pstate;" -" andn %0,0x1f,%1; membar #Sync; stxa %%g0,[%1] %6; membar #Sync; " -" wr %%g0, 0x82, %%asi" : - "=&r" (_loc_hi), "=&r" (_pstate) : - "r" ((long long)(value)), "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi), - "n" (ASI_DCACHE_TAG) : "memory"); - } else { - __asm __volatile("wr %4,%%g0,%%asi; sllx %3,32,%0; " -" or %2,%0,%0; stda %1,[%0]%%asi; wr %%g0, 0x82, %%asi" : - "=&r" (_loc_hi) : - "r" ((long long)(value)), "r" ((unsigned long)(loc)), - "r" (_loc_hi), "r" (asi) : "memory"); - } -} -#endif - -#ifdef __arch64__ /* native store 64-bit int to alternate address space w/64-bit compiler*/ static __inline__ void stxa(paddr_t loc, int asi, u_int64_t value) @@ -968,104 +704,6 @@ stxa(paddr_t loc, int asi, u_int64_t value) "r" ((unsigned long)(loc)), "r" (asi) : "memory"); } } -#else -/* native store 64-bit int to alternate address space w/32-bit compiler*/ -static __inline__ void -stxa(paddr_t loc, int asi, u_int64_t value) -{ - int _stxa_lo, _stxa_hi, _loc_hi; - - _stxa_lo = value; - _stxa_hi = ((u_int64_t)value)>>32; - _loc_hi = (((u_int64_t)(u_long)loc)>>32); - - if (PHYS_ASI(asi)) { - __asm __volatile("wr %7,%%g0,%%asi; sllx %4,32,%1; sllx %6,32,%0; " -" or %1,%3,%1; rdpr %%pstate,%2; or %0,%5,%0; wrpr %2,8,%%pstate; " -" stxa %1,[%0]%%asi; wrpr %2,0,%%pstate; andn %0,0x1f,%1; " -" membar #Sync; stxa %%g0,[%1] %8; membar #Sync; wr %%g0, 0x82, %%asi" : - "=&r" (_loc_hi), "=&r" (_stxa_hi), - "=&r" ((int)(_stxa_lo)) : - "r" ((int)(_stxa_lo)), "r" ((int)(_stxa_hi)), - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi), "n" (ASI_DCACHE_TAG) : "memory"); - } else { - __asm __volatile("wr %6,%%g0,%%asi; sllx %3,32,%1; sllx %5,32,%0; " -" or %1,%2,%1; or %0,%4,%0; stxa %1,[%0]%%asi; wr %%g0, 0x82, %%asi" : - "=&r" (_loc_hi), "=&r" (_stxa_hi) : - "r" ((int)(_stxa_lo)), "r" ((int)(_stxa_hi)), - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi) : "memory"); - } -} -#endif - -#if 0 -#ifdef __arch64__ -/* native store 64-bit int to alternate address space w/64-bit compiler*/ -static __inline__ u_int64_t -casxa(paddr_t loc, int asi, u_int64_t value, u_int64_t oldvalue) -{ - if (PHYS_ASI(asi)) { - __asm __volatile("wr %4,%%g0,%%asi; casxa [%3]%%asi,%2,%1;" -" andn %3,0x1f,%0; membar #Sync; stxa %%g0,[%0] %5; membar #Sync; " -" wr %%g0, 0x82, %%asi" : - "=&r" (loc), "+r" (value) : - "r" ((unsigned long)(oldvalue)), - "r" ((unsigned long)(loc)), - "r" (asi), "n" (ASI_DCACHE_TAG) : "memory"); - } else { - __asm __volatile("wr %3,%%g0,%%asi; casxa [%1]%%asi,%2,%0; " -" wr %%g0, 0x82, %%asi" : - "+r" (value) : - "r" ((unsigned long)(loc)), "r" (oldvalue), "r" (asi) : - "memory"); - } - return (value); -} -#else -/* native store 64-bit int to alternate address space w/32-bit compiler*/ -static __inline__ u_int64_t -casxa(paddr_t loc, int asi, u_int64_t value, u_int64_t oldvalue) -{ - int _casxa_lo, _casxa_hi, _loc_hi, _oval_hi; - - _casxa_lo = value; - _casxa_hi = ((u_int64_t)value)>>32; - _oval_hi = ((u_int64_t)oldvalue)>>32; - _loc_hi = (((u_int64_t)(u_long)loc)>>32); - -#ifdef __notyet -/* - * gcc cannot handle this since it thinks it has >10 asm operands. - */ - if (PHYS_ASI(asi)) { - __asm __volatile("wr %6,%%g0,%%asi; sllx %1,32,%1; sllx %0,32,%0; " -" sllx %3,32,%3; or %1,%2,%1; rdpr %%pstate,%2; or %0,%4,%0; or %3,%5,%3; " -" wrpr %2,8,%%pstate; casxa [%0]%%asi,%3,%1; wrpr %2,0,%%pstate; " -" andn %0,0x1f,%3; membar #Sync; stxa %%g0,[%3] %7; membar #Sync; " -" sll %1,0,%2; srax %1,32,%1; wr %%g0, 0x82, %%asi " : - "+r" (_loc_hi), "+r" (_casxa_hi), - "+r" (_casxa_lo), "+r" (_oval_hi) : - "r" ((unsigned long)(loc)), - "r" ((unsigned int)(oldvalue)), - "r" (asi), "n" (ASI_DCACHE_TAG)); - } else { - __asm __volatile("wr %7,%%g0,%%asi; sllx %1,32,%1; sllx %5,32,%0; " -" or %1,%2,%1; sllx %3,32,%2; or %0,%4,%0; or %2,%4,%2; " -" casxa [%0]%%asi,%2,%1; sll %1,0,%2; srax %o1,32,%o1; wr %%g0, 0x82, %%asi " : - "=&r" (_loc_hi), "+r" (_casxa_hi), "+r" (_casxa_lo) : - "r" ((int)(_oval_hi)), "r" ((int)(oldvalue)), - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi) : "memory"); - } -#endif - return (((u_int64_t)_casxa_hi<<32)|(u_int64_t)_casxa_lo); -} -#endif -#endif /* 0 */ - - /* flush address from data cache */ #define flush(loc) ({ \ @@ -1113,22 +751,12 @@ casxa(paddr_t loc, int asi, u_int64_t value, u_int64_t oldvalue) /* Complete all outstanding stores before any new loads */ #define membar_lookaside() __asm __volatile("membar #Lookaside" : :) -#ifdef __arch64__ /* read 64-bit %tick register */ #define tick() ({ \ register u_long _tick_tmp; \ __asm __volatile("rdpr %%tick, %0" : "=r" (_tick_tmp) :); \ _tick_tmp; \ }) -#else -/* read 64-bit %tick register on 32-bit system */ -#define tick() ({ \ - register u_int _tick_hi = 0, _tick_lo = 0; \ - __asm __volatile("rdpr %%tick, %0; srl %0,0,%1; srlx %0,32,%0 " \ - : "=r" (_tick_hi), "=r" (_tick_lo) : ); \ - (((u_int64_t)_tick_hi)<<32)|((u_int64_t)_tick_lo); \ -}) -#endif extern void next_tick(long); #endif diff --git a/sys/arch/sparc64/include/db_machdep.h b/sys/arch/sparc64/include/db_machdep.h index 80c00ed7571..1d9e84106e8 100644 --- a/sys/arch/sparc64/include/db_machdep.h +++ b/sys/arch/sparc64/include/db_machdep.h @@ -1,4 +1,4 @@ -/* $OpenBSD: db_machdep.h,v 1.6 2002/03/14 01:26:45 millert Exp $ */ +/* $OpenBSD: db_machdep.h,v 1.7 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: db_machdep.h,v 1.12 2001/07/07 15:16:13 eeh Exp $ */ /* @@ -144,16 +144,9 @@ int kdb_trap(int, struct trapframe64 *); /* * We will use elf symbols in DDB when they work. */ -#if 1 #define DB_ELF_SYMBOLS -#ifdef __arch64__ #define DB_ELFSIZE 64 -#else -#define DB_ELFSIZE 32 -#endif -#else -#define DB_AOUT_SYMBOLS -#endif + /* * KGDB definitions */ diff --git a/sys/arch/sparc64/include/exec.h b/sys/arch/sparc64/include/exec.h index 3773b9ea9fb..e844bf0fdcc 100644 --- a/sys/arch/sparc64/include/exec.h +++ b/sys/arch/sparc64/include/exec.h @@ -1,4 +1,4 @@ -/* $OpenBSD: exec.h,v 1.5 2001/08/19 20:20:45 art Exp $ */ +/* $OpenBSD: exec.h,v 1.6 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: elf_machdep.h,v 1.7 2001/02/11 00:18:49 eeh Exp $ */ #define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB @@ -17,15 +17,9 @@ #define _KERN_DO_ELF64 #define _NLIST_DO_ELF -#ifdef __arch64__ #define ARCH_ELFSIZE 64 /* MD native binary size */ #define ELF_TARG_CLASS ELFCLASS64 #define ELF_TARG_MACH EM_SPARCV9 -#else -#define ARCH_ELFSIZE 32 /* MD native binary size */ -#define ELF_TARG_CLASS ELFCLASS32 -#define ELF_TARG_MACH EM_SPARC -#endif #define ELF_TARG_DATA ELFDATA2MSB diff --git a/sys/arch/sparc64/include/openfirm.h b/sys/arch/sparc64/include/openfirm.h index 7d27aaff1ad..e70f7bda1be 100644 --- a/sys/arch/sparc64/include/openfirm.h +++ b/sys/arch/sparc64/include/openfirm.h @@ -1,4 +1,4 @@ -/* $OpenBSD: openfirm.h,v 1.3 2002/03/14 03:16:00 millert Exp $ */ +/* $OpenBSD: openfirm.h,v 1.4 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: openfirm.h,v 1.8 2001/07/20 00:07:14 eeh Exp $ */ /* @@ -39,13 +39,8 @@ /* All cells are 8 byte slots */ typedef u_int64_t cell_t; -#ifdef __arch64__ #define HDL2CELL(x) (cell_t)(u_int)(int)(x) #define ADR2CELL(x) (cell_t)(x) -#else -#define HDL2CELL(x) (cell_t)(u_int)(int)(x) -#define ADR2CELL(x) (cell_t)(u_int)(int)(x) -#endif int OF_test (char *service); int OF_test_method (int handle, char *method); diff --git a/sys/arch/sparc64/include/param.h b/sys/arch/sparc64/include/param.h index 1f3e8743857..1839527cce7 100644 --- a/sys/arch/sparc64/include/param.h +++ b/sys/arch/sparc64/include/param.h @@ -1,4 +1,4 @@ -/* $OpenBSD: param.h,v 1.10 2002/06/15 00:38:37 art Exp $ */ +/* $OpenBSD: param.h,v 1.11 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: param.h,v 1.25 2001/05/30 12:28:51 mrg Exp $ */ /* @@ -73,15 +73,9 @@ #define _MACHINE sparc64 #define MACHINE "sparc64" -#ifdef __arch64__ #define _MACHINE_ARCH sparc64 #define MACHINE_ARCH "sparc64" #define MID_MACHINE MID_SPARC64 -#else -#define _MACHINE_ARCH sparc -#define MACHINE_ARCH "sparc" -#define MID_MACHINE MID_SPARC -#endif #ifdef _KERNEL /* XXX */ #ifndef _LOCORE /* XXX */ @@ -100,13 +94,7 @@ * (within reasonable limits). * */ -#define ALIGNBYTES32 0x7 -#define ALIGNBYTES64 0xf -#ifdef __arch64__ -#define ALIGNBYTES ALIGNBYTES64 -#else -#define ALIGNBYTES ALIGNBYTES32 -#endif +#define ALIGNBYTES 0xf #define ALIGN(p) (((u_long)(p) + ALIGNBYTES) & ~ALIGNBYTES) #define ALIGN32(p) (((u_long)(p) + ALIGNBYTES32) & ~ALIGNBYTES32) #define ALIGNED_POINTER(p,t) ((((u_long)(p)) & (sizeof(t)-1)) == 0) @@ -127,12 +115,8 @@ extern int nbpg, pgofset, pgshift; #define BLKDEV_IOSIZE 2048 #define MAXPHYS (64 * 1024) -#ifdef __arch64__ /* We get stack overflows w/8K stacks in 64-bit mode */ #define SSIZE 2 /* initial stack size in pages */ -#else -#define SSIZE 2 -#endif #define USPACE (SSIZE*8192) diff --git a/sys/arch/sparc64/include/psl.h b/sys/arch/sparc64/include/psl.h index 846a443fedb..2a44d978c59 100644 --- a/sys/arch/sparc64/include/psl.h +++ b/sys/arch/sparc64/include/psl.h @@ -1,4 +1,4 @@ -/* $OpenBSD: psl.h,v 1.7 2002/06/11 05:01:17 art Exp $ */ +/* $OpenBSD: psl.h,v 1.8 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: psl.h,v 1.20 2001/04/13 23:30:05 thorpej Exp $ */ /* @@ -150,21 +150,12 @@ * about possible memory barrier bugs. */ -#ifdef __arch64__ #define PSTATE_PROM (PSTATE_MM_TSO|PSTATE_PRIV) #define PSTATE_NUCLEUS (PSTATE_MM_TSO|PSTATE_PRIV|PSTATE_AG) #define PSTATE_KERN (PSTATE_MM_TSO|PSTATE_PRIV) #define PSTATE_INTR (PSTATE_KERN|PSTATE_IE) #define PSTATE_USER32 (PSTATE_MM_TSO|PSTATE_AM|PSTATE_IE) #define PSTATE_USER (PSTATE_MM_RMO|PSTATE_IE) -#else -#define PSTATE_PROM (PSTATE_MM_TSO|PSTATE_PRIV) -#define PSTATE_NUCLEUS (PSTATE_MM_TSO|PSTATE_AM|PSTATE_PRIV|PSTATE_AG) -#define PSTATE_KERN (PSTATE_MM_TSO|PSTATE_AM|PSTATE_PRIV) -#define PSTATE_INTR (PSTATE_KERN|PSTATE_IE) -#define PSTATE_USER32 (PSTATE_MM_TSO|PSTATE_AM|PSTATE_IE) -#define PSTATE_USER (PSTATE_MM_TSO|PSTATE_AM|PSTATE_IE) -#endif /* diff --git a/sys/arch/sparc64/include/reg.h b/sys/arch/sparc64/include/reg.h index 4026348d993..5f6e81e3415 100644 --- a/sys/arch/sparc64/include/reg.h +++ b/sys/arch/sparc64/include/reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: reg.h,v 1.2 2002/03/17 18:38:43 art Exp $ */ +/* $OpenBSD: reg.h,v 1.3 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: reg.h,v 1.8 2001/06/19 12:59:16 wiz Exp $ */ /* @@ -193,19 +193,11 @@ struct fpreg32 { int fr_fsr; /* %fsr */ }; -#if defined(__arch64__) /* Here we gotta do naughty things to let gdb work on 32-bit binaries */ #define reg reg64 #define fpreg fpreg64 #define fpstate fpstate64 #define trapframe trapframe64 #define rwindow rwindow64 -#else -#define reg reg32 -#define fpreg fpreg32 -#define fpstate fpstate32 -#define trapframe trapframe32 -#define rwindow rwindow32 -#endif #endif /* _MACHINE_REG_H_ */ diff --git a/sys/arch/sparc64/include/signal.h b/sys/arch/sparc64/include/signal.h index f273daf3029..237ba5b6191 100644 --- a/sys/arch/sparc64/include/signal.h +++ b/sys/arch/sparc64/include/signal.h @@ -1,4 +1,4 @@ -/* $OpenBSD: signal.h,v 1.3 2001/11/17 20:43:22 deraadt Exp $ */ +/* $OpenBSD: signal.h,v 1.4 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: signal.h,v 1.10 2001/05/09 19:50:49 kleink Exp $ */ /* @@ -65,23 +65,6 @@ typedef int sig_atomic_t; * * All machines must have an sc_onstack and sc_mask. */ -#if defined(__LIBC12_SOURCE__) || defined(_KERNEL) -struct sigcontext13 { - int sc_onstack; /* sigstack state to restore */ - int sc_mask; /* signal mask to restore (old style) */ - /* begin machine dependent portion */ - long sc_sp; /* %sp to restore */ - long sc_pc; /* pc to restore */ - long sc_npc; /* npc to restore */ -#ifdef __arch64__ - long sc_tstate; /* tstate to restore */ -#else - long sc_psr; /* psr portion to restore */ -#endif - long sc_g1; /* %g1 to restore */ - long sc_o0; /* %o0 to restore */ -}; -#endif /* __LIBC12_SOURCE__ || _KERNEL */ struct sigcontext { int sc_onstack; /* sigstack state to restore */ int __sc_mask13; /* signal mask to restore (old style) */ @@ -89,23 +72,11 @@ struct sigcontext { long sc_sp; /* %sp to restore */ long sc_pc; /* pc to restore */ long sc_npc; /* npc to restore */ -#ifdef __arch64__ long sc_tstate; /* tstate to restore */ -#else - long sc_psr; /* psr portion to restore */ -#endif long sc_g1; /* %g1 to restore */ long sc_o0; /* %o0 to restore */ int sc_mask; /* signal mask to restore (new style) */ }; -#else /* _LOCORE */ -/* XXXXX These values don't work for _LP64 */ -#define SC_SP_OFFSET 8 -#define SC_PC_OFFSET 12 -#define SC_NPC_OFFSET 16 -#define SC_PSR_OFFSET 20 -#define SC_G1_OFFSET 24 -#define SC_O0_OFFSET 28 #endif /* _LOCORE */ /* diff --git a/sys/arch/sparc64/include/vmparam.h b/sys/arch/sparc64/include/vmparam.h index 3a940230deb..2bdc7a09b97 100644 --- a/sys/arch/sparc64/include/vmparam.h +++ b/sys/arch/sparc64/include/vmparam.h @@ -1,4 +1,4 @@ -/* $OpenBSD: vmparam.h,v 1.8 2002/03/14 01:26:45 millert Exp $ */ +/* $OpenBSD: vmparam.h,v 1.9 2002/06/15 17:23:31 art Exp $ */ /* $NetBSD: vmparam.h,v 1.18 2001/05/01 02:19:19 thorpej Exp $ */ /* @@ -57,12 +57,7 @@ * is the top (end) of the user stack. */ #define USRTEXT 0x2000 /* Start of user text */ -#define USRSTACK32 0xffffe000L -#ifdef __arch64__ #define USRSTACK 0xffffffffffffe000L -#else -#define USRSTACK USRSTACK32 -#endif /* * Virtual memory related constants, all in bytes |