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-rw-r--r--sys/arch/sun3/dev/cg4.c6
-rw-r--r--sys/arch/sun3/dev/if_ie.c46
-rw-r--r--sys/arch/sun3/dev/if_le.c74
-rw-r--r--sys/arch/sun3/dev/if_levar.h33
-rw-r--r--sys/arch/sun3/dev/kd.c10
-rw-r--r--sys/arch/sun3/dev/si.c28
-rw-r--r--sys/arch/sun3/dev/si_obio.c156
-rw-r--r--sys/arch/sun3/dev/si_vme.c119
-rw-r--r--sys/arch/sun3/dev/xd.c6
-rw-r--r--sys/arch/sun3/dev/xy.c9
-rw-r--r--sys/arch/sun3/dev/zs.c39
-rw-r--r--sys/arch/sun3/dev/zs_kgdb.c42
12 files changed, 272 insertions, 296 deletions
diff --git a/sys/arch/sun3/dev/cg4.c b/sys/arch/sun3/dev/cg4.c
index 99f4ed80872..7c3be6c1e63 100644
--- a/sys/arch/sun3/dev/cg4.c
+++ b/sys/arch/sun3/dev/cg4.c
@@ -1,4 +1,4 @@
-/* $NetBSD: cg4.c,v 1.7 1996/03/17 02:03:45 thorpej Exp $ */
+/* $NetBSD: cg4.c,v 1.7.4.1 1996/08/08 23:14:47 gwr Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -162,7 +162,7 @@ cg4attach(parent, self, args)
struct confargs *ca = args;
struct fbtype *fbt;
volatile struct bt_regs *bt;
- int i, ramsize, pa;
+ int i;
fb->fb_driver = &cg4fbdriver;
fb->fb_private = sc;
@@ -178,7 +178,7 @@ cg4attach(parent, self, args)
fbt->fb_size = CG4_MMAP_SIZE;
sc->sc_phys = ca->ca_paddr;
- sc->sc_bt = (struct bt_regs *)
+ sc->sc_bt = bt = (volatile struct bt_regs *)
bus_mapin(ca->ca_bustype, ca->ca_paddr,
sizeof(struct bt_regs *));
diff --git a/sys/arch/sun3/dev/if_ie.c b/sys/arch/sun3/dev/if_ie.c
index 3309c3d3a33..2ab99bc4a20 100644
--- a/sys/arch/sun3/dev/if_ie.c
+++ b/sys/arch/sun3/dev/if_ie.c
@@ -1,4 +1,4 @@
-/* $NetBSD: if_ie.c,v 1.10 1996/03/26 22:04:14 gwr Exp $ */
+/* $NetBSD: if_ie.c,v 1.12 1996/05/09 21:15:47 thorpej Exp $ */
/*-
* Copyright (c) 1993, 1994, 1995 Charles Hannum.
@@ -128,6 +128,11 @@
#include <netinet/if_ether.h>
#endif
+#ifdef NS
+#include <netns/ns.h>
+#include <netns/ns_if.h>
+#endif
+
#include <vm/vm.h>
/*
@@ -162,7 +167,7 @@ static struct mbuf *last_not_for_us;
#define ETHER_MAX_LEN 1518
#define ETHER_ADDR_LEN 6
-void iewatchdog __P(( /* short */ ));
+void iewatchdog __P((struct ifnet *));
int ieinit __P((struct ie_softc *));
int ieioctl __P((struct ifnet *, u_long, caddr_t));
void iestart __P((struct ifnet *));
@@ -293,8 +298,8 @@ ie_attach(sc)
/*
* Initialize and attach S/W interface
*/
- ifp->if_unit = sc->sc_dev.dv_unit;
- ifp->if_name = ie_cd.cd_name;
+ bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
+ ifp->if_softc = sc;
ifp->if_start = iestart;
ifp->if_ioctl = ieioctl;
ifp->if_watchdog = iewatchdog;
@@ -314,10 +319,10 @@ ie_attach(sc)
* generate an interrupt after a transmit has been started on it.
*/
void
-iewatchdog(unit)
- short unit;
+iewatchdog(ifp)
+ struct ifnet *ifp;
{
- struct ie_softc *sc = ie_cd.cd_devs[unit];
+ struct ie_softc *sc = ifp->if_softc;
log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
++sc->sc_arpcom.ac_if.if_oerrors;
@@ -1037,7 +1042,7 @@ void
iestart(ifp)
struct ifnet *ifp;
{
- struct ie_softc *sc = ie_cd.cd_devs[ifp->if_unit];
+ struct ie_softc *sc = ifp->if_softc;
struct mbuf *m0, *m;
u_char *buffer;
u_short len;
@@ -1556,18 +1561,13 @@ ieioctl(ifp, cmd, data)
u_long cmd;
caddr_t data;
{
- struct ie_softc *sc = ie_cd.cd_devs[ifp->if_unit];
+ struct ie_softc *sc = ifp->if_softc;
struct ifaddr *ifa = (struct ifaddr *) data;
struct ifreq *ifr = (struct ifreq *) data;
int s, error = 0;
s = splnet();
- if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
- splx(s);
- return error;
- }
-
switch (cmd) {
case SIOCSIFADDR:
@@ -1580,6 +1580,24 @@ ieioctl(ifp, cmd, data)
arp_ifinit(&sc->sc_arpcom, ifa);
break;
#endif
+#ifdef NS
+ /* XXX - This code is probably wrong. */
+ case AF_NS:
+ {
+ struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
+
+ if (ns_nullhost(*ina))
+ ina->x_host =
+ *(union ns_host *)(sc->sc_arpcom.ac_enaddr);
+ else
+ bcopy(ina->x_host.c_host,
+ sc->sc_arpcom.ac_enaddr,
+ sizeof(sc->sc_arpcom.ac_enaddr));
+ /* Set new address. */
+ ieinit(sc);
+ break;
+ }
+#endif /* NS */
default:
ieinit(sc);
break;
diff --git a/sys/arch/sun3/dev/if_le.c b/sys/arch/sun3/dev/if_le.c
index 10d21fcc04e..63d008828e7 100644
--- a/sys/arch/sun3/dev/if_le.c
+++ b/sys/arch/sun3/dev/if_le.c
@@ -1,4 +1,4 @@
-/* $NetBSD: if_le.c,v 1.28 1996/04/22 02:25:54 christos Exp $ */
+/* $NetBSD: if_le.c,v 1.29 1996/05/07 01:32:31 thorpej Exp $ */
/*-
* Copyright (c) 1995 Charles M. Hannum. All rights reserved.
@@ -62,50 +62,39 @@
#include <machine/obio.h>
#include <machine/idprom.h>
-#include <sun3/dev/if_lereg.h>
-#include <sun3/dev/if_levar.h>
#include <dev/ic/am7990reg.h>
-#define LE_NEED_BUF_CONTIG
#include <dev/ic/am7990var.h>
-#define LE_SOFTC(unit) le_cd.cd_devs[unit]
-#define LE_DELAY(x) DELAY(x)
+#include <sun3/dev/if_lereg.h>
+#include <sun3/dev/if_levar.h>
static int le_match __P((struct device *, void *, void *));
static void le_attach __P((struct device *, struct device *, void *));
-int leintr __P((void *));
struct cfattach le_ca = {
sizeof(struct le_softc), le_match, le_attach
};
-struct cfdriver le_cd = {
- NULL, "le", DV_IFNET
-};
+hide void lewrcsr __P((struct am7990_softc *, u_int16_t, u_int16_t));
+hide u_int16_t lerdcsr __P((struct am7990_softc *, u_int16_t));
-integrate void
-lehwinit(sc)
- struct le_softc *sc;
-{
-}
-
-integrate void
+hide void
lewrcsr(sc, port, val)
- struct le_softc *sc;
+ struct am7990_softc *sc;
u_int16_t port, val;
{
- register struct lereg1 *ler1 = sc->sc_r1;
+ register struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1;
ler1->ler1_rap = port;
ler1->ler1_rdp = val;
}
-integrate u_int16_t
+hide u_int16_t
lerdcsr(sc, port)
- struct le_softc *sc;
+ struct am7990_softc *sc;
u_int16_t port;
{
- register struct lereg1 *ler1 = sc->sc_r1;
+ register struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1;
u_int16_t val;
ler1->ler1_rap = port;
@@ -143,7 +132,8 @@ le_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
- struct le_softc *sc = (void *)self;
+ struct le_softc *lesc = (struct le_softc *)self;
+ struct am7990_softc *sc = &lesc->sc_am7990;
struct cfdata *cf = self->dv_cfdata;
struct confargs *ca = aux;
int intpri;
@@ -153,7 +143,7 @@ le_attach(parent, self, aux)
intpri = 3;
printf(" level %d", intpri);
- sc->sc_r1 = (struct lereg1 *)
+ lesc->sc_r1 = (struct lereg1 *)
obio_alloc(ca->ca_paddr, OBIO_AMD_ETHER_SIZE);
sc->sc_memsize = 0x4000; /* 16K */
@@ -169,36 +159,12 @@ le_attach(parent, self, aux)
sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
sc->sc_zerobuf = am7990_zerobuf_contig;
- sc->sc_arpcom.ac_if.if_name = le_cd.cd_name;
- leconfig(sc);
+ sc->sc_rdcsr = lerdcsr;
+ sc->sc_wrcsr = lewrcsr;
+ sc->sc_hwinit = NULL;
- /* Install interrupt handler. */
- isr_add_autovect(leintr, (void *)sc, intpri);
-}
-
-/*
- * Compare two Ether/802 addresses for equality, inlined and
- * unrolled for speed. I'd love to have an inline assembler
- * version of this... XXX: Who wanted that? mycroft?
- * I wrote one, but the following is just as efficient.
- * This expands to 10 short m68k instructions! -gwr
- * Note: use this like bcmp()
- */
-static inline u_short
-ether_cmp(one, two)
- u_char *one, *two;
-{
- register u_short *a = (u_short *) one;
- register u_short *b = (u_short *) two;
- register u_short diff;
+ am7990_config(sc);
- diff = *a++ - *b++;
- diff |= *a++ - *b++;
- diff |= *a++ - *b++;
-
- return (diff);
+ /* Install interrupt handler. */
+ isr_add_autovect(am7990_intr, (void *)sc, intpri);
}
-
-#define ETHER_CMP ether_cmp
-
-#include <dev/ic/am7990.c>
diff --git a/sys/arch/sun3/dev/if_levar.h b/sys/arch/sun3/dev/if_levar.h
index 17fea04312e..1d753e6d10d 100644
--- a/sys/arch/sun3/dev/if_levar.h
+++ b/sys/arch/sun3/dev/if_levar.h
@@ -1,4 +1,4 @@
-/* $NetBSD: if_levar.h,v 1.1 1995/12/10 08:46:08 mycroft Exp $ */
+/* $NetBSD: if_levar.h,v 1.2 1996/05/07 01:32:37 thorpej Exp $ */
/*-
* Copyright (c) 1995 Charles M. Hannum. All rights reserved.
@@ -47,36 +47,7 @@
* This structure contains the output queue for the interface, its address, ...
*/
struct le_softc {
- struct device sc_dev; /* base structure */
- struct arpcom sc_arpcom; /* Ethernet common part */
-
- void (*sc_copytodesc)(); /* Copy to descriptor */
- void (*sc_copyfromdesc)(); /* Copy from descriptor */
-
- void (*sc_copytobuf)(); /* Copy to buffer */
- void (*sc_copyfrombuf)(); /* Copy from buffer */
- void (*sc_zerobuf)(); /* and Zero bytes in buffer */
-
- u_int16_t sc_conf3; /* CSR3 value */
-
- void *sc_mem; /* base address of RAM -- CPU's view */
- u_long sc_addr; /* base address of RAM -- LANCE's view */
- u_long sc_memsize; /* size of RAM */
-
- int sc_nrbuf; /* number of receive buffers */
- int sc_ntbuf; /* number of transmit buffers */
- int sc_last_rd;
- int sc_first_td, sc_last_td, sc_no_td;
-
- int sc_initaddr;
- int sc_rmdaddr;
- int sc_tmdaddr;
- int sc_rbufaddr;
- int sc_tbufaddr;
-
-#ifdef LEDEBUG
- int sc_debug;
-#endif
+ struct am7990_softc sc_am7990; /* glue to MI code */
struct lereg1 *sc_r1; /* LANCE registers */
};
diff --git a/sys/arch/sun3/dev/kd.c b/sys/arch/sun3/dev/kd.c
index 862b831ae1f..6f7c9664570 100644
--- a/sys/arch/sun3/dev/kd.c
+++ b/sys/arch/sun3/dev/kd.c
@@ -1,4 +1,4 @@
-/* $NetBSD: kd.c,v 1.16 1996/04/26 18:36:54 gwr Exp $ */
+/* $NetBSD: kd.c,v 1.17 1996/06/15 14:58:02 gwr Exp $ */
/*
* Copyright (c) 1994, 1995 Gordon W. Ross
@@ -90,12 +90,14 @@ kd_init(unit)
if (unit != 0)
return;
kd = &kd_softc; /* XXX */
- tp = ttymalloc();
- kd->kd_tty = tp;
+ tp = ttymalloc();
tp->t_oproc = kdstart;
tp->t_param = kdparam;
tp->t_dev = makedev(KDMAJOR, unit);
+ tty_attach(tp);
+
+ kd->kd_tty = tp;
return;
}
@@ -329,7 +331,7 @@ kd_later(tpaddr)
s = spltty();
tp->t_state &= ~TS_BUSY;
- (*linesw[tp->t_line].l_start)(tp);
+ (*linesw[tp->t_line].l_start)(tp);
splx(s);
}
diff --git a/sys/arch/sun3/dev/si.c b/sys/arch/sun3/dev/si.c
index 893c5368c3a..0bf52d046bc 100644
--- a/sys/arch/sun3/dev/si.c
+++ b/sys/arch/sun3/dev/si.c
@@ -1,4 +1,4 @@
-/* $NetBSD: si.c,v 1.24 1996/03/26 15:01:10 gwr Exp $ */
+/* $NetBSD: si.c,v 1.25 1996/06/17 23:21:29 gwr Exp $ */
/*
* Copyright (c) 1995 David Jones, Gordon W. Ross
@@ -425,6 +425,10 @@ si_dma_free(ncr_sc)
}
+#define CSR_MASK (SI_CSR_SBC_IP | SI_CSR_DMA_IP | \
+ SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR)
+#define POLL_TIMO 50000 /* X100 = 5 sec. */
+
/*
* Poll (spin-wait) for DMA completion.
* Called right after xx_dma_start(), and
@@ -439,30 +443,36 @@ si_dma_poll(ncr_sc)
struct sci_req *sr = ncr_sc->sc_current;
struct si_dma_handle *dh = sr->sr_dma_hand;
volatile struct si_regs *si = sc->sc_regs;
- int tmo, csr_mask;
+ int tmo;
/* Make sure DMA started successfully. */
if (ncr_sc->sc_state & NCR_ABORTING)
return;
- csr_mask = SI_CSR_SBC_IP | SI_CSR_DMA_IP |
- SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR;
+ /*
+ * XXX: The Sun driver waits for ~SI_CSR_DMA_ACTIVE here
+ * XXX: (on obio) or even worse (on vme) a 10mS. delay!
+ * XXX: I really doubt that is necessary...
+ */
- tmo = 50000; /* X100 = 5 sec. */
+ /* Wait for any "dma complete" or error bits. */
+ tmo = POLL_TIMO;
for (;;) {
- if (si->si_csr & csr_mask)
+ if (si->si_csr & CSR_MASK)
break;
if (--tmo <= 0) {
printf("si: DMA timeout (while polling)\n");
/* Indicate timeout as MI code would. */
sr->sr_flags |= SR_OVERDUE;
- break;
- }
+ break;
+ }
delay(100);
}
+ NCR_TRACE("si_dma_poll: waited %d\n",
+ POLL_TIMO - tmo);
#ifdef DEBUG
- if (si_debug) {
+ if (si_debug & 2) {
printf("si_dma_poll: done, csr=0x%x\n", si->si_csr);
}
#endif
diff --git a/sys/arch/sun3/dev/si_obio.c b/sys/arch/sun3/dev/si_obio.c
index b808b030874..61c073f81a6 100644
--- a/sys/arch/sun3/dev/si_obio.c
+++ b/sys/arch/sun3/dev/si_obio.c
@@ -1,4 +1,4 @@
-/* $NetBSD: si_obio.c,v 1.1 1996/03/26 15:01:12 gwr Exp $ */
+/* $NetBSD: si_obio.c,v 1.2 1996/06/17 23:21:35 gwr Exp $ */
/*
* Copyright (c) 1995 David Jones, Gordon W. Ross
@@ -126,7 +126,8 @@ struct cfattach si_obio_ca = {
};
/* Options. Interesting values are: 1,3,7 */
-int si_obio_options = 3;
+/* XXX: Using 1 for now to mask a (pmap?) bug not yet found... */
+int si_obio_options = 1; /* XXX */
#define SI_ENABLE_DMA 1 /* Use DMA (maybe polled) */
#define SI_DMA_INTR 2 /* DMA completion interrupts */
#define SI_DO_RESELECT 4 /* Allow disconnect/reselect */
@@ -207,14 +208,12 @@ si_obio_attach(parent, self, args)
*/
ncr_sc->sc_pio_out = ncr5380_pio_out;
ncr_sc->sc_pio_in = ncr5380_pio_in;
-
ncr_sc->sc_dma_alloc = si_dma_alloc;
ncr_sc->sc_dma_free = si_dma_free;
- ncr_sc->sc_dma_poll = si_dma_poll;
-
ncr_sc->sc_dma_setup = si_obio_dma_setup;
ncr_sc->sc_dma_start = si_obio_dma_start;
- ncr_sc->sc_dma_eop = si_obio_dma_stop;
+ ncr_sc->sc_dma_poll = si_dma_poll;
+ ncr_sc->sc_dma_eop = si_obio_dma_eop;
ncr_sc->sc_dma_stop = si_obio_dma_stop;
ncr_sc->sc_intr_on = NULL;
ncr_sc->sc_intr_off = NULL;
@@ -281,24 +280,28 @@ si_obio_dma_setup(ncr_sc)
struct ncr5380_softc *ncr_sc;
{
struct si_softc *sc = (struct si_softc *)ncr_sc;
+ struct sci_req *sr = ncr_sc->sc_current;
+ struct si_dma_handle *dh = sr->sr_dma_hand;
volatile struct si_regs *si = sc->sc_regs;
- struct sci_req *sr;
- struct si_dma_handle *dh;
- int send = 0;
- int xlen = 0;
-
- /* Let this work even without a dma hand, for testing... */
- if ((sr = ncr_sc->sc_current) != NULL) {
- if ((dh = sr->sr_dma_hand) != NULL) {
- send = dh->dh_flags & SIDH_OUT;
- xlen = ncr_sc->sc_datalen;
- xlen &= ~1;
- }
- }
+ struct udc_table *cmd;
+ long data_pa, cmd_pa;
+ int xlen;
+
+ /*
+ * Get the DVMA mapping for this segment.
+ * XXX - Should separate allocation and mapin.
+ */
+ data_pa = dvma_kvtopa(dh->dh_dvma, sc->sc_adapter_type);
+ data_pa += (ncr_sc->sc_dataptr - dh->dh_addr);
+ if (data_pa & 1)
+ panic("si_dma_start: bad pa=0x%x", data_pa);
+ xlen = ncr_sc->sc_datalen;
+ sc->sc_reqlen = xlen; /* XXX: or less? */
#ifdef DEBUG
- if (si_debug) {
- printf("si_dma_setup: send=%d xlen=%d\n", send, xlen);
+ if (si_debug & 2) {
+ printf("si_dma_setup: dh=0x%x, pa=0x%x, xlen=%d\n",
+ dh, data_pa, xlen);
}
#endif
@@ -310,7 +313,7 @@ si_obio_dma_setup(ncr_sc)
si->si_csr |= SI_CSR_FIFO_RES;
/* Set direction (send/recv) */
- if (send) {
+ if (dh->dh_flags & SIDH_OUT) {
si->si_csr |= SI_CSR_SEND;
} else {
si->si_csr &= ~SI_CSR_SEND;
@@ -319,77 +322,29 @@ si_obio_dma_setup(ncr_sc)
/* Set the FIFO counter. */
si->fifo_count = xlen;
+ /* Reset the UDC. */
+ si_obio_udc_write(si, UDC_ADR_COMMAND, UDC_CMD_RESET);
+
/*
- * XXX: Reset DMA engine again! Comment from Sprite:
+ * XXX: Reset the FIFO again! Comment from Sprite:
* Go through reset again becuase of the bug on the 3/50
* where bytes occasionally linger in the DMA fifo.
*/
-
- /* Reset the UDC. */
- si_obio_udc_write(si, UDC_ADR_COMMAND, UDC_CMD_RESET);
-
- /* Reset the FIFO */
si->si_csr &= ~SI_CSR_FIFO_RES; /* active low */
si->si_csr |= SI_CSR_FIFO_RES;
#ifdef DEBUG
- if ((si->fifo_count > xlen) || (si->fifo_count < (xlen - 1))) {
+ /* Make sure the extra FIFO reset did not hit the count. */
+ if (si->fifo_count != xlen) {
printf("si_dma_setup: fifo_count=0x%x, xlen=0x%x\n",
si->fifo_count, xlen);
Debugger();
}
#endif
-}
-
-
-void
-si_obio_dma_start(ncr_sc)
- struct ncr5380_softc *ncr_sc;
-{
- struct si_softc *sc = (struct si_softc *)ncr_sc;
- struct sci_req *sr = ncr_sc->sc_current;
- struct si_dma_handle *dh = sr->sr_dma_hand;
- volatile struct si_regs *si = sc->sc_regs;
- struct udc_table *cmd;
- long data_pa, cmd_pa;
- int xlen;
/*
- * Get the DVMA mapping for this segment.
- * XXX - Should separate allocation and mapin.
- */
- data_pa = dvma_kvtopa(dh->dh_dvma, sc->sc_adapter_type);
- data_pa += (ncr_sc->sc_dataptr - dh->dh_addr);
- if (data_pa & 1)
- panic("si_dma_start: bad pa=0x%x", data_pa);
- xlen = ncr_sc->sc_datalen;
- xlen &= ~1;
- sc->sc_reqlen = xlen; /* XXX: or less... */
-
-#ifdef DEBUG
- if (si_debug & 2) {
- printf("si_dma_start: dh=0x%x, pa=0x%x, xlen=%d\n",
- dh, data_pa, xlen);
- }
-#endif
-
- /*
- * Set up the DMA controller.
- * Already set FIFO count in dma_setup.
- */
-
-#ifdef DEBUG
- if ((si->fifo_count > xlen) ||
- (si->fifo_count < (xlen - 1)))
- {
- printf("si_dma_start: fifo_count=0x%x, xlen=0x%x\n",
- si->fifo_count, xlen);
- Debugger();
- }
-#endif
-
- /*
- * The OBIO controller needs a command block.
+ * Set up the DMA controller. The DMA controller on
+ * OBIO needs a command block in DVMA space.
*/
cmd = sc->sc_dmacmd;
cmd->addrh = ((data_pa & 0xFF0000) >> 8) | UDC_ADDR_INFO;
@@ -397,6 +352,8 @@ si_obio_dma_start(ncr_sc)
cmd->count = xlen / 2; /* bytes -> words */
cmd->cmrh = UDC_CMR_HIGH;
if (dh->dh_flags & SIDH_OUT) {
+ if (xlen & 1)
+ cmd->count++;
cmd->cmrl = UDC_CMR_LSEND;
cmd->rsel = UDC_RSEL_SEND;
} else {
@@ -417,7 +374,28 @@ si_obio_dma_start(ncr_sc)
/* Tell the chip to interrupt on error. */
si_obio_udc_write(si, UDC_ADR_COMMAND, UDC_CMD_CIE);
- /* XXX: Move all of the above to _setup? */
+ /* Will do "start chain" command in _dma_start. */
+}
+
+
+void
+si_obio_dma_start(ncr_sc)
+ struct ncr5380_softc *ncr_sc;
+{
+ struct si_softc *sc = (struct si_softc *)ncr_sc;
+ struct sci_req *sr = ncr_sc->sc_current;
+ struct si_dma_handle *dh = sr->sr_dma_hand;
+ volatile struct si_regs *si = sc->sc_regs;
+ int s;
+
+#ifdef DEBUG
+ if (si_debug & 2) {
+ printf("si_dma_start: sr=0x%x\n", sr);
+ }
+#endif
+
+ /* This MAY be time critical (not sure). */
+ s = splhigh();
/* Finally, give the UDC a "start chain" command. */
si_obio_udc_write(si, UDC_ADR_COMMAND, UDC_CMD_STRT_CHN);
@@ -440,6 +418,7 @@ si_obio_dma_start(ncr_sc)
*ncr_sc->sci_irecv = 0; /* start it */
}
+ splx(s);
ncr_sc->sc_state |= NCR_DOINGDMA;
#ifdef DEBUG
@@ -478,11 +457,19 @@ si_obio_dma_stop(ncr_sc)
}
ncr_sc->sc_state &= ~NCR_DOINGDMA;
+ NCR_TRACE("si_dma_stop: top, csr=0x%x\n", si->si_csr);
+
+ /* OK, have either phase mis-match or end of DMA. */
+ /* Set an impossible phase to prevent data movement? */
+ *ncr_sc->sci_tcmd = PHASE_INVALID;
+
+ /* Check for DMA errors. */
if (si->si_csr & (SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR)) {
printf("si: DMA error, csr=0x%x, reset\n", si->si_csr);
sr->sr_xs->error = XS_DRIVER_STUFFUP;
ncr_sc->sc_state |= NCR_ABORTING;
si_reset_adapter(ncr_sc);
+ goto out;
}
/* Note that timeout may have set the error flag. */
@@ -510,11 +497,9 @@ si_obio_dma_stop(ncr_sc)
/*
* Now try to figure out how much actually transferred
- *
* The fifo_count might not reflect how many bytes were
- * actually transferred for VME.
+ * actually transferred.
*/
-
resid = si->fifo_count & 0xFFFF;
ntrans = sc->sc_reqlen - resid;
@@ -569,11 +554,12 @@ out:
si->fifo_count = 0;
si->si_csr &= ~SI_CSR_SEND;
- /* Reset the FIFO */
- si->si_csr &= ~SI_CSR_FIFO_RES; /* active low */
- si->si_csr |= SI_CSR_FIFO_RES;
+ /* Reset the FIFO */
+ si->si_csr &= ~SI_CSR_FIFO_RES; /* active low */
+ si->si_csr |= SI_CSR_FIFO_RES;
/* Put SBIC back in PIO mode. */
+ /* XXX: set tcmd to PHASE_INVALID? */
*ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE);
*ncr_sc->sci_icmd = 0;
}
diff --git a/sys/arch/sun3/dev/si_vme.c b/sys/arch/sun3/dev/si_vme.c
index 637f8932bcd..d29bc905ee3 100644
--- a/sys/arch/sun3/dev/si_vme.c
+++ b/sys/arch/sun3/dev/si_vme.c
@@ -1,4 +1,4 @@
-/* $NetBSD: si_vme.c,v 1.1 1996/03/26 15:01:13 gwr Exp $ */
+/* $NetBSD: si_vme.c,v 1.2 1996/06/17 23:21:39 gwr Exp $ */
/*
* Copyright (c) 1995 David Jones, Gordon W. Ross
@@ -230,11 +230,10 @@ si_vmes_attach(parent, self, args)
ncr_sc->sc_dma_alloc = si_dma_alloc;
ncr_sc->sc_dma_free = si_dma_free;
- ncr_sc->sc_dma_poll = si_dma_poll;
-
ncr_sc->sc_dma_setup = si_vme_dma_setup;
ncr_sc->sc_dma_start = si_vme_dma_start;
- ncr_sc->sc_dma_eop = si_vme_dma_stop;
+ ncr_sc->sc_dma_poll = si_dma_poll;
+ ncr_sc->sc_dma_eop = si_vme_dma_eop;
ncr_sc->sc_dma_stop = si_vme_dma_stop;
ncr_sc->sc_intr_on = si_vme_intr_on;
ncr_sc->sc_intr_off = si_vme_intr_off;
@@ -272,7 +271,18 @@ si_vme_intr_on(ncr_sc)
struct si_softc *sc = (struct si_softc *)ncr_sc;
volatile struct si_regs *si = sc->sc_regs;
- si_vme_dma_setup(ncr_sc);
+ /* receive mode should be safer */
+ si->si_csr &= ~SI_CSR_SEND;
+
+ /* Clear the count so nothing happens. */
+ si->dma_counth = 0;
+ si->dma_countl = 0;
+
+ /* Clear the start address too. (paranoid?) */
+ si->dma_addrh = 0;
+ si->dma_addrl = 0;
+
+ /* Finally, enable the DMA engine. */
si->si_csr |= SI_CSR_DMA_EN;
}
@@ -298,43 +308,14 @@ si_vme_intr_off(ncr_sc)
* XXX: The VME adapter appears to suppress SBC interrupts
* when the FIFO is not empty or the FIFO count is non-zero!
*
- * On the VME version we just clear the DMA count and address
- * here (to make sure it stays idle) and do the real setup
- * later, in dma_start.
+ * On the VME version, setup the start addres, but clear the
+ * count (to make sure it stays idle) and set that later.
*/
void
si_vme_dma_setup(ncr_sc)
struct ncr5380_softc *ncr_sc;
{
struct si_softc *sc = (struct si_softc *)ncr_sc;
- volatile struct si_regs *si = sc->sc_regs;
-
- /* Reset the FIFO */
- si->si_csr &= ~SI_CSR_FIFO_RES; /* active low */
- si->si_csr |= SI_CSR_FIFO_RES;
-
- /* Set direction (assume recv here) */
- si->si_csr &= ~SI_CSR_SEND;
- /* Assume worst alignment */
- si->si_csr |= SI_CSR_BPCON;
-
- si->dma_addrh = 0;
- si->dma_addrl = 0;
-
- si->dma_counth = 0;
- si->dma_countl = 0;
-
- /* Clear FIFO counter. (also hits dma_count) */
- si->fifo_cnt_hi = 0;
- si->fifo_count = 0;
-}
-
-
-void
-si_vme_dma_start(ncr_sc)
- struct ncr5380_softc *ncr_sc;
-{
- struct si_softc *sc = (struct si_softc *)ncr_sc;
struct sci_req *sr = ncr_sc->sc_current;
struct si_dma_handle *dh = sr->sr_dma_hand;
volatile struct si_regs *si = sc->sc_regs;
@@ -350,22 +331,16 @@ si_vme_dma_start(ncr_sc)
if (data_pa & 1)
panic("si_dma_start: bad pa=0x%x", data_pa);
xlen = ncr_sc->sc_datalen;
- xlen &= ~1;
- sc->sc_reqlen = xlen; /* XXX: or less... */
+ xlen &= ~1; /* XXX: necessary? */
+ sc->sc_reqlen = xlen; /* XXX: or less? */
#ifdef DEBUG
if (si_debug & 2) {
- printf("si_dma_start: dh=0x%x, pa=0x%x, xlen=%d\n",
+ printf("si_dma_setup: dh=0x%x, pa=0x%x, xlen=%d\n",
dh, data_pa, xlen);
}
#endif
- /*
- * Set up the DMA controller.
- */
- si->si_csr &= ~SI_CSR_FIFO_RES; /* active low */
- si->si_csr |= SI_CSR_FIFO_RES;
-
/* Set direction (send/recv) */
if (dh->dh_flags & SIDH_OUT) {
si->si_csr |= SI_CSR_SEND;
@@ -373,31 +348,56 @@ si_vme_dma_start(ncr_sc)
si->si_csr &= ~SI_CSR_SEND;
}
+ /* Reset the FIFO. */
+ si->si_csr &= ~SI_CSR_FIFO_RES; /* active low */
+ si->si_csr |= SI_CSR_FIFO_RES;
+
if (data_pa & 2) {
si->si_csr |= SI_CSR_BPCON;
} else {
si->si_csr &= ~SI_CSR_BPCON;
}
+ /* Load the start address. */
si->dma_addrh = (ushort)(data_pa >> 16);
si->dma_addrl = (ushort)(data_pa & 0xFFFF);
+ /*
+ * Keep the count zero or it may start early!
+ */
+ si->dma_counth = 0;
+ si->dma_countl = 0;
+
+#if 0
+ /* Clear FIFO counter. (also hits dma_count) */
+ si->fifo_cnt_hi = 0;
+ si->fifo_count = 0;
+#endif
+}
+
+
+void
+si_vme_dma_start(ncr_sc)
+ struct ncr5380_softc *ncr_sc;
+{
+ struct si_softc *sc = (struct si_softc *)ncr_sc;
+ struct sci_req *sr = ncr_sc->sc_current;
+ struct si_dma_handle *dh = sr->sr_dma_hand;
+ volatile struct si_regs *si = sc->sc_regs;
+ long data_pa;
+ int s, xlen;
+
+ xlen = sc->sc_reqlen;
+
+ /* This MAY be time critical (not sure). */
+ s = splhigh();
+
si->dma_counth = (ushort)(xlen >> 16);
si->dma_countl = (ushort)(xlen & 0xFFFF);
-#if 1
- /* Set it anyway, even though dma_count hits it? */
+ /* Set it anyway, even though dma_count hits it. */
si->fifo_cnt_hi = (ushort)(xlen >> 16);
si->fifo_count = (ushort)(xlen & 0xFFFF);
-#endif
-
-#ifdef DEBUG
- if (si->fifo_count != xlen) {
- printf("si_dma_start: fifo_count=0x%x, xlen=0x%x\n",
- si->fifo_count, xlen);
- Debugger();
- }
-#endif
/*
* Acknowledge the phase change. (After DMA setup!)
@@ -420,6 +420,7 @@ si_vme_dma_start(ncr_sc)
/* Let'er rip! */
si->si_csr |= SI_CSR_DMA_EN;
+ splx(s);
ncr_sc->sc_state |= NCR_DOINGDMA;
#ifdef DEBUG
@@ -461,17 +462,23 @@ si_vme_dma_stop(ncr_sc)
/* First, halt the DMA engine. */
si->si_csr &= ~SI_CSR_DMA_EN; /* VME only */
+ /* Set an impossible phase to prevent data movement? */
+ *ncr_sc->sci_tcmd = PHASE_INVALID;
+
if (si->si_csr & (SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR)) {
printf("si: DMA error, csr=0x%x, reset\n", si->si_csr);
sr->sr_xs->error = XS_DRIVER_STUFFUP;
ncr_sc->sc_state |= NCR_ABORTING;
si_reset_adapter(ncr_sc);
+ goto out;
}
/* Note that timeout may have set the error flag. */
if (ncr_sc->sc_state & NCR_ABORTING)
goto out;
+ /* XXX: Wait for DMA to actually finish? */
+
/*
* Now try to figure out how much actually transferred
*
diff --git a/sys/arch/sun3/dev/xd.c b/sys/arch/sun3/dev/xd.c
index d3a8f835ecb..d5b8508dd81 100644
--- a/sys/arch/sun3/dev/xd.c
+++ b/sys/arch/sun3/dev/xd.c
@@ -101,8 +101,7 @@
* XDC_HWAIT: add iorq "N" to head of SC's wait queue
*/
#define XDC_HWAIT(SC, N) { \
- (SC)->waithead = ((SC)->waithead == 0) ? \
- (XDC_MAXIOPB - 1) : ((SC)->waithead - 1); \
+ (SC)->waithead = ((SC)->waithead - 1) % XDC_MAXIOPB; \
(SC)->waitq[(SC)->waithead] = (N); \
(SC)->nwait++; \
}
@@ -1434,9 +1433,6 @@ xdc_startbuf(xdcsc, xdsc, bp)
/* Instrumentation. */
disk_busy(&xdsc->sc_dk);
- /* Instrumentation. */
- disk_busy(&xdsc->sc_dk);
-
/* now submit [note that xdc_submit_iorq can never fail on NORM reqs] */
xdc_submit_iorq(xdcsc, rqno, XD_SUB_NORM);
diff --git a/sys/arch/sun3/dev/xy.c b/sys/arch/sun3/dev/xy.c
index 8bea7ab3e06..b359bd5f6c1 100644
--- a/sys/arch/sun3/dev/xy.c
+++ b/sys/arch/sun3/dev/xy.c
@@ -36,7 +36,7 @@
* x y . c x y l o g i c s 4 5 0 / 4 5 1 s m d d r i v e r
*
* author: Chuck Cranor <chuck@ccrc.wustl.edu>
- * id: $NetBSD: xy.c,v 1.5 1996/03/04 20:35:29 chuck Exp $
+ * id: $NetBSD: xy.c,v 1.9 1996/03/17 02:04:10 thorpej Exp $
* started: 14-Sep-95
* references: [1] Xylogics Model 753 User's Manual
* part number: 166-753-001, Revision B, May 21, 1988.
@@ -361,8 +361,8 @@ xycattach(parent, self, aux)
return;
}
}
+ bzero(tmp, pbsz);
xyc->iopbase = tmp;
- bzero(xyc->iopbase, pbsz);
xyc->dvmaiopb = (struct xy_iopb *)
dvma_kvtopa((long) xyc->iopbase, BUS_VME16);
xyc->reqs = (struct xy_iorq *)
@@ -1292,9 +1292,6 @@ xyc_startbuf(xycsc, xysc, bp)
/* Instrumentation. */
disk_busy(&xysc->sc_dk);
- /* Instrumentation. */
- disk_busy(&xysc->sc_dk);
-
return (XY_ERR_AOK);
}
@@ -1632,7 +1629,7 @@ xyc_reset(xycsc, quiet, blastmode, error, xysc)
dvma_mapout(iorq->dbufbase,
iorq->buf->b_bcount);
iorq->xy->xyq.b_actf =
- iorq->buf->b_actf;
+ iorq->buf->b_actf;
disk_unbusy(&iorq->xy->sc_dk,
(iorq->buf->b_bcount -
iorq->buf->b_resid));
diff --git a/sys/arch/sun3/dev/zs.c b/sys/arch/sun3/dev/zs.c
index e70f967a50b..c1f66193975 100644
--- a/sys/arch/sun3/dev/zs.c
+++ b/sys/arch/sun3/dev/zs.c
@@ -1,4 +1,4 @@
-/* $NetBSD: zs.c,v 1.36 1996/04/04 06:26:15 cgd Exp $ */
+/* $NetBSD: zs.c,v 1.38 1996/06/17 15:17:06 gwr Exp $ */
/*
* Copyright (c) 1995 Gordon W. Ross
@@ -56,7 +56,6 @@
#include <machine/autoconf.h>
#include <machine/cpu.h>
-#include <machine/eeprom.h>
#include <machine/isr.h>
#include <machine/obio.h>
#include <machine/mon.h>
@@ -273,7 +272,7 @@ zsc_attach(parent, self, aux)
cs->cs_ops = &zsops_null;
/* Define BAUD rate clock for the MI code. */
- cs->cs_pclk_div16 = PCLK / 16;
+ cs->cs_brg_clk = PCLK / 16;
/* XXX: get defspeed from EEPROM instead? */
cs->cs_defspeed = zs_defspeed[zsc_unit][channel];
@@ -536,33 +535,49 @@ void *zs_conschan;
/*
* This function replaces sys/dev/cninit.c
* Determine which device is the console using
- * the "console" byte from the EEPROM.
+ * the PROM "input source" and "output sink".
*/
void
cninit()
{
+ MachMonRomVector *v;
struct zschan *zc;
struct consdev *cn;
int zsc_unit, channel;
+ char inSource;
- switch (ee_console) {
+ v = romVectorPtr;
+ inSource = *(v->inSource);
- case EE_CONS_TTYA:
- case EE_CONS_TTYB:
+ if (inSource != *(v->outSink)) {
+ mon_printf("cninit: mismatched PROM output selector\n");
+ }
+
+ switch (inSource) {
+
+ case 1: /* ttya */
+ case 2: /* ttyb */
zsc_unit = 1;
- channel = (ee_console & 1);
+ channel = inSource - 1;
cn = &consdev_tty;
cn->cn_dev = makedev(ZSTTY_MAJOR, channel);
cn->cn_pri = CN_REMOTE;
break;
+ case 3: /* ttyc (rewired keyboard connector) */
+ case 4: /* ttyd (rewired mouse connector) */
+ zsc_unit = 0;
+ channel = inSource - 3;
+ cn = &consdev_tty;
+ cn->cn_dev = makedev(ZSTTY_MAJOR, (channel+2));
+ cn->cn_pri = CN_REMOTE;
+ break;
+
default:
- mon_printf("cninit: unknown eeprom console setting\n");
+ mon_printf("cninit: invalid PROM console selector\n");
/* assume keyboard/display */
/* fallthrough */
- case EE_CONS_BW:
- case EE_CONS_COLOR:
- case EE_CONS_P4OPT:
+ case 0: /* keyboard/display */
zsc_unit = 0;
channel = 0;
cn = &consdev_kd;
diff --git a/sys/arch/sun3/dev/zs_kgdb.c b/sys/arch/sun3/dev/zs_kgdb.c
index 3ba576927cf..e6596e28cc3 100644
--- a/sys/arch/sun3/dev/zs_kgdb.c
+++ b/sys/arch/sun3/dev/zs_kgdb.c
@@ -1,3 +1,4 @@
+/* $NetBSD: zs_kgdb.c,v 1.6 1996/06/17 15:40:36 gwr Exp $ */
/*
* Copyright (c) 1994 Gordon W. Ross
@@ -71,9 +72,18 @@
/* The Sun3 provides a 4.9152 MHz clock to the ZS chips. */
#define PCLK (9600 * 512) /* PCLK pin input clock rate */
+#define ZSHARD_PRI 6 /* Wired on the CPU board... */
#define ZS_DELAY() delay(2)
+/* The layout of this is hardware-dependent (padding, order). */
+struct zschan {
+ volatile u_char zc_csr; /* ctrl,status, and indirect access */
+ u_char zc_xxx0;
+ volatile u_char zc_data; /* data */
+ u_char zc_xxx1;
+};
+
extern int kgdb_dev;
extern int kgdb_rate;
@@ -103,6 +113,9 @@ static u_char zs_kgdb_regs[16] = {
ZSWR15_BREAK_IE | ZSWR15_DCD_IE,
};
+/*
+ * This replaces "zs_reset()" in the sparc driver.
+ */
static void
zs_setparam(cs, iena, rate)
struct zs_chanstate *cs;
@@ -118,7 +131,7 @@ zs_setparam(cs, iena, rate)
}
/* Initialize the speed, etc. */
- tconst = BPS_TO_TCONST(cs->cs_pclk_div16, rate);
+ tconst = BPS_TO_TCONST(cs->cs_brg_clk, rate);
cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS;
cs->cs_preg[12] = tconst;
cs->cs_preg[13] = tconst >> 8;
@@ -126,7 +139,7 @@ zs_setparam(cs, iena, rate)
s = splhigh();
zs_loadchannelregs(cs);
splx(s);
-
+}
/*
* Set up for kgdb; called at boot time before configuration.
@@ -139,11 +152,12 @@ zs_kgdb_init()
volatile struct zschan *zc;
int channel, zsc_unit;
- if (major(kgdb_dev) != ZSMAJOR)
+ if (major(kgdb_dev) != ZSTTY_MAJOR)
return;
- zsc_unit = 1; /* XXX */
- channel = minor(kgdb_dev) & 1;
+ /* Note: (ttya,ttyb) on zsc1, and (ttyc,ttyd) on zsc0 */
+ zsc_unit = 2 - (kgdb_dev & 2);
+ channel = kgdb_dev & 1;
printf("zs_kgdb_init: attaching zstty%d at %d baud\n",
channel, kgdb_rate);
@@ -153,7 +167,7 @@ zs_kgdb_init()
cs.cs_reg_csr = &zc->zc_csr;
cs.cs_reg_data = &zc->zc_data;
cs.cs_channel = channel;
- cs.cs_pclk_div16 = PCLK / 16;
+ cs.cs_brg_clk = PCLK / 16;
/* Now set parameters. (interrupts disabled) */
zs_setparam(&cs, 0, kgdb_rate);
@@ -200,7 +214,7 @@ zs_check_kgdb(cs, dev)
*/
zskgdb()
{
- unit = minor(kgdb_dev);
+ int unit = minor(kgdb_dev);
printf("zstty%d: kgdb interrupt\n", unit);
/* This will trap into the debugger. */
@@ -214,7 +228,7 @@ zskgdb()
int kgdb_input_lost;
-static int
+static void
zs_kgdb_rxint(cs)
register struct zs_chanstate *cs;
{
@@ -236,11 +250,9 @@ zs_kgdb_rxint(cs)
} else {
kgdb_input_lost++;
}
-
- return(0);
}
-static int
+static void
zs_kgdb_txint(cs)
register struct zs_chanstate *cs;
{
@@ -248,10 +260,9 @@ zs_kgdb_txint(cs)
rr0 = zs_read_csr(cs);
zs_write_csr(cs, ZSWR0_RESET_TXINT);
- return (0);
}
-static int
+static void
zs_kgdb_stint(cs)
register struct zs_chanstate *cs;
{
@@ -259,16 +270,13 @@ zs_kgdb_stint(cs)
rr0 = zs_read_csr(cs);
zs_write_csr(cs, ZSWR0_RESET_STATUS);
-
- return (0);
}
-static int
+static void
zs_kgdb_softint(cs)
struct zs_chanstate *cs;
{
printf("zs_kgdb_softint?\n");
- return (0);
}
struct zsops zsops_kgdb = {