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-rw-r--r--sys/arch/i386/pci/elan520.c12
-rw-r--r--sys/arch/i386/pci/geodesc.c115
-rw-r--r--sys/arch/i386/pci/geodescreg.h34
3 files changed, 76 insertions, 85 deletions
diff --git a/sys/arch/i386/pci/elan520.c b/sys/arch/i386/pci/elan520.c
index 4f50cf41d18..bf4aadd4d18 100644
--- a/sys/arch/i386/pci/elan520.c
+++ b/sys/arch/i386/pci/elan520.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: elan520.c,v 1.1 2003/01/21 17:02:29 markus Exp $ */
+/* $OpenBSD: elan520.c,v 1.2 2003/08/07 16:59:37 mickey Exp $ */
/* $NetBSD: elan520.c,v 1.4 2002/10/02 05:47:15 thorpej Exp $ */
/*-
@@ -78,7 +78,7 @@ struct cfattach elansc_ca = {
};
struct cfdriver elansc_cd = {
- NULL, "elansc", DV_DULL
+ NULL, "elansc", DV_DULL
};
int
@@ -115,7 +115,7 @@ elansc_attach(struct device *parent, struct device *self, void *aux)
sc->sc_memt = pa->pa_memt;
if (bus_space_map(sc->sc_memt, MMCR_BASE_ADDR, NBPG, 0,
&sc->sc_memh) != 0) {
- printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
+ printf(": unable to map registers\n");
return;
}
@@ -123,17 +123,13 @@ elansc_attach(struct device *parent, struct device *self, void *aux)
cpuctl = bus_space_read_1(sc->sc_memt, sc->sc_memh, MMCR_CPUCTL);
ressta = bus_space_read_1(sc->sc_memt, sc->sc_memh, MMCR_RESSTA);
- printf("%s: product %d stepping %d.%d, CPU clock %s"
- ", reset %b",
- sc->sc_dev.dv_xname,
+ printf(": product %d stepping %d.%d, CPU clock %s, reset %b\n",
(rev & REVID_PRODID) >> REVID_PRODID_SHIFT,
(rev & REVID_MAJSTEP) >> REVID_MAJSTEP_SHIFT,
(rev & REVID_MINSTEP),
elansc_speeds[cpuctl & CPUCTL_CPU_CLK_SPD_MASK],
ressta, RSTBITS);
- printf("\n");
-
/*
* SC520 rev A1 has a bug that affects the watchdog timer. If
* the GP bus echo mode is enabled, writing to the watchdog control
diff --git a/sys/arch/i386/pci/geodesc.c b/sys/arch/i386/pci/geodesc.c
index 92675f387ed..ef70b184e15 100644
--- a/sys/arch/i386/pci/geodesc.c
+++ b/sys/arch/i386/pci/geodesc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: geodesc.c,v 1.1 2003/08/07 08:32:56 markus Exp $ */
+/* $OpenBSD: geodesc.c,v 1.2 2003/08/07 16:59:37 mickey Exp $ */
/*
* Copyright (c) 2003 Markus Friedl <markus@openbsd.org>
@@ -16,7 +16,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/*
+/*
* Geode SC1100 Information Appliance On a Chip
* http://www.national.com/ds.cgi/SC/SC1100.pdf
*/
@@ -34,32 +34,32 @@
#include <arch/i386/pci/geodescreg.h>
struct geodesc_softc {
- struct device sc_dev;
- bus_space_tag_t sc_iot;
- bus_space_handle_t sc_ioh;
+ struct device sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
};
-int geodesc_match(struct device *, void *, void *);
-void geodesc_attach(struct device *, struct device *, void *);
-int geodesc_wdogctl_cb(void *, int);
+int geodesc_match(struct device *, void *, void *);
+void geodesc_attach(struct device *, struct device *, void *);
+int geodesc_wdogctl_cb(void *, int);
struct cfattach geodesc_ca = {
- sizeof(struct geodesc_softc), geodesc_match, geodesc_attach
+ sizeof(struct geodesc_softc), geodesc_match, geodesc_attach
};
struct cfdriver geodesc_cd = {
- NULL, "geodesc", DV_DULL
+ NULL, "geodesc", DV_DULL
};
int
geodesc_match(struct device *parent, void *match, void *aux)
{
- struct pci_attach_args *pa = aux;
+ struct pci_attach_args *pa = aux;
- if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS &&
- PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_SC1100_XBUS)
- return (1);
- return (0);
+ if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS &&
+ PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_SC1100_XBUS)
+ return (1);
+ return (0);
}
#define WDSTSBITS "\20\x04WDRST\x03WDSMI\x02WDINT\x01WDOVF"
@@ -67,54 +67,49 @@ geodesc_match(struct device *parent, void *match, void *aux)
void
geodesc_attach(struct device *parent, struct device *self, void *aux)
{
- struct geodesc_softc *sc = (void *) self;
- struct pci_attach_args *pa = aux;
- uint16_t cnfg, cba;
- uint8_t sts, rev, iid;
- pcireg_t reg;
-
- printf("\n");
-
- reg = pci_conf_read(pa->pa_pc, pa->pa_tag, SC1100_F5_SCRATCHPAD);
- sc->sc_iot = pa->pa_iot;
- if (bus_space_map(sc->sc_iot, reg, 64, 0, &sc->sc_ioh)) {
- printf("%s: unable to map registers at %p\n",
- sc->sc_dev.dv_xname, reg);
- return;
- }
- cba = bus_space_read_2(sc->sc_iot, sc->sc_ioh, GCB_CBA);
- if (cba != reg) {
- printf("%s: cba mismatch: cba %p != reg %p\n",
- sc->sc_dev.dv_xname, cba, reg);
- bus_space_unmap(sc->sc_iot, sc->sc_ioh, 64);
- return;
- }
- sts = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_WDSTS);
- cnfg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, GCB_WDCNFG);
- iid = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_IID);
- rev = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_REV);
-
- printf("%s: iid %d revision %d wdstatus %b\n",
- sc->sc_dev.dv_xname, iid, rev, sts, WDSTSBITS);
-
- /* setup and register watchdog */
- bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDTO, 0);
- sts |= WDOVF_CLEAR;
- bus_space_write_1(sc->sc_iot, sc->sc_ioh, GCB_WDSTS, sts);
- cnfg &= ~WDCNFG_MASK;;
- cnfg |= WDTYPE1_RESET|WDPRES_DIV_512;
- bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDCNFG, cnfg);
-
- wdog_register(sc, geodesc_wdogctl_cb);
+ struct geodesc_softc *sc = (void *) self;
+ struct pci_attach_args *pa = aux;
+ uint16_t cnfg, cba;
+ uint8_t sts, rev, iid;
+ pcireg_t reg;
+
+ reg = pci_conf_read(pa->pa_pc, pa->pa_tag, SC1100_F5_SCRATCHPAD);
+ sc->sc_iot = pa->pa_iot;
+ if (bus_space_map(sc->sc_iot, reg, 64, 0, &sc->sc_ioh)) {
+ printf(": unable to map registers at 0x%x\n", reg);
+ return;
+ }
+ cba = bus_space_read_2(sc->sc_iot, sc->sc_ioh, GCB_CBA);
+ if (cba != reg) {
+ printf(": cba mismatch: cba 0x%x != reg 0x%x\n", cba, reg);
+ bus_space_unmap(sc->sc_iot, sc->sc_ioh, 64);
+ return;
+ }
+ sts = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_WDSTS);
+ cnfg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, GCB_WDCNFG);
+ iid = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_IID);
+ rev = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_REV);
+
+ printf(": iid %d revision %d wdstatus %b\n", iid, rev, sts, WDSTSBITS);
+
+ /* setup and register watchdog */
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDTO, 0);
+ sts |= WDOVF_CLEAR;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, GCB_WDSTS, sts);
+ cnfg &= ~WDCNFG_MASK;;
+ cnfg |= WDTYPE1_RESET|WDPRES_DIV_512;
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDCNFG, cnfg);
+
+ wdog_register(sc, geodesc_wdogctl_cb);
}
int
geodesc_wdogctl_cb(void *self, int period)
{
- struct geodesc_softc *sc = self;
-
- if (period > 0x03ff)
- period = 0x03ff;
- bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDTO, period * 64);
- return (period);
+ struct geodesc_softc *sc = self;
+
+ if (period > 0x03ff)
+ period = 0x03ff;
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDTO, period * 64);
+ return (period);
}
diff --git a/sys/arch/i386/pci/geodescreg.h b/sys/arch/i386/pci/geodescreg.h
index 2bfcf2be036..9af05ba1ced 100644
--- a/sys/arch/i386/pci/geodescreg.h
+++ b/sys/arch/i386/pci/geodescreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: geodescreg.h,v 1.1 2003/08/07 08:32:56 markus Exp $ */
+/* $OpenBSD: geodescreg.h,v 1.2 2003/08/07 16:59:37 mickey Exp $ */
/*
* Copyright (c) 2003 Markus Friedl <markus@openbsd.org>
@@ -16,29 +16,29 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-/*
+/*
* Geode SC1100 Information Appliance On a Chip
* http://www.national.com/ds.cgi/SC/SC1100.pdf
*/
/* Configuration Space Register Map */
-#define SC1100_F5_SCRATCHPAD 0x64
+#define SC1100_F5_SCRATCHPAD 0x64
-#define GCB_WDTO 0x0000 /* WATCHDOG Timeout */
-#define GCB_WDCNFG 0x0002 /* WATCHDOG Configuration */
-#define GCB_WDSTS 0x0004 /* WATCHDOG Status */
-#define GCB_IID 0x003c /* IA On a Chip ID */
-#define GCB_REV 0x003d /* Revision */
-#define GCB_CBA 0x003e /* Configuration Base Address */
+#define GCB_WDTO 0x0000 /* WATCHDOG Timeout */
+#define GCB_WDCNFG 0x0002 /* WATCHDOG Configuration */
+#define GCB_WDSTS 0x0004 /* WATCHDOG Status */
+#define GCB_IID 0x003c /* IA On a Chip ID */
+#define GCB_REV 0x003d /* Revision */
+#define GCB_CBA 0x003e /* Configuration Base Address */
/* Watchdog */
-#define WD32KPD_ENABLE 0x0000
-#define WD32KPD_DISABLE 0x0100
-#define WDTYPE1_RESET 0x0030
-#define WDTYPE2_RESET 0x00c0
-#define WDPRES_DIV_512 0x0009
-#define WDPRES_DIV_8192 0x000d
-#define WDCNFG_MASK 0x00ff
-#define WDOVF_CLEAR 0x0001
+#define WD32KPD_ENABLE 0x0000
+#define WD32KPD_DISABLE 0x0100
+#define WDTYPE1_RESET 0x0030
+#define WDTYPE2_RESET 0x00c0
+#define WDPRES_DIV_512 0x0009
+#define WDPRES_DIV_8192 0x000d
+#define WDCNFG_MASK 0x00ff
+#define WDOVF_CLEAR 0x0001
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-23 07:58:23 +0000