diff options
Diffstat (limited to 'sys/arch')
| -rw-r--r-- | sys/arch/i386/i386/locore.s | 11 | ||||
| -rw-r--r-- | sys/arch/i386/i386/machdep.c | 41 | ||||
| -rw-r--r-- | sys/arch/i386/include/cpu.h | 4 | ||||
| -rw-r--r-- | sys/arch/i386/include/specialreg.h | 31 |
4 files changed, 71 insertions, 16 deletions
diff --git a/sys/arch/i386/i386/locore.s b/sys/arch/i386/i386/locore.s index c98a6a3cb48..7e3504707ff 100644 --- a/sys/arch/i386/i386/locore.s +++ b/sys/arch/i386/i386/locore.s @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.s,v 1.140 2011/10/12 18:30:09 miod Exp $ */ +/* $OpenBSD: locore.s,v 1.141 2011/11/02 23:53:44 jsg Exp $ */ /* $NetBSD: locore.s,v 1.145 1996/05/03 19:41:19 christos Exp $ */ /*- @@ -156,6 +156,7 @@ .globl _C_LABEL(cpuid_level) .globl _C_LABEL(cpu_miscinfo) .globl _C_LABEL(cpu_feature), _C_LABEL(cpu_ecxfeature) + .globl _C_LABEL(ecpu_feature), _C_LABEL(ecpu_ecxfeature) .globl _C_LABEL(cpu_cache_eax), _C_LABEL(cpu_cache_ebx) .globl _C_LABEL(cpu_cache_ecx), _C_LABEL(cpu_cache_edx) .globl _C_LABEL(cold), _C_LABEL(cnvmem), _C_LABEL(extmem) @@ -193,7 +194,9 @@ _C_LABEL(cpu): .long 0 # are we 386, 386sx, 486, 586 or 686 _C_LABEL(cpu_id): .long 0 # saved from 'cpuid' instruction _C_LABEL(cpu_miscinfo): .long 0 # misc info (apic/brand id) from 'cpuid' _C_LABEL(cpu_feature): .long 0 # feature flags from 'cpuid' instruction -_C_LABEL(cpu_ecxfeature):.long 0 # extended feature flags from 'cpuid' +_C_LABEL(ecpu_feature): .long 0 # extended feature flags from 'cpuid' +_C_LABEL(cpu_ecxfeature):.long 0 # ecx feature flags from 'cpuid' +_C_LABEL(ecpu_ecxfeature): .long 0 # extended ecx feature flags _C_LABEL(cpuid_level): .long -1 # max. lvl accepted by 'cpuid' insn _C_LABEL(cpu_cache_eax):.long 0 _C_LABEL(cpu_cache_ebx):.long 0 @@ -407,6 +410,10 @@ try586: /* Use the `cpuid' instruction. */ cpuid cmpl $0x80000000,%eax jbe 2f + movl $0x80000001,%eax + cpuid + movl %edx,RELOC(_C_LABEL(ecpu_feature)) + movl %ecx,RELOC(_C_LABEL(ecpu_ecxfeature)) movl $0x80000002,%eax cpuid movl %eax,RELOC(_C_LABEL(cpu_brandstr)) diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index 6354e24b698..a4f411ac0b9 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.505 2011/07/05 04:48:01 guenther Exp $ */ +/* $OpenBSD: machdep.c,v 1.506 2011/11/02 23:53:44 jsg Exp $ */ /* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */ /*- @@ -983,8 +983,17 @@ const struct cpu_cpuid_feature i386_cpuid_features[] = { { CPUID_SS, "SS" }, { CPUID_HTT, "HTT" }, { CPUID_TM, "TM" }, - { CPUID_SBF, "SBF" }, - { CPUID_3DNOW, "3DNOW" }, + { CPUID_SBF, "SBF" } +}; + +const struct cpu_cpuid_feature i386_ecpuid_features[] = { + { CPUID_MPC, "MPC" }, + { CPUID_NXE, "NXE" }, + { CPUID_MMXX, "MMXX" }, + { CPUID_FFXSR, "FFXSR" }, + { CPUID_LONG, "LONG" }, + { CPUID_3DNOW2, "3DNOW2" }, + { CPUID_3DNOW, "3DNOW" } }; const struct cpu_cpuid_feature i386_cpuid_ecxfeatures[] = { @@ -1014,6 +1023,16 @@ const struct cpu_cpuid_feature i386_cpuid_ecxfeatures[] = { { CPUIDECX_AVX, "AVX" }, }; +const struct cpu_cpuid_feature i386_ecpuid_ecxfeatures[] = { + { CPUIDECX_LAHF, "LAHF" }, + { CPUIDECX_SVM, "SVM" }, + { CPUIDECX_ABM, "ABM" }, + { CPUIDECX_SSE4A, "SSE4A" }, + { CPUIDECX_XOP, "XOP" }, + { CPUIDECX_WDT, "WDT" }, + { CPUIDECX_FMA4, "FMA4" } +}; + void winchip_cpu_setup(struct cpu_info *ci) { @@ -1829,6 +1848,14 @@ identifycpu(struct cpu_info *ci) numbits++; } } + for (i = 0; i < nitems(i386_ecpuid_features); i++) { + if (ecpu_feature & + i386_ecpuid_features[i].feature_bit) { + printf("%s%s", (numbits == 0 ? "" : ","), + i386_ecpuid_features[i].feature_name); + numbits++; + } + } max = sizeof(i386_cpuid_ecxfeatures) / sizeof(i386_cpuid_ecxfeatures[0]); for (i = 0; i < max; i++) { @@ -1839,6 +1866,14 @@ identifycpu(struct cpu_info *ci) numbits++; } } + for (i = 0; i < nitems(i386_ecpuid_ecxfeatures); i++) { + if (ecpu_ecxfeature & + i386_ecpuid_ecxfeatures[i].feature_bit) { + printf("%s%s", (numbits == 0 ? "" : ","), + i386_ecpuid_ecxfeatures[i].feature_name); + numbits++; + } + } printf("\n"); } } diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h index bf6481b2c70..81eb8ab03da 100644 --- a/sys/arch/i386/include/cpu.h +++ b/sys/arch/i386/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.120 2011/05/23 09:54:20 claudio Exp $ */ +/* $OpenBSD: cpu.h,v 1.121 2011/11/02 23:53:44 jsg Exp $ */ /* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */ /*- @@ -311,7 +311,9 @@ extern char cpu_brandstr[]; extern int cpuid_level; extern int cpu_miscinfo; extern int cpu_feature; +extern int ecpu_feature; extern int cpu_ecxfeature; +extern int ecpu_ecxfeature; extern int cpu_cache_eax; extern int cpu_cache_ebx; extern int cpu_cache_ecx; diff --git a/sys/arch/i386/include/specialreg.h b/sys/arch/i386/include/specialreg.h index 3931c04ca34..7aa3d9991d7 100644 --- a/sys/arch/i386/include/specialreg.h +++ b/sys/arch/i386/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.39 2010/04/29 17:00:48 oga Exp $ */ +/* $OpenBSD: specialreg.h,v 1.40 2011/11/02 23:53:44 jsg Exp $ */ /* $NetBSD: specialreg.h,v 1.7 1994/10/27 04:16:26 cgd Exp $ */ /*- @@ -122,15 +122,6 @@ #define CPUID_B30 0x40000000 /* reserved */ #define CPUID_SBF 0x80000000 /* signal break on FERR */ -/* - * Note: The 3DNOW flag does not really belong in this feature set since it is - * returned by the cpuid instruction when called with 0x80000001 in eax rather - * than 0x00000001, but cyrix3_cpu_setup() moves it to a reserved bit of the - * feature set for simplicity - */ -#define CPUID_3DNOW 0x40000000 /* has 3DNow! instructions (AMD) */ -#define CPUID_LONG 0x20000000 /* long mode (AMD64, ext cpuid) */ - #define CPUIDECX_SSE3 0x00000001 /* has SSE3 instructions */ #define CPUIDECX_PCLMUL 0x00000002 /* Carryless Multiplication */ #define CPUIDECX_MWAIT 0x00000008 /* Monitor/Mwait */ @@ -157,6 +148,26 @@ #define CPUIDECX_AVX 0x10000000 /* Advanced Vector Extensions */ /* + * AMD/VIA processor specific flags. + */ + +#define CPUID_MPC 0x00080000 /* Multiprocessing Capable */ +#define CPUID_NXE 0x00100000 /* No-Execute Extension */ +#define CPUID_MMXX 0x00400000 /* AMD MMX Extensions */ +#define CPUID_FFXSR 0x02000000 /* fast FP/MMX save/restore */ +#define CPUID_LONG 0x20000000 /* long mode */ +#define CPUID_3DNOW2 0x40000000 /* 3DNow! Instruction Extension */ +#define CPUID_3DNOW 0x80000000 /* 3DNow! Instructions */ + +#define CPUIDECX_LAHF 0x00000001 /* LAHF and SAHF instructions */ +#define CPUIDECX_SVM 0x00000004 /* Secure Virtual Machine */ +#define CPUIDECX_ABM 0x00000020 /* LZCNT instruction */ +#define CPUIDECX_SSE4A 0x00000040 /* SSE4-A instruction set */ +#define CPUIDECX_XOP 0x00000800 /* extended operating support */ +#define CPUIDECX_WDT 0x00002000 /* watchdog timer */ +#define CPUIDECX_FMA4 0x00010000 /* 4-operand FMA instructions */ + +/* * Model-specific registers for the i386 family */ #define MSR_P5_MC_ADDR 0x000 |