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-rw-r--r--sys/arch/i386/i386/locore.s7
-rw-r--r--sys/arch/i386/i386/machdep.c29
-rw-r--r--sys/arch/i386/include/specialreg.h31
3 files changed, 50 insertions, 17 deletions
diff --git a/sys/arch/i386/i386/locore.s b/sys/arch/i386/i386/locore.s
index f07a902e600..df9c828c235 100644
--- a/sys/arch/i386/i386/locore.s
+++ b/sys/arch/i386/i386/locore.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.s,v 1.70 2003/06/02 23:27:47 millert Exp $ */
+/* $OpenBSD: locore.s,v 1.71 2003/06/06 11:11:53 andreas Exp $ */
/* $NetBSD: locore.s,v 1.145 1996/05/03 19:41:19 christos Exp $ */
/*-
@@ -138,7 +138,8 @@
.data
.globl _C_LABEL(cpu), _C_LABEL(cpu_id), _C_LABEL(cpu_vendor)
- .globl _C_LABEL(cpuid_level), _C_LABEL(cpu_feature)
+ .globl _C_LABEL(cpuid_level)
+ .globl _C_LABEL(cpu_feature), _C_LABEL(cpu_ecxfeature)
.globl _C_LABEL(cpu_cache_eax), _C_LABEL(cpu_cache_ebx)
.globl _C_LABEL(cpu_cache_ecx), _C_LABEL(cpu_cache_edx)
.globl _C_LABEL(cold), _C_LABEL(esym)
@@ -150,6 +151,7 @@
_C_LABEL(cpu): .long 0 # are we 386, 386sx, 486, 586 or 686
_C_LABEL(cpu_id): .long 0 # saved from 'cpuid' instruction
_C_LABEL(cpu_feature): .long 0 # feature flags from 'cpuid' instruction
+_C_LABEL(cpu_ecxfeature):.long 0 # extended feature flags from 'cpuid'
_C_LABEL(cpuid_level): .long -1 # max. lvl accepted by 'cpuid' insn
_C_LABEL(cpu_cache_eax):.long 0
_C_LABEL(cpu_cache_ebx):.long 0
@@ -373,6 +375,7 @@ try586: /* Use the `cpuid' instruction. */
cpuid
movl %eax,RELOC(_C_LABEL(cpu_id)) # store cpu_id and features
movl %edx,RELOC(_C_LABEL(cpu_feature))
+ movl %ecx,RELOC(_C_LABEL(cpu_ecxfeature))
movl $RELOC(_C_LABEL(cpuid_level)),%eax
cmp $2,%eax
diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c
index 5c727ae44f5..be66e1ddab3 100644
--- a/sys/arch/i386/i386/machdep.c
+++ b/sys/arch/i386/i386/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.235 2003/06/02 23:27:47 millert Exp $ */
+/* $OpenBSD: machdep.c,v 1.236 2003/06/06 11:11:53 andreas Exp $ */
/* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */
/*-
@@ -687,7 +687,8 @@ const struct cpu_cpuid_nameclass i386_cpuid_cpus[] = {
"Celeron (Mendocino)",
"Pentium III (Katmai)",
"Pentium III (Coppermine)",
- 0, "Pentium III Xeon (Cascades)",
+ "Pentium M",
+ "Pentium III Xeon (Cascades)",
"Pentium III (Tualatin)", 0, 0,
0, 0,
"Pentium Pro, II or III" /* Default */
@@ -973,12 +974,25 @@ const struct cpu_cpuid_feature i386_cpuid_features[] = {
{ CPUID_PAT, "PAT" },
{ CPUID_PSE36, "PSE36" },
{ CPUID_SER, "SER" },
+ { CPUID_CFLUSH, "CFLUSH" },
+ { CPUID_ACPI, "ACPI" },
{ CPUID_MMX, "MMX" },
{ CPUID_FXSR, "FXSR" },
{ CPUID_SIMD, "SIMD" },
+ { CPUID_SIMD2, "SIMD2" },
+ { CPUID_SS, "SS" },
+ { CPUID_HTT, "HTT" },
+ { CPUID_TM, "TM" },
+ { CPUID_SBF, "SBF" },
{ CPUID_3DNOW, "3DNOW" },
};
+const struct cpu_cpuid_feature i386_cpuid_ecxfeatures[] = {
+ { CPUIDECX_EST, "EST" },
+ { CPUIDECX_TM2, "TM2" },
+ { CPUIDECX_CNXTID, "CNXT-ID" },
+};
+
void
winchip_cpu_setup(cpu_device, model, step)
const char *cpu_device;
@@ -1327,6 +1341,7 @@ identifycpu()
extern char cpu_vendor[];
extern int cpu_id;
extern int cpu_feature;
+ extern int cpu_ecxfeature;
#ifdef CPUDEBUG
extern int cpu_cache_eax, cpu_cache_ebx, cpu_cache_ecx, cpu_cache_edx;
#else
@@ -1490,6 +1505,16 @@ identifycpu()
numbits++;
}
}
+ max = sizeof(i386_cpuid_ecxfeatures)
+ / sizeof(i386_cpuid_ecxfeatures[0]);
+ for (i = 0; i < max; i++) {
+ if (cpu_ecxfeature &
+ i386_cpuid_ecxfeatures[i].feature_bit) {
+ printf("%s%s", (numbits == 0 ? "" : ","),
+ i386_cpuid_ecxfeatures[i].feature_name);
+ numbits++;
+ }
+ }
printf("\n");
}
diff --git a/sys/arch/i386/include/specialreg.h b/sys/arch/i386/include/specialreg.h
index 2044eb1d5f2..a3d004b7b3d 100644
--- a/sys/arch/i386/include/specialreg.h
+++ b/sys/arch/i386/include/specialreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: specialreg.h,v 1.13 2003/06/02 23:27:47 millert Exp $ */
+/* $OpenBSD: specialreg.h,v 1.14 2003/06/06 11:11:54 andreas Exp $ */
/* $NetBSD: specialreg.h,v 1.7 1994/10/27 04:16:26 cgd Exp $ */
/*-
@@ -116,18 +116,23 @@
#define CPUID_EMMX 0x01000000 /* has extended MMX (Cyrix; obsolete) */
#define CPUID_SIMD 0x02000000 /* has SIMD instructions (Intel) */
#define CPUID_SIMD2 0x04000000 /* has SIMD instructions (Intel) #2 */
-#define CPUID_SS 0x08000000 /* self-snoop */
-#define CPUID_TM 0x20000000 /* thermal monitor (TCC) */
-#define CPUID_3DNOW 0x80000000 /* has 3DNow! instructions (AMD) */
-/* bits 26->31 also reserved. */
-
-#define CPUID_FLAGS1 "\20\1FPU\2VME\3DE\4PSE\5TSC\6MSR\7PAE" \
- "\10MCE\11CX8\12APIC\13SYS1\14SYS2\15MTRR"
-#define CPUID_MASK1 0x00001fff
-#define CPUID_FLAGS2 "\20\16PGE\17MCA\20CMOV\21PAT\22PSE36\23SER\24CFLUSH" \
- "\25B20\26DS\27ACPI\30MMX\31FXSR\32SIMD\33SIMD2" \
- "\34SS\35B28\36TM\37B30\40B31"
-#define CPUID_MASK2 0xffffe000
+#define CPUID_SS 0x08000000 /* self-snoop */
+#define CPUID_HTT 0x10000000 /* hyper-threading tech */
+#define CPUID_TM 0x20000000 /* thermal monitor (TCC) */
+#define CPUID_B30 0x40000000 /* reserved */
+#define CPUID_SBF 0x80000000 /* signal break on FERR */
+
+/*
+ * Note: The 3DNOW flag does not really belong in this feature set since it is
+ * returned by the cpuid instruction when called with 0x80000001 in eax rather
+ * than 0x00000001, but cyrix3_cpu_setup() moves it to a reserved bit of the
+ * feature set for simplicity
+ */
+#define CPUID_3DNOW 0x40000000 /* has 3DNow! instructions (AMD) */
+
+#define CPUIDECX_EST 0x00000080 /* enhanced SpeedStep */
+#define CPUIDECX_TM2 0x00000100 /* thermal monitor 2 */
+#define CPUIDECX_CNXTID 0x00000400 /* Context ID */
/*
* Model-specific registers for the i386 family