diff options
Diffstat (limited to 'sys/arch')
| -rw-r--r-- | sys/arch/powerpc/conf/files.powerpc | 3 | ||||
| -rw-r--r-- | sys/arch/powerpc/include/cpu.h | 19 | ||||
| -rw-r--r-- | sys/arch/powerpc/powerpc/cpu_subr.c | 58 |
3 files changed, 71 insertions, 9 deletions
diff --git a/sys/arch/powerpc/conf/files.powerpc b/sys/arch/powerpc/conf/files.powerpc index e3ef55bb758..2d87207aeb4 100644 --- a/sys/arch/powerpc/conf/files.powerpc +++ b/sys/arch/powerpc/conf/files.powerpc @@ -1,10 +1,11 @@ -# $OpenBSD: files.powerpc,v 1.40 2005/05/02 02:39:45 brad Exp $ +# $OpenBSD: files.powerpc,v 1.41 2005/11/08 20:30:47 kettenis Exp $ # file arch/powerpc/powerpc/setjmp.S ddb file arch/powerpc/powerpc/Locore.c file arch/powerpc/powerpc/bcopy.c file arch/powerpc/powerpc/copystr.c +file arch/powerpc/powerpc/cpu_subr.c file arch/powerpc/powerpc/fpu.c file arch/powerpc/powerpc/in_cksum.c inet file arch/powerpc/powerpc/pmap.c diff --git a/sys/arch/powerpc/include/cpu.h b/sys/arch/powerpc/include/cpu.h index 7493fb4d6c1..89fab8a2b45 100644 --- a/sys/arch/powerpc/include/cpu.h +++ b/sys/arch/powerpc/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.23 2005/10/22 09:19:18 kettenis Exp $ */ +/* $OpenBSD: cpu.h,v 1.24 2005/11/08 20:30:47 kettenis Exp $ */ /* $NetBSD: cpu.h,v 1.1 1996/09/30 16:34:21 ws Exp $ */ /* @@ -51,7 +51,7 @@ void delay(unsigned); extern volatile int want_resched; extern volatile int astpending; -#define need_resched(ci) (want_resched = 1, astpending = 1) +#define need_resched(ci) (want_resched = 1, astpending = 1) #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, astpending = 1) #define signotify(p) (astpending = 1) @@ -103,7 +103,7 @@ invdcache(void *from, int len) #define FUNC_SPR(n, name) \ static __inline u_int32_t ppc_mf ## name (void) \ { \ - int ret; \ + u_int32_t ret; \ __asm __volatile ("mfspr %0," # n : "=r" (ret)); \ return ret; \ } \ @@ -170,8 +170,8 @@ ppc_mftb(void) u_long scratch; u_int64_t tb; - __asm __volatile ("1: mftbu %0; mftb %0+1; mftbu %1; cmpw 0,%0,%1; bne 1b" - : "=r"(tb), "=r"(scratch)); + __asm __volatile ("1: mftbu %0; mftb %0+1; mftbu %1;" + " cmpw 0,%0,%1; bne 1b" : "=r"(tb), "=r"(scratch)); return tb; } @@ -192,10 +192,13 @@ ppc_mtmsr (u_int32_t val) static __inline void ppc_mtsrin(u_int32_t val, u_int32_t sn_shifted) { - __asm __volatile ("mtsrin %0,%1" :: "r"(val), "r"(sn_shifted) ); - + __asm __volatile ("mtsrin %0,%1" :: "r"(val), "r"(sn_shifted)); } +u_int64_t ppc64_mfscomc(void); +void ppc64_mtscomc(u_int64_t); +u_int64_t ppc64_mfscomd(void); + /* * General functions to enable and disable interrupts * without having inlined assembly code in many functions. @@ -204,7 +207,7 @@ static __inline void ppc_intr_enable(int enable) { u_int32_t msr; - if (enable != 0) { + if (enable != 0) { msr = ppc_mfmsr(); msr |= PSL_EE; ppc_mtmsr(msr); diff --git a/sys/arch/powerpc/powerpc/cpu_subr.c b/sys/arch/powerpc/powerpc/cpu_subr.c new file mode 100644 index 00000000000..e81beda6aa6 --- /dev/null +++ b/sys/arch/powerpc/powerpc/cpu_subr.c @@ -0,0 +1,58 @@ +/* $OpenBSD: cpu_subr.c,v 1.1 2005/11/08 20:30:47 kettenis Exp $ */ + +/* + * Copyright (c) 2005 Mark Kettenis + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <sys/param.h> + +#include <machine/cpu.h> + +u_int64_t +ppc64_mfscomc(void) +{ + u_int64_t ret; + int s; + + s = ppc_intr_disable(); + __asm __volatile ("mfspr %0,276;" + " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret)); + ppc_intr_enable(s); + return ret; +} + +void +ppc64_mtscomc(u_int64_t val) +{ + int s; + + s = ppc_intr_disable(); + __asm __volatile ("sldi %0,%0,32; or %0,%0,%0+1;" + " mtspr 276,%0; isync" :: "r" (val)); + ppc_intr_enable(s); +} + +u_int64_t +ppc64_mfscomd(void) +{ + u_int64_t ret; + int s; + + s = ppc_intr_disable(); + __asm __volatile ("mfspr %0,277;" + " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret)); + ppc_intr_enable(s); + return ret; +} |