summaryrefslogtreecommitdiff
path: root/sys/dev/fdt/rkclock_clocks.h
diff options
context:
space:
mode:
Diffstat (limited to 'sys/dev/fdt/rkclock_clocks.h')
-rw-r--r--sys/dev/fdt/rkclock_clocks.h46
1 files changed, 41 insertions, 5 deletions
diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h
index 15ba3dc8473..3df0603e7e5 100644
--- a/sys/dev/fdt/rkclock_clocks.h
+++ b/sys/dev/fdt/rkclock_clocks.h
@@ -283,8 +283,22 @@
#define RK3568_PLL_VPLL 5
#define RK3568_PLL_NPLL 6
+#define RK3568_ACLK_PHP 173
+#define RK3568_PCLK_PHP 175
#define RK3568_CLK_SDMMC0 177
#define RK3568_CLK_SDMMC1 179
+#define RK3568_ACLK_GMAC0 180
+#define RK3568_PCLK_GMAC0 181
+#define RK3568_CLK_MAC0_2TOP 182
+#define RK3568_CLK_MAC0_REFOUT 184
+#define RK3568_CLK_GMAC0_PTP_REF 185
+#define RK3568_ACLK_USB 186
+#define RK3568_PCLK_USB 188
+#define RK3568_ACLK_GMAC1 195
+#define RK3568_PCLK_GMAC1 196
+#define RK3568_CLK_MAC1_2TOP 197
+#define RK3568_CLK_MAC1_REFOUT 199
+#define RK3568_CLK_GMAC1_PTP_REF 200
#define RK3568_CLK_TSADC_TSEN 272
#define RK3568_CLK_TSADC 273
#define RK3568_SCLK_UART1 287
@@ -302,14 +316,36 @@
#define RK3568_CLK_I2C3 332
#define RK3568_CLK_I2C4 334
#define RK3568_CLK_I2C5 336
-
+#define RK3568_SCLK_GMAC0 386
+#define RK3568_SCLK_GMAC0_RGMII_SPEED 387
+#define RK3568_SCLK_GMAC0_RMII_SPEED 388
+#define RK3568_SCLK_GMAC0_RX_TX 389
+#define RK3568_SCLK_GMAC1 390
+#define RK3568_SCLK_GMAC1_RGMII_SPEED 391
+#define RK3568_SCLK_GMAC1_RMII_SPEED 392
+#define RK3568_SCLK_GMAC1_RX_TX 393
+
+#define RK3568_CPLL_125M 413
+#define RK3568_CPLL_62P5M 414
#define RK3568_CPLL_50M 415
+#define RK3568_CPLL_25M 416
#define RK3568_CPLL_100M 417
-#define RK3568_GPLL_400M 1019
-#define RK3568_GPLL_300M 1020
-#define RK3568_GPLL_100M 1021
-#define RK3568_CLK_OSC0_DIV_750K 1022
+#define RK3568_SCLK_GMAC0_DIV_50 1008
+#define RK3568_SCLK_GMAC0_DIV_5 1009
+#define RK3568_SCLK_GMAC0_DIV_20 1010
+#define RK3568_SCLK_GMAC0_DIV_2 1011
+#define RK3568_SCLK_GMAC1_DIV_50 1012
+#define RK3568_SCLK_GMAC1_DIV_5 1013
+#define RK3568_SCLK_GMAC1_DIV_20 1014
+#define RK3568_SCLK_GMAC1_DIV_2 1015
+#define RK3568_GPLL_400M 1016
+#define RK3568_GPLL_300M 1017
+#define RK3568_GPLL_200M 1018
+#define RK3568_GPLL_100M 1019
+#define RK3568_CLK_OSC0_DIV_750K 1020
+#define RK3568_GMAC0_CLKIN 1021
+#define RK3568_GMAC1_CLKIN 1022
#define RK3568_XIN24M 1023
/* PMUCRU */