diff options
Diffstat (limited to 'sys/dev/ic/ar5xxx.c')
| -rw-r--r-- | sys/dev/ic/ar5xxx.c | 175 |
1 files changed, 82 insertions, 93 deletions
diff --git a/sys/dev/ic/ar5xxx.c b/sys/dev/ic/ar5xxx.c index bb3fc622e4c..13337399494 100644 --- a/sys/dev/ic/ar5xxx.c +++ b/sys/dev/ic/ar5xxx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ar5xxx.c,v 1.2 2004/11/02 14:05:49 reyk Exp $ */ +/* $OpenBSD: ar5xxx.c,v 1.3 2004/11/03 16:40:46 reyk Exp $ */ /* * Copyright (c) 2004 Reyk Floeter <reyk@vantronix.net>. @@ -34,18 +34,12 @@ #include <dev/ic/ar5xxx.h> -#ifdef AR5K_SUPPORT_AR5210 extern ar5k_attach_t ar5k_ar5210_attach; -#endif #ifdef notyet -#ifdef AR5K_SUPPORT_AR5211 extern ar5k_attach_t ar5k_ar5211_attach; -#endif -#ifdef AR5K_SUPPORT_AR5212 extern ar5k_attach_t ar5k_ar5212_attach; #endif -#endif static const struct ieee80211_regchannel ar5k_5ghz_channels[] = IEEE80211_CHANNELS_5GHZ; @@ -54,24 +48,21 @@ static const struct ieee80211_regchannel ar5k_2ghz_channels[] = IEEE80211_CHANNELS_2GHZ; static const struct { - u_int16_t vendor; - u_int16_t device; + u_int16_t vendor; + u_int16_t device; const char * name; - ar5k_attach_t (*attach); + ar5k_attach_t (*attach); } ar5k_known_products[] = { /* * From pcidevs_data.h */ -#ifdef AR5K_SUPPORT_AR5210 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5210, "AR5210 Wireless LAN", ar5k_ar5210_attach }, { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5210_AP, "AR5210 Wireless LAN (AP11)", ar5k_ar5210_attach }, { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5210_DEFAULT, "AR5210 Wireless LAN (no eeprom)", ar5k_ar5210_attach }, -#endif #ifdef notyet -#ifdef AR5K_SUPPORT_AR5211 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5211, "AR5211 Wireless LAN", ar5k_ar5211_attach }, { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5211_DEFAULT, @@ -82,8 +73,6 @@ static const struct { "AR5211 Wireless LAN Reference Card", ar5k_ar5211_attach }, { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5211_LEGACY, "AR5211 Wireless LAN Reference Card", ar5k_ar5211_attach }, -#endif -#ifdef AR5K_SUPPORT_AR5212 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212, "AR5212 Wireless LAN", ar5k_ar5212_attach }, { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_DEFAULT, @@ -91,7 +80,6 @@ static const struct { { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_FPGA, "AR5212 Wireless LAN Reference Card", ar5k_ar5212_attach }, #endif -#endif }; /* @@ -107,13 +95,13 @@ ath_hal_probe(vendor, device) /* * Perform a linear search on the table of supported devices */ - for(i = 0; i < AR5K_ELEMENTS(ar5k_known_products); i++) { - if(vendor == ar5k_known_products[i].vendor && + for (i = 0; i < AR5K_ELEMENTS(ar5k_known_products); i++) { + if (vendor == ar5k_known_products[i].vendor && device == ar5k_known_products[i].device) - return(ar5k_known_products[i].name); + return (ar5k_known_products[i].name); } - return(NULL); + return (NULL); } /* @@ -136,27 +124,28 @@ ath_hal_attach(device, sc, st, sh, status) u_int8_t mac[IEEE80211_ADDR_LEN]; int i; - *status = -EINVAL; + *status = EINVAL; /* * Call the chipset-dependent attach routine by device id */ - for(i = 0; i < AR5K_ELEMENTS(ar5k_known_products); i++) { - if(device == ar5k_known_products[i].device && + for (i = 0; i < AR5K_ELEMENTS(ar5k_known_products); i++) { + if (device == ar5k_known_products[i].device && ar5k_known_products[i].attach != NULL) attach = ar5k_known_products[i].attach; } - if(attach == NULL) { - *status = -ENXIO; + if (attach == NULL) { + *status = ENXIO; AR5K_PRINTF("device not supported\n"); - return(NULL); + return (NULL); } - if((hal = malloc(sizeof(struct ath_hal), M_DEVBUF, M_NOWAIT)) == NULL) { - *status = -ENOMEM; + if ((hal = malloc(sizeof(struct ath_hal), + M_DEVBUF, M_NOWAIT)) == NULL) { + *status = ENOMEM; AR5K_PRINTF("out of memory\n"); - return(NULL); + return (NULL); } bzero(hal, sizeof(struct ath_hal)); @@ -183,41 +172,41 @@ ath_hal_attach(device, sc, st, sh, status) hal->ah_limit_tx_retries = AR5K_INIT_TX_RETRY; hal->ah_software_retry = AH_FALSE; - if(attach(device, hal, st, sh, status) == NULL) + if (attach(device, hal, st, sh, status) == NULL) goto failed; /* * Get card capabilities, values, ... */ - if(hal->ah_get_capabilities(hal) != AH_TRUE) { + if (hal->ah_get_capabilities(hal) != AH_TRUE) { AR5K_PRINTF("unable to get device capabilities\n"); goto failed; } - if((*status = ar5k_eeprom_read_mac(hal, mac)) != HAL_OK) { + if ((*status = ar5k_eeprom_read_mac(hal, mac)) != HAL_OK) { AR5K_PRINTF("unable to read address from EEPROM\n"); goto failed; } hal->ah_setMacAddress(hal, mac); - if(hal->ah_capabilities.cap_mode & HAL_MODE_11A) + if (hal->ah_capabilities.cap_mode & HAL_MODE_11A) ar5k_rt_copy(&hal->ah_rt_11a, &rt_11a); - if(hal->ah_capabilities.cap_mode & HAL_MODE_11B) + if (hal->ah_capabilities.cap_mode & HAL_MODE_11B) ar5k_rt_copy(&hal->ah_rt_11b, &rt_11b); - if(hal->ah_capabilities.cap_mode & HAL_MODE_11G) + if (hal->ah_capabilities.cap_mode & HAL_MODE_11G) ar5k_rt_copy(&hal->ah_rt_11g, &rt_11g); - if(hal->ah_capabilities.cap_mode & HAL_MODE_TURBO) + if (hal->ah_capabilities.cap_mode & HAL_MODE_TURBO) ar5k_rt_copy(&hal->ah_rt_turbo, &rt_turbo); *status = HAL_OK; - return(hal); + return (hal); failed: free(hal, M_DEVBUF); - return(NULL); + return (NULL); } u_int16_t @@ -241,7 +230,7 @@ ath_hal_computetxtime(hal, rates, frame_length, rate_index, short_preamble) /* * Calculate the transmission time by operation (PHY) mode */ - switch(rate->phy) { + switch (rate->phy) { case IEEE80211_T_CCK: /* * CCK / DS mode (802.11b) @@ -254,8 +243,8 @@ ath_hal_computetxtime(hal, rates, frame_length, rate_index, short_preamble) /* * Orthogonal Frequency Division Multiplexing */ - if(AR5K_OFDM_NUM_BITS_PER_SYM(rate->rateKbps) == 0) - return(0); + if (AR5K_OFDM_NUM_BITS_PER_SYM(rate->rateKbps) == 0) + return (0); value = AR5K_OFDM_TX_TIME(rate->rateKbps, frame_length); break; @@ -264,8 +253,8 @@ ath_hal_computetxtime(hal, rates, frame_length, rate_index, short_preamble) * Orthogonal Frequency Division Multiplexing * Atheros "Turbo Mode" (doubled rates) */ - if(AR5K_TURBO_NUM_BITS_PER_SYM(rate->rateKbps) == 0) - return(0); + if (AR5K_TURBO_NUM_BITS_PER_SYM(rate->rateKbps) == 0) + return (0); value = AR5K_TURBO_TX_TIME(rate->rateKbps, frame_length); break; @@ -274,16 +263,16 @@ ath_hal_computetxtime(hal, rates, frame_length, rate_index, short_preamble) * Orthogonal Frequency Division Multiplexing * Atheros "eXtended Range" (XR) */ - if(AR5K_XR_NUM_BITS_PER_SYM(rate->rateKbps) == 0) - return(0); + if (AR5K_XR_NUM_BITS_PER_SYM(rate->rateKbps) == 0) + return (0); value = AR5K_XR_TX_TIME(rate->rateKbps, frame_length); break; default: - return(0); + return (0); } - return(value); + return (value); } u_int @@ -291,7 +280,7 @@ ath_hal_mhz2ieee(mhz, flags) u_int mhz; u_int flags; { - return(ieee80211_mhz2ieee(mhz, flags)); + return (ieee80211_mhz2ieee(mhz, flags)); } u_int @@ -299,7 +288,7 @@ ath_hal_ieee2mhz(ieee, flags) u_int ieee; u_int flags; { - return(ieee80211_ieee2mhz(ieee, flags)); + return (ieee80211_ieee2mhz(ieee, flags)); } HAL_BOOL @@ -330,26 +319,26 @@ ath_hal_init_channels(hal, channels, max_channels, channels_size, country, mode, * Create channel list based on chipset capabilities, regulation domain * and mode. 5GHz... */ - for(i = 0; (hal->ah_capabilities.cap_range.range_5ghz_max > 0) && - (i < (sizeof(ar5k_5ghz_channels) / - sizeof(ar5k_5ghz_channels[0]))) && - (c < max_channels); i++) { + for (i = 0; (hal->ah_capabilities.cap_range.range_5ghz_max > 0) && + (i < (sizeof(ar5k_5ghz_channels) / + sizeof(ar5k_5ghz_channels[0]))) && + (c < max_channels); i++) { /* Check if channel is supported by the chipset */ - if((ar5k_5ghz_channels[i].rc_channel < - hal->ah_capabilities.cap_range.range_5ghz_min) || + if ((ar5k_5ghz_channels[i].rc_channel < + hal->ah_capabilities.cap_range.range_5ghz_min) || (ar5k_5ghz_channels[i].rc_channel > hal->ah_capabilities.cap_range.range_5ghz_max)) continue; /* Match regulation domain */ - if((IEEE80211_DMN(ar5k_5ghz_channels[i].rc_domains) & - IEEE80211_DMN(domain_5ghz)) == 0) + if ((IEEE80211_DMN(ar5k_5ghz_channels[i].rc_domains) & + IEEE80211_DMN(domain_5ghz)) == 0) continue; /* Match modes */ - if(ar5k_5ghz_channels[i].rc_mode & IEEE80211_CHAN_TURBO) + if (ar5k_5ghz_channels[i].rc_mode & IEEE80211_CHAN_TURBO) all_channels[c].channelFlags = CHANNEL_T; - else if(ar5k_5ghz_channels[i].rc_mode & IEEE80211_CHAN_OFDM) + else if (ar5k_5ghz_channels[i].rc_mode & IEEE80211_CHAN_OFDM) all_channels[c].channelFlags = CHANNEL_A; else continue; @@ -362,27 +351,27 @@ ath_hal_init_channels(hal, channels, max_channels, channels_size, country, mode, * ...and 2GHz. */ for (i = 0; (hal->ah_capabilities.cap_range.range_2ghz_max > 0) && - (i < (sizeof(ar5k_2ghz_channels) / - sizeof(ar5k_2ghz_channels[0]))) && - (c < max_channels); i++) { + (i < (sizeof(ar5k_2ghz_channels) / + sizeof(ar5k_2ghz_channels[0]))) && + (c < max_channels); i++) { /* Check if channel is supported by the chipset */ - if((ar5k_2ghz_channels[i].rc_channel < - hal->ah_capabilities.cap_range.range_2ghz_min) || + if ((ar5k_2ghz_channels[i].rc_channel < + hal->ah_capabilities.cap_range.range_2ghz_min) || (ar5k_2ghz_channels[i].rc_channel > hal->ah_capabilities.cap_range.range_2ghz_max)) continue; /* Match regulation domain */ - if((IEEE80211_DMN(ar5k_2ghz_channels[i].rc_domains) & - IEEE80211_DMN(domain_2ghz)) == 0) + if ((IEEE80211_DMN(ar5k_2ghz_channels[i].rc_domains) & + IEEE80211_DMN(domain_2ghz)) == 0) continue; /* Match modes */ - if(ar5k_2ghz_channels[i].rc_mode & IEEE80211_CHAN_CCK) + if (ar5k_2ghz_channels[i].rc_mode & IEEE80211_CHAN_CCK) all_channels[c].channelFlags = CHANNEL_B; - else if(ar5k_2ghz_channels[i].rc_mode & IEEE80211_CHAN_TURBO) + else if (ar5k_2ghz_channels[i].rc_mode & IEEE80211_CHAN_TURBO) all_channels[c].channelFlags = CHANNEL_TG; - else if(ar5k_2ghz_channels[i].rc_mode & IEEE80211_CHAN_OFDM) + else if (ar5k_2ghz_channels[i].rc_mode & IEEE80211_CHAN_OFDM) all_channels[c].channelFlags = CHANNEL_G; else continue; @@ -394,7 +383,7 @@ ath_hal_init_channels(hal, channels, max_channels, channels_size, country, mode, memcpy(channels, &all_channels, sizeof(all_channels)); *channels_size = c; - return(AH_TRUE); + return (AH_TRUE); } /* @@ -408,7 +397,7 @@ ar5k_radar_alert(hal) /* * Limit ~1/s */ - if(hal->ah_radar.r_last_channel.channel == + if (hal->ah_radar.r_last_channel.channel == hal->ah_current_channel.channel && tick < (hal->ah_radar.r_last_alert + hz)) return; @@ -436,19 +425,19 @@ ar5k_eeprom_read_mac(hal, mac) bzero(mac, IEEE80211_ADDR_LEN); bzero(&mac_d, IEEE80211_ADDR_LEN); - if(hal->ah_eeprom_is_busy(hal)) - return(-EBUSY); + if (hal->ah_eeprom_is_busy(hal)) + return (EBUSY); /* * XXX Does this work with newer EEPROMs? */ - if(hal->ah_eeprom_read(hal, 0x20, &data) != 0) - return(-EIO); + if (hal->ah_eeprom_read(hal, 0x20, &data) != 0) + return (EIO); - for(offset = 0x1f, octet = 0, total = 0; - offset >= 0x1d; offset--) { - if(hal->ah_eeprom_read(hal, offset, &data) != 0) - return(-EIO); + for (offset = 0x1f, octet = 0, total = 0; + offset >= 0x1d; offset--) { + if (hal->ah_eeprom_read(hal, offset, &data) != 0) + return (EIO); total += data; mac_d[octet + 1] = data & 0xff; @@ -458,10 +447,10 @@ ar5k_eeprom_read_mac(hal, mac) memcpy(mac, &mac_d, IEEE80211_ADDR_LEN); - if((!total) || total == (3 * 0xffff)) - return(-EINVAL); + if ((!total) || total == (3 * 0xffff)) + return (EINVAL); - return(0); + return (0); } u_int8_t @@ -471,7 +460,7 @@ ar5k_regdomain_from_ieee(regdomain) /* * XXX Fix */ - return((u_int8_t)*regdomain); + return ((u_int8_t)*regdomain); } ieee80211_regdomain_t * @@ -481,7 +470,7 @@ ar5k_regdomain_to_ieee(regdomain) /* * XXX Fix */ - return((ieee80211_regdomain_t*)®domain); + return ((ieee80211_regdomain_t*)®domain); } u_int32_t @@ -496,7 +485,7 @@ ar5k_bitswap(val, bits) retval = (retval << 1) | bit; } - return(retval); + return (retval); } u_int @@ -504,7 +493,7 @@ ar5k_htoclock(usec, turbo) u_int usec; HAL_BOOL turbo; { - return(turbo == AH_TRUE ? (usec * 80) : (usec * 40)); + return (turbo == AH_TRUE ? (usec * 80) : (usec * 40)); } u_int @@ -512,7 +501,7 @@ ar5k_clocktoh(clock, turbo) u_int clock; HAL_BOOL turbo; { - return(turbo == AH_TRUE ? (clock / 80) : (clock / 40)); + return (turbo == AH_TRUE ? (clock / 80) : (clock / 40)); } void @@ -535,16 +524,16 @@ ar5k_register_timeout(hal, reg, flag, val, is_set) { int i; - for(i = AR5K_TUNE_REGISTER_TIMEOUT; i > 0; i--) { - if((is_set == AH_TRUE) && (AR5K_REG_READ(reg) & flag)) + for (i = AR5K_TUNE_REGISTER_TIMEOUT; i > 0; i--) { + if ((is_set == AH_TRUE) && (AR5K_REG_READ(reg) & flag)) break; - else if((AR5K_REG_READ(reg) & flag) == val) + else if ((AR5K_REG_READ(reg) & flag) == val) break; AR5K_DELAY(15); } - if(i <= 0) - return(AH_FALSE); + if (i <= 0) + return (AH_FALSE); - return(AH_TRUE); + return (AH_TRUE); } |