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Diffstat (limited to 'sys/dev/isa/essreg.h')
-rw-r--r--sys/dev/isa/essreg.h28
1 files changed, 14 insertions, 14 deletions
diff --git a/sys/dev/isa/essreg.h b/sys/dev/isa/essreg.h
index 811eebed51d..0b50d812da3 100644
--- a/sys/dev/isa/essreg.h
+++ b/sys/dev/isa/essreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: essreg.h,v 1.2 1999/09/30 22:13:52 kstailey Exp $ */
+/* $OpenBSD: essreg.h,v 1.3 2001/01/29 06:27:59 mickey Exp $ */
/* $NetBSD: essreg.h,v 1.12 1999/06/18 20:25:23 augustss Exp $ */
/*
* Copyright 1997
@@ -34,7 +34,7 @@
*/
/*
-** @(#) $RCSfile: essreg.h,v $ $Revision: 1.2 $ (SHARK) $Date: 1999/09/30 22:13:52 $
+** @(#) $RCSfile: essreg.h,v $ $Revision: 1.3 $ (SHARK) $Date: 2001/01/29 06:27:59 $
**
**++
**
@@ -46,15 +46,15 @@
**
** MODULE DESCRIPTION:
**
-** This module contains the constant definitions for the device
-** registers on the ESS Technologies 1888/1887/888 sound chip.
+** This module contains the constant definitions for the device
+** registers on the ESS Technologies 1888/1887/888 sound chip.
**
** AUTHORS:
**
** Blair Fidler Software Engineering Australia
** Gold Coast, Australia.
**
-** CREATION DATE:
+** CREATION DATE:
**
** March 10, 1997.
**
@@ -67,7 +67,7 @@
* DSP commands. This unit handles MIDI and audio capabilities.
* The DSP can be reset, data/commands can be read or written to it,
* and it can generate interrupts. Interrupts are generated for MIDI
- * input or DMA completion. They seem to have neglected the fact
+ * input or DMA completion. They seem to have neglected the fact
* that it would be nice to have a MIDI transmission complete interrupt.
* Worse, the DMA engine is half-duplex. This means you need to do
* (timed) programmed I/O to be able to record and play simulataneously.
@@ -109,7 +109,7 @@
#define ESS_AUDIO_CTRL_MONITOR 0x08 /* 0=disable/1=enable */
#define ESS_AUDIO_CTRL_MONO 0x02 /* 0=disable/1=enable */
#define ESS_AUDIO_CTRL_STEREO 0x01 /* 0=disable/1=enable */
-#define ESS_XCMD_PREAMP_CTRL 0xA9 /* */
+#define ESS_XCMD_PREAMP_CTRL 0xA9 /* */
#define ESS_PREAMP_CTRL_ENABLE 0x04
#define ESS_XCMD_IRQ_CTRL 0xB1 /* legacy audio interrupt control */
@@ -127,8 +127,8 @@
#define ESS_DRQ_CTRL_EXT 0x40
#define ESS_XCMD_VOLIN_CTRL 0xB4 /* stereo input volume control */
#define ESS_1788_XCMD_AUDIO_CTRL0 0xB6
-#define ESS_CTRL0_SIGNED 0x00
-#define ESS_CTRL0_UNSIGNED 0x80
+#define ESS_CTRL0_SIGNED 0x00
+#define ESS_CTRL0_UNSIGNED 0x80
#define ESS_XCMD_AUDIO1_CTRL1 0xB7 /* */
#define ESS_AUDIO1_CTRL1_FIFO_CONNECT 0x80 /* 1=connected */
#define ESS_AUDIO1_CTRL1_FIFO_MONO 0x40 /* 0=stereo/1=mono */
@@ -216,10 +216,10 @@
#endif
/*****************************************************************************/
-/* DSP Timeout Definitions */
+/* DSP Timeout Definitions */
/*****************************************************************************/
-#define ESS_READ_TIMEOUT 5000 /* number of times to try a read, 5ms*/
-#define ESS_WRITE_TIMEOUT 5000 /* number of times to try a write, 5ms */
+#define ESS_READ_TIMEOUT 5000 /* number of times to try a read, 5ms*/
+#define ESS_WRITE_TIMEOUT 5000 /* number of times to try a write, 5ms */
#define ESS_NPORT 16
@@ -234,7 +234,7 @@
#define ESS_DSP_RW_STATUS 0x0C
#define ESS_DSP_WRITE_BUSY 0x80
-#define ESS_DSP_READ_READY 0x40
+#define ESS_DSP_READ_READY 0x40
#define ESS_DSP_READ_FULL 0x20 /* FIFO full */
#define ESS_DSP_READ_EMPTY 0x10 /* FIFO empty */
#define ESS_DSP_READ_HALF 0x08 /* FIFO half-empty */
@@ -247,7 +247,7 @@
#define ESS_MIX_REG_SELECT 0x04
#define ESS_MIX_REG_DATA 0x05
-#define ESS_MIX_RESET 0x00 /* mixer reset port and value */
+#define ESS_MIX_RESET 0x00 /* mixer reset port and value */
/*