diff options
Diffstat (limited to 'sys/dev/microcode')
| -rw-r--r-- | sys/dev/microcode/aic7xxx/Makefile.inc | 3 | ||||
| -rw-r--r-- | sys/dev/microcode/aic7xxx/aic7xxx.seq | 2017 | ||||
| -rw-r--r-- | sys/dev/microcode/aic7xxx/aic7xxx_asm.c | 102 | ||||
| -rw-r--r-- | sys/dev/microcode/aic7xxx/aic7xxx_reg.h | 773 |
4 files changed, 1773 insertions, 1122 deletions
diff --git a/sys/dev/microcode/aic7xxx/Makefile.inc b/sys/dev/microcode/aic7xxx/Makefile.inc index b701d2c7747..063a9b92afd 100644 --- a/sys/dev/microcode/aic7xxx/Makefile.inc +++ b/sys/dev/microcode/aic7xxx/Makefile.inc @@ -4,7 +4,8 @@ PATH: $S/dev/microcode/aic7xxx aic7xxx.o: aic7xxx_seq.h aic7xxx_seq.h: aic7xxx_asm $S/dev/microcode/aic7xxx/aic7xxx.seq - ./aic7xxx_asm -v -o ${.TARGET} $S/dev/microcode/aic7xxx/aic7xxx.seq + ./aic7xxx_asm -o ${.TARGET} $S/dev/microcode/aic7xxx/aic7xxx.seq aic7xxx_asm: $S/dev/microcode/aic7xxx/aic7xxx_asm.c + cc -o ${.TARGET} $< .endif diff --git a/sys/dev/microcode/aic7xxx/aic7xxx.seq b/sys/dev/microcode/aic7xxx/aic7xxx.seq index db718a8b032..9db05bec6f0 100644 --- a/sys/dev/microcode/aic7xxx/aic7xxx.seq +++ b/sys/dev/microcode/aic7xxx/aic7xxx.seq @@ -1,1262 +1,1105 @@ -##+M######################################################################### -# Adaptec 274x/284x/294x device driver for Linux and FreeBSD. -# -# Copyright (c) 1994 John Aycock -# The University of Calgary Department of Computer Science. -# All rights reserved. -# -# Modifications/enhancements: -# Copyright (c) 1994, 1995 Justin Gibbs. All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions, and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# 3. All advertising materials mentioning features or use of this software -# must display the following acknowledgement: -# This product includes software developed by the University of Calgary -# Department of Computer Science and its contributors. -# 4. Neither the name of the University nor the names of its contributors -# may be used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# FreeBSD, Twin, Wide, 2 command per target support, tagged queuing and other -# optimizations provided by Justin T. Gibbs (gibbs@FreeBSD.org) -# -##-M######################################################################### - -VERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.1 1995/10/18 08:52:39 deraadt Exp $" - -SCBMASK = 0x1f - -SCSISEQ = 0x00 -ENRSELI = 0x10 -SXFRCTL0 = 0x01 -SXFRCTL1 = 0x02 -SCSISIGI = 0x03 -SCSISIGO = 0x03 -SCSIRATE = 0x04 -SCSIID = 0x05 -SCSIDATL = 0x06 -STCNT = 0x08 -STCNT+0 = 0x08 -STCNT+1 = 0x09 -STCNT+2 = 0x0a -CLRSINT0 = 0x0b -SSTAT0 = 0x0b -SELDO = 0x40 -SELDI = 0x20 -CLRSINT1 = 0x0c -SSTAT1 = 0x0c -SIMODE1 = 0x11 -SCSIBUSL = 0x12 -SHADDR = 0x14 -SELID = 0x19 -SBLKCTL = 0x1f -SEQCTL = 0x60 -A = 0x64 # == ACCUM -SINDEX = 0x65 -DINDEX = 0x66 -ALLZEROS = 0x6a -NONE = 0x6a -SINDIR = 0x6c -DINDIR = 0x6d -FUNCTION1 = 0x6e -HADDR = 0x88 -HADDR+1 = 0x89 -HADDR+2 = 0x8a -HADDR+3 = 0x8b -HCNT = 0x8c -HCNT+0 = 0x8c -HCNT+1 = 0x8d -HCNT+2 = 0x8e -SCBPTR = 0x90 -INTSTAT = 0x91 -DFCNTRL = 0x93 -DFSTATUS = 0x94 -DFDAT = 0x99 -QINFIFO = 0x9b -QINCNT = 0x9c -QOUTFIFO = 0x9d - -SCSICONF_A = 0x5a -SCSICONF_B = 0x5b - -# The two reserved bytes at SCBARRAY+1[23] are expected to be set to -# zero, and the reserved bit in SCBARRAY+0 is used as an internal flag -# to indicate whether or not to reload scatter-gather parameters after -# a disconnect. We also use bits 6 & 7 to indicate whether or not to -# initiate SDTR or WDTR repectively when starting this command. -# -SCBARRAY+0 = 0xa0 - -DISCONNECTED = 0x04 -NEEDDMA = 0x08 -SG_LOAD = 0x10 -TAG_ENB = 0x20 -NEEDSDTR = 0x40 -NEEDWDTR = 0x80 - -SCBARRAY+1 = 0xa1 -SCBARRAY+2 = 0xa2 -SCBARRAY+3 = 0xa3 -SCBARRAY+4 = 0xa4 -SCBARRAY+5 = 0xa5 -SCBARRAY+6 = 0xa6 -SCBARRAY+7 = 0xa7 -SCBARRAY+8 = 0xa8 -SCBARRAY+9 = 0xa9 -SCBARRAY+10 = 0xaa -SCBARRAY+11 = 0xab -SCBARRAY+12 = 0xac -SCBARRAY+13 = 0xad -SCBARRAY+14 = 0xae -SCBARRAY+15 = 0xaf -SCBARRAY+16 = 0xb0 -SCBARRAY+17 = 0xb1 -SCBARRAY+18 = 0xb2 -SCBARRAY+19 = 0xb3 -SCBARRAY+20 = 0xb4 -SCBARRAY+21 = 0xb5 -SCBARRAY+22 = 0xb6 -SCBARRAY+23 = 0xb7 -SCBARRAY+24 = 0xb8 -SCBARRAY+25 = 0xb9 -SCBARRAY+26 = 0xba -SCBARRAY+27 = 0xbb -SCBARRAY+28 = 0xbc -SCBARRAY+29 = 0xbd -SCBARRAY+30 = 0xbe - -BAD_PHASE = 0x01 # unknown scsi bus phase -CMDCMPLT = 0x02 # Command Complete -SEND_REJECT = 0x11 # sending a message reject -NO_IDENT = 0x21 # no IDENTIFY after reconnect -NO_MATCH = 0x31 # no cmd match for reconnect -MSG_SDTR = 0x41 # SDTR message recieved -MSG_WDTR = 0x51 # WDTR message recieved -MSG_REJECT = 0x61 # Reject message recieved -BAD_STATUS = 0x71 # Bad status from target -RESIDUAL = 0x81 # Residual byte count != 0 -ABORT_TAG = 0x91 # Sent an ABORT_TAG message - -# The host adapter card (at least the BIOS) uses 20-2f for SCSI -# device information, 32-33 and 5a-5f as well. As it turns out, the -# BIOS trashes 20-2f, writing the synchronous negotiation results -# on top of the BIOS values, so we re-use those for our per-target -# scratchspace (actually a value that can be copied directly into -# SCSIRATE). The kernel driver will enable synchronous negotiation -# for all targets that have a value other than 0 in the lower four -# bits of the target scratch space. This should work irregardless of -# whether the bios has been installed. NEEDWDTR and NEEDSDTR are the top -# two bits of the SCB control byte. The kernel driver will set these -# when a WDTR or SDTR message should be sent to the target the SCB's -# command references. -# -# REJBYTE contains the first byte of a MESSAGE IN message, so the driver -# can report an intelligible error if a message is rejected. -# -# FLAGS's high bit is true if we are currently handling a reselect; -# its next-highest bit is true ONLY IF we've seen an IDENTIFY message -# from the reselecting target. If we haven't had IDENTIFY, then we have -# no idea what the lun is, and we can't select the right SCB register -# bank, so force a kernel panic if the target attempts a data in/out or -# command phase instead of corrupting something. FLAGS also contains -# configuration bits so that we can optimize for TWIN and WIDE controllers -# as well as the MAX_SYNC bit which we set when we want to negotiate for -# 10MHz irregardless of what the per target scratch space says. -# -# Note that SG_NEXT occupies four bytes. -# -SYNCNEG = 0x20 - -REJBYTE = 0x31 -DISC_DSB_A = 0x32 -DISC_DSB_B = 0x33 - -MSG_LEN = 0x34 -MSG_START+0 = 0x35 -MSG_START+1 = 0x36 -MSG_START+2 = 0x37 -MSG_START+3 = 0x38 -MSG_START+4 = 0x39 -MSG_START+5 = 0x3a --MSG_START+0 = 0xcb # 2's complement of MSG_START+0 - -ARG_1 = 0x4a # sdtr conversion args & return -BUS_16_BIT = 0x01 -RETURN_1 = 0x4a - -SIGSTATE = 0x4b # value written to SCSISIGO - -# Linux users should use 0xc (12) for SG_SIZEOF -SG_SIZEOF = 0x8 # sizeof(struct ahc_dma) -#SG_SIZEOF = 0xc # sizeof(struct scatterlist) -SCB_SIZEOF = 0x13 # sizeof SCB to DMA (19 bytes) - -SG_NOLOAD = 0x4c # load SG pointer/length? -SG_COUNT = 0x4d # working value of SG count -SG_NEXT = 0x4e # working value of SG pointer -SG_NEXT+0 = 0x4e -SG_NEXT+1 = 0x4f -SG_NEXT+2 = 0x50 -SG_NEXT+3 = 0x51 - -SCBCOUNT = 0x52 # the actual number of SCBs -FLAGS = 0x53 # Device configuration flags -TWIN_BUS = 0x01 -WIDE_BUS = 0x02 -MAX_SYNC = 0x08 -ACTIVE_MSG = 0x20 -IDENTIFY_SEEN = 0x40 -RESELECTED = 0x80 - -ACTIVE_A = 0x54 -ACTIVE_B = 0x55 -SAVED_TCL = 0x56 # Temporary storage for the - # target/channel/lun of a - # reconnecting target - -# After starting the selection hardware, we return to the "poll_for_work" -# loop so that we can check for reconnecting targets as well as for our -# selection to complete just in case the reselection wins bus arbitration. -# The problem with this is that we must keep track of the SCB that we've -# already pulled from the QINFIFO and started the selection on just in case -# the reselection wins so that we can retry the selection at a later time. -# This problem cannot be resolved by holding a single entry in scratch -# ram since a reconnecting target can request sense and this will create -# yet another SCB waiting for selection. The solution used here is to -# use byte 31 of the SCB as a psuedo-next pointer and to thread a list -# of SCBs that are awaiting selection. Since 0 is a valid SCB offset, -# SCB_LIST_NULL is 0x10 which is out of range. The kernel driver must -# add an entry to this list everytime a request sense occurs. The sequencer -# will automatically consume the entries. - -WAITING_SCBH = 0x57 # head of list of SCBs awaiting - # selection -WAITING_SCBT = 0x58 # tail of list of SCBs awaiting - # selection -SCB_LIST_NULL = 0x10 - - -# Poll QINCNT for work - the lower bits contain -# the number of entries in the Queue In FIFO. -# +/*+M*********************************************************************** + *Adaptec 274x/284x/294x device driver for Linux and FreeBSD. + * + *Copyright (c) 1994 John Aycock + * The University of Calgary Department of Computer Science. + * All rights reserved. + * + *FreeBSD, Twin, Wide, 2 command per target support, tagged queuing, + *SCB paging and other optimizations: + *Copyright (c) 1994, 1995, 1996 Justin Gibbs. All rights reserved. + * + *Redistribution and use in source and binary forms, with or without + *modification, are permitted provided that the following conditions + *are met: + *1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + *2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + *3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of Calgary + * Department of Computer Science and its contributors. + *4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + *ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + *IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + *ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + *DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + *OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + *HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + *OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + *SUCH DAMAGE. + * + *-M************************************************************************/ + +VERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.2 1996/05/05 12:42:37 deraadt Exp $" + +#if defined(__NetBSD__) +#include "../../../../dev/microcode/aic7xxx/aic7xxx_reg.h" +#elif defined(__FreeBSD__) +#include "../../dev/aic7xxx/aic7xxx_reg.h" +#endif + +/* + * We can't just use ACCUM in the sequencer code because it + * must be treated specially by the assembler, and it currently + * looks for the symbol 'A'. This is the only register defined in + * the assembler's symbol space. + */ +A = ACCUM + +/* After starting the selection hardware, we check for reconnecting targets + * as well as for our selection to complete just in case the reselection wins + * bus arbitration. The problem with this is that we must keep track of the + * SCB that we've already pulled from the QINFIFO and started the selection + * on just in case the reselection wins so that we can retry the selection at + * a later time. This problem cannot be resolved by holding a single entry + * in scratch ram since a reconnecting target can request sense and this will + * create yet another SCB waiting for selection. The solution used here is to + * use byte 27 of the SCB as a psuedo-next pointer and to thread a list + * of SCBs that are awaiting selection. Since 0-0xfe are valid SCB offsets, + * SCB_LIST_NULL is 0xff which is out of range. The kernel driver must + * add an entry to this list everytime a request sense occurs. The sequencer + * will automatically consume the entries. + */ + +/* + * We assume that the kernel driver may reset us at any time, even in the + * middle of a DMA, so clear DFCNTRL too. + */ +reset: + clr DFCNTRL + clr SCSISIGO /* De-assert BSY */ +/* + * We jump to start after every bus free. + */ start: - test WAITING_SCBH,SCB_LIST_NULL jz start_waiting + and FLAGS,0x0f /* clear target specific flags */ + mvi SCSISEQ,ENRSELI /* Always allow reselection */ poll_for_work: - test FLAGS,TWIN_BUS jz start2 # Are we a twin channel device? -# For fairness, we check the other bus first, since we just finished a -# transaction on the current channel. - xor SBLKCTL,0x08 # Toggle to the other bus + /* + * Are we a twin channel device? + * For fairness, we check the other bus first, + * since we just finished a transaction on the + * current channel. + */ + test FLAGS,TWIN_BUS jz start2 + xor SBLKCTL,SELBUSB /* Toggle to the other bus */ test SSTAT0,SELDI jnz reselect - test SSTAT0,SELDO jnz select - xor SBLKCTL,0x08 # Toggle to the original bus + xor SBLKCTL,SELBUSB /* Toggle to the original bus */ start2: test SSTAT0,SELDI jnz reselect - test SSTAT0,SELDO jnz select - test WAITING_SCBH,SCB_LIST_NULL jz start_waiting - test QINCNT,SCBMASK jz poll_for_work - -# We have at least one queued SCB now and we don't have any -# SCBs in the list of SCBs awaiting selection. Set the SCB -# pointer from the FIFO so we see the right bank of SCB -# registers, then set SCSI options and set the initiator and -# target SCSI IDs. -# + cmp WAITING_SCBH,SCB_LIST_NULL jne start_waiting + mov A, QCNTMASK + test QINCNT,A jz poll_for_work + +/* + * We have at least one queued SCB now and we don't have any + * SCBs in the list of SCBs awaiting selection. Set the SCB + * pointer from the FIFO so we see the right bank of SCB + * registers. + */ mov SCBPTR,QINFIFO -# If the control byte of this SCB has the NEEDDMA flag set, we have -# yet to DMA it from host memory - -test SCBARRAY+0,NEEDDMA jz test_busy - clr HCNT+2 - clr HCNT+1 - mvi HCNT+0,SCB_SIZEOF - - mvi DINDEX,HADDR - mvi SCBARRAY+26 call bcopy_4 - - mvi DFCNTRL,0xd # HDMAEN|DIRECTION|FIFORESET - -# Wait for DMA from host memory to data FIFO to complete, then disable -# DMA and wait for it to acknowledge that it's off. -# - call dma_finish - -# Copy the SCB from the FIFO to the SCBARRAY - - mvi DINDEX, SCBARRAY+0 - call bcopy_3_dfdat - call bcopy_4_dfdat - call bcopy_4_dfdat - call bcopy_4_dfdat - call bcopy_4_dfdat - -# See if there is not already an active SCB for this target. This code -# locks out on a per target basis instead of target/lun. Although this -# is not ideal for devices that have multiple luns active at the same -# time, it is faster than looping through all SCB's looking for active -# commands. It may be benificial to make findscb a more general procedure -# to see if the added cost of the search is negligible. This code also -# assumes that the kernel driver will clear the active flags on board -# initialization, board reset, and a target's SELTO. +/* + * See if there is not already an active SCB for this target. This code + * locks out on a per target basis instead of target/lun. Although this + * is not ideal for devices that have multiple luns active at the same + * time, it is faster than looping through all SCB's looking for active + * commands. It may be benificial to make findscb a more general procedure + * to see if the added cost of the search is negligible. This code also + * assumes that the kernel driver will clear the active flags on board + * initialization, board reset, and a target SELTO. Tagged commands + * don't set the active bits since you can queue more than one command + * at a time. We do, however, look to see if there are any non-tagged + * I/Os in progress, and requeue the command if there are. Tagged and + * non-tagged commands cannot be mixed to a single target. + */ test_busy: - test SCBARRAY+0,0x20 jnz start_scb - and FUNCTION1,0x70,SCBARRAY+1 + mov FUNCTION1,SCB_TCL mov A,FUNCTION1 - test SCBARRAY+1,0x88 jz test_a # Id < 8 && A channel + test SCB_TCL,0x88 jz test_a /* Id < 8 && A channel */ test ACTIVE_B,A jnz requeue - or ACTIVE_B,A # Mark the current target as busy + test SCB_CONTROL,TAG_ENB jnz start_scb + /* Mark the current target as busy */ + or ACTIVE_B,A jmp start_scb -# Place the currently active back on the queue for later processing +/* Place the currently active SCB back on the queue for later processing */ requeue: mov QINFIFO, SCBPTR jmp poll_for_work -# Pull the first entry off of the waiting for selection list +/* + * Pull the first entry off of the waiting for selection list + * We don't have to "test_busy" because only transactions that + * have passed that test can be in the waiting_scb list. + */ start_waiting: mov SCBPTR,WAITING_SCBH - jmp start_scb + jmp start_scb2 test_a: - test ACTIVE_A,A jnz requeue - or ACTIVE_A,A # Mark the current target as busy + test ACTIVE_A,A jnz requeue + test SCB_CONTROL,TAG_ENB jnz start_scb + /* Mark the current target as busy */ + or ACTIVE_A,A start_scb: - and SINDEX,0xf7,SBLKCTL #Clear the channel select bit - and A,0x08,SCBARRAY+1 #Get new channel bit - or SINDEX,A - mov SBLKCTL,SINDEX # select channel - mov SCBARRAY+1 call initialize_scsiid - -# Enable selection phase as an initiator, and do automatic ATN -# after the selection. We do this now so that we can overlap the -# rest of our work to set up this target with the arbitration and -# selection bus phases. -# -start_selection: - or SCSISEQ,0x48 # ENSELO|ENAUTOATNO + mov SCB_NEXT,WAITING_SCBH mov WAITING_SCBH, SCBPTR - clr SG_NOLOAD - and FLAGS,0x3f # !RESELECTING - -# As soon as we get a successful selection, the target should go -# into the message out phase since we have ATN asserted. Prepare -# the message to send, locking out the device driver. If the device -# driver hasn't beaten us with an ABORT or RESET message, then tack -# on an SDTR negotiation if required. -# -# Messages are stored in scratch RAM starting with a flag byte (high bit -# set means active message), one length byte, and then the message itself. -# - mov SCBARRAY+1 call disconnect # disconnect ok? - - and SINDEX,0x7,SCBARRAY+1 # lun - or SINDEX,A # return value from disconnect - or SINDEX,0x80 call mk_mesg # IDENTIFY message - - mov A,SINDEX - test SCBARRAY+0,0xe0 jz !message # WDTR, SDTR or TAG?? - cmp MSG_START+0,A jne !message # did driver beat us? - -# Tag Message if Tag enabled in SCB control block. Use SCBPTR as the tag -# value +start_scb2: + and SINDEX,0xf7,SBLKCTL /* Clear the channel select bit */ + and A,0x08,SCB_TCL /* Get new channel bit */ + or SINDEX,A + mov SBLKCTL,SINDEX /* select channel */ + mov SCB_TCL call initialize_scsiid + +/* + * Enable selection phase as an initiator, and do automatic ATN + * after the selection. We do this now so that we can overlap the + * rest of our work to set up this target with the arbitration and + * selection bus phases. + */ +start_selection: + mvi SCSISEQ,0x58 /* ENSELO|ENAUTOATNO|ENRSELI */ + +/* + * As soon as we get a successful selection, the target should go + * into the message out phase since we have ATN asserted. Prepare + * the message to send. + * + * Messages are stored in scratch RAM starting with a length byte + * followed by the message itself. + */ + test SCB_CMDLEN,0xff jnz mk_identify /* 0 Length Command? */ + +/* + * The kernel has sent us an SCB with no command attached. This implies + * that the kernel wants to send a message of some sort to this target, + * so we interrupt the driver, allow it to fill the message buffer, and + * then go back into the arbitration loop + */ + mvi INTSTAT,AWAITING_MSG + jmp wait_for_selection + +mk_identify: + and A,DISCENB,SCB_CONTROL /* mask off disconnect privledge */ + + and MSG0,0x7,SCB_TCL /* lun */ + or MSG0,A /* or in disconnect privledge */ + or MSG0,MSG_IDENTIFY + mvi MSG_LEN, 1 + + test SCB_CONTROL,0xb0 jz !message /* WDTR, SDTR or TAG?? */ +/* + * Send a tag message if TAG_ENB is set in the SCB control block. + * Use SCB_TAG (the position in the kernel's SCB array) as the tag value. + */ mk_tag: - mvi DINDEX, MSG_START+1 - test SCBARRAY+0,TAG_ENB jz mk_tag_done - and A,0x23,SCBARRAY+0 - mov DINDIR,A - mov DINDIR,SCBPTR + mvi DINDEX, MSG1 + test SCB_CONTROL,TAG_ENB jz mk_tag_done + and DINDIR,0x23,SCB_CONTROL + mov DINDIR,SCB_TAG - add MSG_LEN,-MSG_START+0,DINDEX # update message length + add MSG_LEN,COMP_MSG0,DINDEX /* update message length */ mk_tag_done: - mov DINDEX call mk_dtr # build DTR message if needed + test SCB_CONTROL,0x90 jz !message /* NEEDWDTR|NEEDSDTR */ + mov DINDEX call mk_dtr /* build DTR message if needed */ !message: - jmp poll_for_work - -# Reselection has been initiated by a target. Make a note that we've been -# reselected, but haven't seen an IDENTIFY message from the target -# yet. -# +wait_for_selection: + test SSTAT0,SELDO jnz select + test SSTAT0,SELDI jz wait_for_selection + +/* + * Reselection has been initiated by a target. Make a note that we've been + * reselected, but haven't seen an IDENTIFY message from the target + * yet. + */ reselect: + clr MSG_LEN /* Don't have anything in the mesg buffer */ mov SELID call initialize_scsiid - and FLAGS,0x3f # reselected, no IDENTIFY - or FLAGS,RESELECTED jmp select2 - -# After the selection, remove this SCB from the "waiting for selection" -# list. This is achieved by simply moving our "next" pointer into -# WAITING_SCBH and setting our next pointer to null so that the next -# time this SCB is used, we don't get confused. -# + or FLAGS,RESELECTED + jmp select2 + +/* + * After the selection, remove this SCB from the "waiting for selection" + * list. This is achieved by simply moving our "next" pointer into + * WAITING_SCBH. Our next pointer will be set to null the next time this + * SCB is used, so don't bother with it now. + */ select: - or SCBARRAY+0,NEEDDMA - mov WAITING_SCBH,SCBARRAY+30 - mvi SCBARRAY+30,SCB_LIST_NULL + mov WAITING_SCBH,SCB_NEXT + or FLAGS,SELECTED select2: - call initialize_for_target - mvi SCSISEQ,ENRSELI - mvi CLRSINT0,0x60 # CLRSELDI|CLRSELDO - mvi CLRSINT1,0x8 # CLRBUSFREE - -# Main loop for information transfer phases. If BSY is false, then -# we have a bus free condition, expected or not. Otherwise, wait -# for the target to assert REQ before checking MSG, C/D and I/O -# for the bus phase. -# -# We can't simply look at the values of SCSISIGI here (if we want -# to do synchronous data transfer), because the target won't assert -# REQ if it's already sent us some data that we haven't acknowledged -# yet. -# +/* + * Set CLRCHN here before the target has entered a data transfer mode - + * with synchronous SCSI, if you do it later, you blow away some + * data in the SCSI FIFO that the target has already sent to you. + */ + or SXFRCTL0,CLRCHN +/* + * Initialize SCSIRATE with the appropriate value for this target. + */ + call ndx_dtr + mov SCSIRATE,SINDIR + + mvi SCSISEQ,ENAUTOATNP /* + * ATN on parity errors + * for "in" phases + */ + mvi CLRSINT1,CLRBUSFREE + mvi CLRSINT0,0x60 /* CLRSELDI|CLRSELDO */ + +/* + * Main loop for information transfer phases. If BSY is false, then + * we have a bus free condition, expected or not. Otherwise, wait + * for the target to assert REQ before checking MSG, C/D and I/O + * for the bus phase. + * + */ ITloop: - test SSTAT1,0x8 jnz p_busfree # BUSFREE - test SSTAT1,0x1 jz ITloop # REQINIT + test SSTAT1,BUSFREE jnz p_busfree + test SSTAT1,REQINIT jz ITloop - and A,0xe0,SCSISIGI # CDI|IOI|MSGI + and A,PHASE_MASK,SCSISIGI + mov LASTPHASE,A + mov SCSISIGO,A cmp ALLZEROS,A je p_dataout - cmp A,0x40 je p_datain - cmp A,0x80 je p_command - cmp A,0xc0 je p_status - cmp A,0xa0 je p_mesgout - cmp A,0xe0 je p_mesgin + cmp A,P_DATAIN je p_datain + cmp A,P_COMMAND je p_command + cmp A,P_MESGOUT je p_mesgout + cmp A,P_STATUS je p_status + cmp A,P_MESGIN je p_mesgin - mvi INTSTAT,BAD_PHASE # unknown - signal driver + mvi INTSTAT,BAD_PHASE /* unknown phase - signal driver */ p_dataout: - mvi 0 call scsisig # !CDO|!IOO|!MSGO - call assert - call sg_load - - mvi DINDEX,HADDR - mvi SCBARRAY+19 call bcopy_4 - -# mvi DINDEX,HCNT # implicit since HCNT is next to HADDR - mvi SCBARRAY+23 call bcopy_3 - - mvi DINDEX,STCNT - mvi SCBARRAY+23 call bcopy_3 - -# If we are the last SG block, don't set wideodd. - test SCBARRAY+18,0xff jnz p_dataout_wideodd - mvi 0x3d call dma # SCSIEN|SDMAEN|HDMAEN| - # DIRECTION|FIFORESET - jmp p_dataout_rest - -p_dataout_wideodd: - mvi 0xbd call dma # WIDEODD|SCSIEN|SDMAEN|HDMAEN| - # DIRECTION|FIFORESET - -p_dataout_rest: -# After a DMA finishes, save the final transfer pointer and count -# back into the SCB, in case a device disconnects in the middle of -# a transfer. Use SHADDR and STCNT instead of HADDR and HCNT, since -# it's a reflection of how many bytes were transferred on the SCSI -# (as opposed to the host) bus. -# - mvi DINDEX,SCBARRAY+23 - mvi STCNT call bcopy_3 + mvi DMAPARAMS,0x7d /* + * WIDEODD|SCSIEN|SDMAEN|HDMAEN| + * DIRECTION|FIFORESET + */ + jmp data_phase_init + +/* + * If we re-enter the data phase after going through another phase, the + * STCNT may have been cleared, so restore it from the residual field. + */ +data_phase_reinit: + mov STCNT0,SCB_RESID_DCNT0 + mov STCNT1,SCB_RESID_DCNT1 + mov STCNT2,SCB_RESID_DCNT2 + jmp data_phase_loop - mvi DINDEX,SCBARRAY+19 - mvi SHADDR call bcopy_4 +p_datain: + mvi DMAPARAMS,0x79 /* + * WIDEODD|SCSIEN|SDMAEN|HDMAEN| + * !DIRECTION|FIFORESET + */ +data_phase_init: + call assert - call sg_advance - mov SCBARRAY+18,SG_COUNT # residual S/G count + test FLAGS, DPHASE jnz data_phase_reinit + call sg_scb2ram + or FLAGS, DPHASE /* We have seen a data phase */ - jmp ITloop +data_phase_loop: +/* If we are the last SG block, don't set wideodd. */ + cmp SG_COUNT,0x01 jne data_phase_wideodd + and DMAPARAMS, 0xbf /* Turn off WIDEODD */ +data_phase_wideodd: + mov DMAPARAMS call dma -p_datain: - mvi 0x40 call scsisig # !CDO|IOO|!MSGO - call assert - call sg_load +/* Exit if we had an underrun */ + test SSTAT0,SDONE jz data_phase_finish /* underrun STCNT != 0 */ - mvi DINDEX,HADDR - mvi SCBARRAY+19 call bcopy_4 +/* + * Advance the scatter-gather pointers if needed + */ +sg_advance: + dec SG_COUNT /* one less segment to go */ -# mvi DINDEX,HCNT # implicit since HCNT is next to HADDR - mvi SCBARRAY+23 call bcopy_3 + test SG_COUNT, 0xff jz data_phase_finish /* Are we done? */ - mvi DINDEX,STCNT - mvi SCBARRAY+23 call bcopy_3 + clr A /* add sizeof(struct scatter) */ + add SG_NEXT0,SG_SIZEOF,SG_NEXT0 + adc SG_NEXT1,A,SG_NEXT1 -# If we are the last SG block, don't set wideodd. - test SCBARRAY+18,0xff jnz p_datain_wideodd - mvi 0x39 call dma # SCSIEN|SDMAEN|HDMAEN| - # !DIRECTION|FIFORESET - jmp p_datain_rest -p_datain_wideodd: - mvi 0xb9 call dma # WIDEODD|SCSIEN|SDMAEN|HDMAEN| - # !DIRECTION|FIFORESET -p_datain_rest: - mvi DINDEX,SCBARRAY+23 - mvi STCNT call bcopy_3 +/* + * Load a struct scatter and set up the data address and length. + * If the working value of the SG count is nonzero, then + * we need to load a new set of values. + * + * This, like all DMA's, assumes little-endian host data storage. + */ +sg_load: + clr HCNT2 + clr HCNT1 + mvi HCNT0,SG_SIZEOF - mvi DINDEX,SCBARRAY+19 - mvi SHADDR call bcopy_4 + mov HADDR0,SG_NEXT0 + mov HADDR1,SG_NEXT1 + mov HADDR2,SG_NEXT2 + mov HADDR3,SG_NEXT3 - call sg_advance - mov SCBARRAY+18,SG_COUNT # residual S/G count + or DFCNTRL,0xd /* HDMAEN|DIRECTION|FIFORESET */ +/* + * Wait for DMA from host memory to data FIFO to complete, then disable + * DMA and wait for it to acknowledge that it's off. + */ +dma_finish: + test DFSTATUS,HDONE jz dma_finish + /* Turn off DMA preserving WIDEODD */ + and DFCNTRL,WIDEODD +dma_finish2: + test DFCNTRL,HDMAENACK jnz dma_finish2 + +/* + * Copy data from FIFO into SCB data pointer and data count. This assumes + * that the struct scatterlist has this structure (this and sizeof(struct + * scatterlist) == 12 are asserted in aic7xxx.c for the Linux driver): + * + * struct scatterlist { + * char *address; four bytes, little-endian order + * ... four bytes, ignored + * unsigned short length; two bytes, little-endian order + * } + * + * + * In FreeBSD, the scatter list entry is only 8 bytes. + * + * struct ahc_dma_seg { + * physaddr addr; four bytes, little-endian order + * long len; four bytes, little endian order + * }; + */ + + mov HADDR0,DFDAT + mov HADDR1,DFDAT + mov HADDR2,DFDAT + mov HADDR3,DFDAT +/* + * For Linux, we must throw away four bytes since there is a 32bit gap + * in the middle of a struct scatterlist. + */ +#ifdef linux + mov NONE,DFDAT + mov NONE,DFDAT + mov NONE,DFDAT + mov NONE,DFDAT +#endif + mov HCNT0,DFDAT + mov HCNT1,DFDAT + mov HCNT2,DFDAT + +/* Load STCNT as well. It is a mirror of HCNT */ + mov STCNT0,HCNT0 + mov STCNT1,HCNT1 + mov STCNT2,HCNT2 + test SSTAT1,PHASEMIS jz data_phase_loop + +data_phase_finish: +/* + * After a DMA finishes, save the SG and STCNT residuals back into the SCB + * We use STCNT instead of HCNT, since it's a reflection of how many bytes + * were transferred on the SCSI (as opposed to the host) bus. + */ + mov SCB_RESID_DCNT0,STCNT0 + mov SCB_RESID_DCNT1,STCNT1 + mov SCB_RESID_DCNT2,STCNT2 + mov SCB_RESID_SGCNT, SG_COUNT jmp ITloop -# Command phase. Set up the DMA registers and let 'er rip - the -# two bytes after the SCB SCSI_cmd_length are zeroed by the driver, -# so we can copy those three bytes directly into HCNT. -# +/* + * Command phase. Set up the DMA registers and let 'er rip. + */ p_command: - mvi 0x80 call scsisig # CDO|!IOO|!MSGO call assert - mvi DINDEX,HADDR - mvi SCBARRAY+7 call bcopy_4 - -# mvi DINDEX,HCNT # implicit since HCNT is next to HADDR - mvi SCBARRAY+11 call bcopy_3 - - mvi DINDEX,STCNT - mvi SCBARRAY+11 call bcopy_3 +/* + * Load HADDR and HCNT. + */ + mov HADDR0, SCB_CMDPTR0 + mov HADDR1, SCB_CMDPTR1 + mov HADDR2, SCB_CMDPTR2 + mov HADDR3, SCB_CMDPTR3 + mov HCNT0, SCB_CMDLEN + clr HCNT1 + clr HCNT2 + + mov STCNT0, HCNT0 + mov STCNT1, HCNT1 + mov STCNT2, HCNT2 mvi 0x3d call dma # SCSIEN|SDMAEN|HDMAEN| # DIRECTION|FIFORESET jmp ITloop -# Status phase. Wait for the data byte to appear, then read it -# and store it into the SCB. -# +/* + * Status phase. Wait for the data byte to appear, then read it + * and store it into the SCB. + */ p_status: - mvi 0xc0 call scsisig # CDO|IOO|!MSGO - - mvi SCBARRAY+14 call inb_first - jmp p_mesgin_done + mvi SCB_TARGET_STATUS call inb_first + jmp mesgin_done -# Message out phase. If there is no active message, but the target -# took us into this phase anyway, build a no-op message and send it. -# +/* + * Message out phase. If there is not an active message, but the target + * took us into this phase anyway, build a no-op message and send it. + */ p_mesgout: - mvi 0xa0 call scsisig # CDO|!IOO|MSGO - mvi 0x8 call mk_mesg # build NOP message - - clr STCNT+2 - clr STCNT+1 - -# Set up automatic PIO transfer from MSG_START. Bit 3 in -# SXFRCTL0 (SPIOEN) is already on. -# - mvi SINDEX,MSG_START+0 + test MSG_LEN, 0xff jnz p_mesgout_start + mvi MSG_NOP call mk_mesg /* build NOP message */ + +p_mesgout_start: +/* + * Set up automatic PIO transfer from MSG0. Bit 3 in + * SXFRCTL0 (SPIOEN) is already on. + */ + mvi SINDEX,MSG0 mov DINDEX,MSG_LEN -# When target asks for a byte, drop ATN if it's the last one in -# the message. Otherwise, keep going until the message is exhausted. -# (We can't use outb for this since it wants the input in SINDEX.) -# -# Keep an eye out for a phase change, in case the target issues -# a MESSAGE REJECT. -# -p_mesgout2: - test SSTAT0,0x2 jz p_mesgout2 # SPIORDY - test SSTAT1,0x10 jnz p_mesgout6 # PHASEMIS - - cmp DINDEX,1 jne p_mesgout3 # last byte? - mvi CLRSINT1,0x40 # CLRATNO - drop ATN - -# Write a byte to the SCSI bus. The AIC-7770 refuses to automatically -# send ACKs in automatic PIO or DMA mode unless you make sure that the -# "expected" bus phase in SCSISIGO matches the actual bus phase. This -# behaviour is completely undocumented and caused me several days of -# grief. -# -# After plugging in different drives to test with and using a longer -# SCSI cable, I found that I/O in Automatic PIO mode ceased to function, -# especially when transferring >1 byte. It seems to be much more stable -# if STCNT is set to one before the transfer, and SDONE (in SSTAT0) is -# polled for transfer completion - for both output _and_ input. The -# only theory I have is that SPIORDY doesn't drop right away when SCSIDATL -# is accessed (like the documentation says it does), and that on a longer -# cable run, the sequencer code was fast enough to loop back and see -# an SPIORDY that hadn't dropped yet. -# -p_mesgout3: - mvi STCNT+0, 0x01 +/* + * When target asks for a byte, drop ATN if it's the last one in + * the message. Otherwise, keep going until the message is exhausted. + * + * Keep an eye out for a phase change, in case the target issues + * a MESSAGE REJECT. + */ +p_mesgout_loop: + test SSTAT1,PHASEMIS jnz p_mesgout_phasemis + test SSTAT0,SPIORDY jz p_mesgout_loop + cmp DINDEX,1 jne p_mesgout_outb /* last byte? */ + mvi CLRSINT1,CLRATNO /* drop ATN */ +p_mesgout_outb: + dec DINDEX + or CLRSINT0, CLRSPIORDY mov SCSIDATL,SINDIR - + p_mesgout4: - test SSTAT0,0x4 jz p_mesgout4 # SDONE - dec DINDEX - test DINDEX,0xff jnz p_mesgout2 + test DINDEX,0xff jnz p_mesgout_loop -# If the next bus phase after ATN drops is a message out, it means -# that the target is requesting that the last message(s) be resent. -# -p_mesgout5: - test SSTAT1,0x8 jnz p_mesgout6 # BUSFREE - test SSTAT1,0x1 jz p_mesgout5 # REQINIT +/* + * If the next bus phase after ATN drops is a message out, it means + * that the target is requesting that the last message(s) be resent. + */ +p_mesgout_snoop: + test SSTAT1,BUSFREE jnz p_mesgout_done + test SSTAT1,REQINIT jz p_mesgout_snoop - and A,0xe0,SCSISIGI # CDI|IOI|MSGI - cmp A,0xa0 jne p_mesgout6 - mvi 0x10 call scsisig # ATNO - re-assert ATN + test SSTAT1,PHASEMIS jnz p_mesgout_done + + or SCSISIGO,ATNO /* turn on ATNO */ jmp ITloop -p_mesgout6: - mvi CLRSINT1,0x40 # CLRATNO - in case of PHASEMIS - and FLAGS,0xdf # no active msg +p_mesgout_phasemis: + mvi CLRSINT1,CLRATNO /* Be sure to turn ATNO off */ +p_mesgout_done: + clr MSG_LEN /* no active msg */ jmp ITloop -# Message in phase. Bytes are read using Automatic PIO mode, but not -# using inb. This alleviates a race condition, namely that if ATN had -# to be asserted under Automatic PIO mode, it had to beat the SCSI -# circuitry sending an ACK to the target. This showed up under heavy -# loads and really confused things, since ABORT commands wouldn't be -# seen by the drive after an IDENTIFY message in until it had changed -# to a data I/O phase. -# +/* + * Message in phase. Bytes are read using Automatic PIO mode. + */ p_mesgin: - mvi 0xe0 call scsisig # CDO|IOO|MSGO - mvi A call inb_first # read the 1st message byte - mvi REJBYTE,A # save it for the driver - - cmp ALLZEROS,A jne p_mesgin1 - -# We got a "command complete" message, so put the SCB pointer -# into the Queue Out, and trigger a completion interrupt. -# Check status for non zero return and interrupt driver if needed -# This allows the driver to interpret errors only when they occur -# instead of always uploading the scb. If the status is SCSI_CHECK, -# the driver will download a new scb requesting sense to replace -# the old one, modify the "waiting for selection" SCB list and set -# RETURN_1 to 0x80. If RETURN_1 is set to 0x80 the sequencer imediately -# jumps to main loop where it will run down the waiting SCB list. -# If the kernel driver does not wish to request sense, it need -# only clear RETURN_1, and the command is allowed to complete. We don't -# bother to post to the QOUTFIFO in the error case since it would require -# extra work in the kernel driver to ensure that the entry was removed -# before the command complete code tried processing it. - -# First check for residuals - test SCBARRAY+15,0xff jnz resid - test SCBARRAY+16,0xff jnz resid - test SCBARRAY+17,0xff jnz resid + mvi A call inb_first /* read the 1st message byte */ + mov REJBYTE,A /* save it for the driver */ + + test A,MSG_IDENTIFY jnz mesgin_identify + cmp A,MSG_DISCONNECT je mesgin_disconnect + cmp A,MSG_SDPTRS je mesgin_sdptrs + cmp ALLZEROS,A je mesgin_complete + cmp A,MSG_RDPTRS je mesgin_rdptrs + cmp A,MSG_EXTENDED je mesgin_extended + cmp A,MSG_REJECT je mesgin_reject + +rej_mesgin: +/* + * We have no idea what this message in is, and there's no way + * to pass it up to the kernel, so we issue a message reject and + * hope for the best. Since we're now using manual PIO mode to + * read in the message, there should no longer be a race condition + * present when we assert ATN. In any case, rejection should be a + * rare occurrence - signal the driver when it happens. + */ + or SCSISIGO,ATNO /* turn on ATNO */ + mvi INTSTAT,SEND_REJECT /* let driver know */ + + mvi MSG_REJECT call mk_mesg + +mesgin_done: + call inb_last /*ack & turn auto PIO back on*/ + jmp ITloop + + +mesgin_complete: +/* + * We got a "command complete" message, so put the SCB_TAG into QUEUEOUT, + * and trigger a completion interrupt. Check status for non zero return + * and interrupt driver if needed. This allows the driver to interpret + * errors only when they occur instead of always uploading the scb. If + * the status is SCSI_CHECK, the driver will download a new scb requesting + * sense to replace the old one, modify the "waiting for selection" SCB list + * and set RETURN_1 to SEND_SENSE. If RETURN_1 is set to SEND_SENSE the + * sequencer imediately jumps to main loop where it will run down the waiting + * SCB list and process the sense request. If the kernel driver does not + * wish to request sense, it need only clear RETURN_1, and the command is + * allowed to complete. We don't bother to post to the QOUTFIFO in the + * error case since it would require extra work in the kernel driver to + * ensure that the entry was removed before the command complete code tried + * processing it. + * + * First check for residuals + */ + test SCB_RESID_SGCNT,0xff jz check_status +/* + * If we have a residual count, interrupt and tell the host. Other + * alternatives are to pause the sequencer on all command completes (yuck), + * dma the resid directly to the host (slick, we may have space to do it now) + * or have the sequencer pause itself when it encounters a non-zero resid + * (unecessary pause just to flag the command -yuck-, but takes one instruction + * and since it shouldn't happen that often is good enough for our purposes). + */ +resid: + mvi INTSTAT,RESIDUAL check_status: - test SCBARRAY+14,0xff jz status_ok # 0 Status? - mvi INTSTAT,BAD_STATUS # let driver know - test RETURN_1, 0x80 jz status_ok - jmp p_mesgin_done + test SCB_TARGET_STATUS,0xff jz status_ok /* Good Status? */ + mvi INTSTAT,BAD_STATUS /* let driver know */ + cmp RETURN_1, SEND_SENSE jne status_ok + jmp mesgin_done status_ok: -# First, mark this target as free. - test SCBARRAY+0,0x20 jnz complete # Tagged command - and FUNCTION1,0x70,SCBARRAY+1 +/* First, mark this target as free. */ + test SCB_CONTROL,TAG_ENB jnz test_immediate /* + * Tagged commands + * don't busy the + * target. + */ + mov FUNCTION1,SCB_TCL mov A,FUNCTION1 - test SCBARRAY+1,0x88 jz clear_a + test SCB_TCL,0x88 jz clear_a xor ACTIVE_B,A - jmp complete + jmp test_immediate clear_a: xor ACTIVE_A,A +test_immediate: + test SCB_CMDLEN,0xff jnz complete /* Immediate message complete */ +/* + * Pause the sequencer until the driver gets around to handling the command + * complete. This is so that any action that might require carefull timing + * with the completion of this command can occur. + */ + mvi INTSTAT,IMMEDDONE + jmp start complete: - mov QOUTFIFO,SCBPTR + mov QOUTFIFO,SCB_TAG mvi INTSTAT,CMDCMPLT - jmp p_mesgin_done + jmp mesgin_done -# If we have a residual count, interrupt and tell the host. Other -# alternatives are to pause the sequencer on all command completes (yuck), -# dma the resid directly to the host (slick, but a ton of instructions), or -# have the sequencer pause itself when it encounters a non-zero resid -# (unecessary pause just to flag the command -- yuck, but takes few instructions -# and since it shouldn't happen that often is good enough for our purposes). -resid: - mvi INTSTAT,RESIDUAL - jmp check_status - -# Is it an extended message? We only support the synchronous and wide data -# transfer request messages, which will probably be in response to -# WDTR or SDTR message outs from us. If it's not SDTR or WDTR, reject it - -# apparently this can be done after any message in byte, according -# to the SCSI-2 spec. -# -p_mesgin1: - cmp A,1 jne p_mesgin2 # extended message code? - - mvi ARG_1 call inb_next # extended message length - mvi A call inb_next # extended message code +/* + * Is it an extended message? We only support the synchronous and wide data + * transfer request messages, which will probably be in response to + * WDTR or SDTR message outs from us. If it's not SDTR or WDTR, reject it - + * apparently this can be done after any message in byte, according + * to the SCSI-2 spec. + */ +mesgin_extended: + mvi ARG_1 call inb_next /* extended message length */ + mvi REJBYTE_EXT call inb_next /* extended message code */ - cmp A,1 je p_mesginSDTR # Syncronous negotiation message - cmp A,3 je p_mesginWDTR # Wide negotiation message - jmp p_mesginN + cmp REJBYTE_EXT,MSG_SDTR je p_mesginSDTR + cmp REJBYTE_EXT,MSG_WDTR je p_mesginWDTR + jmp rej_mesgin p_mesginWDTR: - cmp ARG_1,2 jne p_mesginN # extended mesg length = 2 - mvi A call inb_next # Width of bus - mvi INTSTAT,MSG_WDTR # let driver know - test RETURN_1,0x80 jz p_mesgin_done# Do we need to send WDTR? - -# We didn't initiate the wide negotiation, so we must respond to the request - and RETURN_1,0x7f # Clear the SEND_WDTR Flag - or FLAGS,ACTIVE_MSG - mvi DINDEX,MSG_START+0 - mvi MSG_START+0 call mk_wdtr # build WDTR message - or SINDEX,0x10,SIGSTATE # turn on ATNO - call scsisig - jmp p_mesgin_done + cmp ARG_1,2 jne rej_mesgin /* extended mesg length=2 */ + mvi ARG_1 call inb_next /* Width of bus */ + mvi INTSTAT,WDTR_MSG /* let driver know */ + test RETURN_1,0xff jz mesgin_done /* Do we need to send WDTR? */ + cmp RETURN_1,SEND_REJ je rej_mesgin /* + * Bus width was too large + * Reject it. + */ + +/* We didn't initiate the wide negotiation, so we must respond to the request */ + and RETURN_1,0x7f /* Clear the SEND_WDTR Flag */ + mvi DINDEX,MSG0 + mvi MSG0 call mk_wdtr /* build WDTR message */ + or SCSISIGO,ATNO /* turn on ATNO */ + jmp mesgin_done p_mesginSDTR: - cmp ARG_1,3 jne p_mesginN # extended mesg length = 3 - mvi ARG_1 call inb_next # xfer period - mvi A call inb_next # REQ/ACK offset - mvi INTSTAT,MSG_SDTR # call driver to convert - - test RETURN_1,0xc0 jz p_mesgin_done# Do we need to mk_sdtr or rej? - test RETURN_1,0x40 jnz p_mesginN # Requested SDTR too small - rej - or FLAGS,ACTIVE_MSG - mvi DINDEX, MSG_START+0 - mvi MSG_START+0 call mk_sdtr - or SINDEX,0x10,SIGSTATE # turn on ATNO - call scsisig - jmp p_mesgin_done - -# Is it a disconnect message? Set a flag in the SCB to remind us -# and await the bus going free. -# -p_mesgin2: - cmp A,4 jne p_mesgin3 # disconnect code? - - or SCBARRAY+0,0x4 # set "disconnected" bit - jmp p_mesgin_done - -# Save data pointers message? Copy working values into the SCB, -# usually in preparation for a disconnect. -# -p_mesgin3: - cmp A,2 jne p_mesgin4 # save data pointers code? - + cmp ARG_1,3 jne rej_mesgin /* extended mesg length=3 */ + mvi ARG_1 call inb_next /* xfer period */ + mvi A call inb_next /* REQ/ACK offset */ + mvi INTSTAT,SDTR_MSG /* call driver to convert */ + + test RETURN_1,0xff jz mesgin_done /* Do we need to mk_sdtr/rej */ + cmp RETURN_1,SEND_REJ je rej_mesgin /* + * Requested SDTR too small + * Reject it. + */ + clr ARG_1 /* Use the scratch ram rate */ + mvi DINDEX, MSG0 + mvi MSG0 call mk_sdtr + or SCSISIGO,ATNO /* turn on ATNO */ + jmp mesgin_done + +/* + * Is it a disconnect message? Set a flag in the SCB to remind us + * and await the bus going free. + */ +mesgin_disconnect: + or SCB_CONTROL,DISCONNECTED + test FLAGS, PAGESCBS jz mesgin_done +/* + * Link this SCB into the DISCONNECTED list. This list holds the + * candidates for paging out an SCB if one is needed for a new command. + * Modifying the disconnected list is a critical(pause dissabled) section. + */ + mvi SCB_PREV, SCB_LIST_NULL + mvi SEQCTL,0x50 /* PAUSEDIS|FASTMODE */ + mov SCB_NEXT, DISCONNECTED_SCBH + mov DISCONNECTED_SCBH, SCBPTR + cmp SCB_NEXT,SCB_LIST_NULL je linkdone + mov SCBPTR,SCB_NEXT + mov SCB_PREV,DISCONNECTED_SCBH + mov SCBPTR,DISCONNECTED_SCBH +linkdone: + mvi SEQCTL,0x10 /* !PAUSEDIS|FASTMODE */ + jmp mesgin_done + +/* + * Save data pointers message? Copy working values into the SCB, + * usually in preparation for a disconnect. + */ +mesgin_sdptrs: call sg_ram2scb - jmp p_mesgin_done - -# Restore pointers message? Data pointers are recopied from the -# SCB anyway at the start of any DMA operation, so the only thing -# to copy is the scatter-gather values. -# -p_mesgin4: - cmp A,3 jne p_mesgin5 # restore pointers code? - - call sg_scb2ram - jmp p_mesgin_done - -# Identify message? For a reconnecting target, this tells us the lun -# that the reconnection is for - find the correct SCB and switch to it, -# clearing the "disconnected" bit so we don't "find" it by accident later. -# -p_mesgin5: - test A,0x80 jz p_mesgin6 # identify message? - - test A,0x78 jnz p_mesginN # !DiscPriv|!LUNTAR|!Reserved - - and A,0x07 # lun in lower three bits + jmp mesgin_done + +/* + * Restore pointers message? Data pointers are recopied from the + * SCB anytime we enter a data phase for the first time, so all + * we need to do is clear the DPHASE flag and let the data phase + * code do the rest. + */ +mesgin_rdptrs: + and FLAGS,0xef /* + * !DPHASE we'll reload them + * the next time through + */ + jmp mesgin_done + +/* + * Identify message? For a reconnecting target, this tells us the lun + * that the reconnection is for - find the correct SCB and switch to it, + * clearing the "disconnected" bit so we don't "find" it by accident later. + */ +mesgin_identify: + test A,0x78 jnz rej_mesgin /*!DiscPriv|!LUNTAR|!Reserved*/ + + and A,0x07 /* lun in lower three bits */ or SAVED_TCL,A,SELID and SAVED_TCL,0xf7 - and A,0x08,SBLKCTL # B Channel?? + and A,SELBUSB,SBLKCTL /* B Channel?? */ or SAVED_TCL,A - call inb_last # ACK - mov ALLZEROS call findSCB + call inb_last /* ACK */ + +/* + * Here we "snoop" the bus looking for a SIMPLE QUEUE TAG message. + * If we get one, we use the tag returned to switch to find the proper + * SCB. With SCB paging, this requires using findSCB for both tagged + * and non-tagged transactions since the SCB may exist in any slot. + * If we're not using SCB paging, we can use the tag as the direct + * index to the SCB. + */ + mvi ARG_1,SCB_LIST_NULL /* Default to no-tag */ +snoop_tag_loop: + test SSTAT1,BUSFREE jnz use_findSCB + test SSTAT1,REQINIT jz snoop_tag_loop + test SSTAT1,PHASEMIS jnz use_findSCB + mvi A call inb_first + cmp A,MSG_SIMPLE_TAG jne use_findSCB +get_tag: + mvi ARG_1 call inb_next /* tag value */ +/* + * See if the tag is in range. The tag is < SCBCOUNT if we add + * the complement of SCBCOUNT to the incomming tag and there is + * no carry. + */ + mov A,COMP_SCBCOUNT + add SINDEX,A,ARG_1 + jc abort_tag + +/* + * Ensure that the SCB the tag points to is for an SCB transaction + * to the reconnecting target. + */ + test FLAGS, PAGESCBS jz index_by_tag + call inb_last /* Ack Tag */ +use_findSCB: + mov ALLZEROS call findSCB /* Have to search */ setup_SCB: - and SCBARRAY+0,0xfb # clear disconnect bit in SCB - or FLAGS,IDENTIFY_SEEN # make note of IDENTIFY - - call sg_scb2ram # implied restore pointers - # required on reselect + and SCB_CONTROL,0xfb /* clear disconnect bit in SCB */ + or FLAGS,IDENTIFY_SEEN /* make note of IDENTIFY */ jmp ITloop -get_tag: - mvi A call inb_first - cmp A,0x20 jne return # Simple Tag message? - mvi A call inb_next - call inb_last - test A,0xf0 jnz abort_tag # Tag in range? - mov SCBPTR,A +index_by_tag: + mov SCBPTR,ARG_1 mov A,SAVED_TCL - cmp SCBARRAY+1,A jne abort_tag - test SCBARRAY+0,TAG_ENB jz abort_tag - ret -abort_tag: - or SINDEX,0x10,SIGSTATE # turn on ATNO - call scsisig - mvi INTSTAT,ABORT_TAG # let driver know - mvi 0xd call mk_mesg # ABORT TAG message - ret - -# Message reject? Let the kernel driver handle this. If we have an -# outstanding WDTR or SDTR negotiation, assume that it's a response from -# the target selecting 8bit or asynchronous transfer, otherwise just ignore -# it since we have no clue what it pertains to. -# -p_mesgin6: - cmp A,7 jne p_mesgin7 # message reject code? - - mvi INTSTAT, MSG_REJECT - jmp p_mesgin_done - -# [ ADD MORE MESSAGE HANDLING HERE ] -# -p_mesgin7: - -# We have no idea what this message in is, and there's no way -# to pass it up to the kernel, so we issue a message reject and -# hope for the best. Since we're now using manual PIO mode to -# read in the message, there should no longer be a race condition -# present when we assert ATN. In any case, rejection should be a -# rare occurrence - signal the driver when it happens. -# -p_mesginN: - or SINDEX,0x10,SIGSTATE # turn on ATNO - call scsisig - mvi INTSTAT,SEND_REJECT # let driver know - - mvi 0x7 call mk_mesg # MESSAGE REJECT message - -p_mesgin_done: - call inb_last # ack & turn auto PIO back on - jmp ITloop - + cmp SCB_TCL,A jne abort_tag + test SCB_CONTROL,TAG_ENB jz abort_tag + call inb_last /* Ack Successful tag */ + jmp setup_SCB -# Bus free phase. It might be useful to interrupt the device -# driver if we aren't expecting this. For now, make sure that -# ATN isn't being asserted and look for a new command. -# +abort_tag: + or SCSISIGO,ATNO /* turn on ATNO */ + mvi INTSTAT,ABORT_TAG /* let driver know */ + mvi MSG_ABORT_TAG call mk_mesg /* ABORT TAG message */ + jmp mesgin_done + +/* + * Message reject? Let the kernel driver handle this. If we have an + * outstanding WDTR or SDTR negotiation, assume that it's a response from + * the target selecting 8bit or asynchronous transfer, otherwise just ignore + * it since we have no clue what it pertains to. + */ +mesgin_reject: + mvi INTSTAT, REJECT_MSG + jmp mesgin_done + +/* + * [ ADD MORE MESSAGE HANDLING HERE ] + */ + +/* + * Bus free phase. It might be useful to interrupt the device + * driver if we aren't expecting this. For now, make sure that + * ATN isn't being asserted and look for a new command. + */ p_busfree: - mvi CLRSINT1,0x40 # CLRATNO - clr SIGSTATE + mvi CLRSINT1,CLRATNO + clr LASTPHASE + +/* + * if this is an immediate command, perform a psuedo command complete to + * notify the driver. + */ + test SCB_CMDLEN,0xff jz status_ok jmp start -# Instead of a generic bcopy routine that requires an argument, we unroll -# the two cases that are actually used, and call them explicitly. This -# not only reduces the overhead of doing a bcopy by 2/3rds, but ends up -# saving space in the program since you don't have to put the argument -# into the accumulator before the call. Both functions expect DINDEX to -# contain the destination address and SINDEX to contain the source -# address. -bcopy_3: - mov DINDIR,SINDIR - mov DINDIR,SINDIR - mov DINDIR,SINDIR ret - -bcopy_4: - mov DINDIR,SINDIR - mov DINDIR,SINDIR - mov DINDIR,SINDIR - mov DINDIR,SINDIR ret - -bcopy_3_dfdat: - mov DINDIR,DFDAT - mov DINDIR,DFDAT - mov DINDIR,DFDAT ret - -bcopy_4_dfdat: - mov DINDIR,DFDAT - mov DINDIR,DFDAT - mov DINDIR,DFDAT - mov DINDIR,DFDAT ret - -# Locking the driver out, build a one-byte message passed in SINDEX -# if there is no active message already. SINDEX is returned intact. -# +/* + * Locking the driver out, build a one-byte message passed in SINDEX + * if there is no active message already. SINDEX is returned intact. + */ mk_mesg: - mvi SEQCTL,0x50 # PAUSEDIS|FASTMODE - test FLAGS,ACTIVE_MSG jnz mk_mesg1 # active message? - - or FLAGS,ACTIVE_MSG # if not, there is now - mvi MSG_LEN,1 # length = 1 - mov MSG_START+0,SINDEX # 1-byte message + mvi SEQCTL,0x50 /* PAUSEDIS|FASTMODE */ + test MSG_LEN,0xff jz mk_mesg1 /* Should always succeed */ + + /* + * Hmmm. For some reason the mesg buffer is in use. + * Tell the driver. It should look at SINDEX to find + * out what we wanted to use the buffer for and resolve + * the conflict. + */ + mvi SEQCTL,0x10 /* !PAUSEDIS|FASTMODE */ + mvi INTSTAT,MSG_BUFFER_BUSY mk_mesg1: - mvi SEQCTL,0x10 ret # !PAUSEDIS|FASTMODE - -# Carefully read data in Automatic PIO mode. I first tried this using -# Manual PIO mode, but it gave me continual underrun errors, probably -# indicating that I did something wrong, but I feel more secure leaving -# Automatic PIO on all the time. -# -# According to Adaptec's documentation, an ACK is not sent on input from -# the target until SCSIDATL is read from. So we wait until SCSIDATL is -# latched (the usual way), then read the data byte directly off the bus -# using SCSIBUSL. When we have pulled the ATN line, or we just want to -# acknowledge the byte, then we do a dummy read from SCISDATL. The SCSI -# spec guarantees that the target will hold the data byte on the bus until -# we send our ACK. -# -# The assumption here is that these are called in a particular sequence, -# and that REQ is already set when inb_first is called. inb_{first,next} -# use the same calling convention as inb. -# -inb_first: - clr STCNT+2 - clr STCNT+1 - mov DINDEX,SINDEX - mov DINDIR,SCSIBUSL ret # read byte directly from bus + mvi MSG_LEN,1 /* length = 1 */ + mov MSG0,SINDEX /* 1-byte message */ + mvi SEQCTL,0x10 ret /* !PAUSEDIS|FASTMODE */ + +/* + * Functions to read data in Automatic PIO mode. + * + * According to Adaptec's documentation, an ACK is not sent on input from + * the target until SCSIDATL is read from. So we wait until SCSIDATL is + * latched (the usual way), then read the data byte directly off the bus + * using SCSIBUSL. When we have pulled the ATN line, or we just want to + * acknowledge the byte, then we do a dummy read from SCISDATL. The SCSI + * spec guarantees that the target will hold the data byte on the bus until + * we send our ACK. + * + * The assumption here is that these are called in a particular sequence, + * and that REQ is already set when inb_first is called. inb_{first,next} + * use the same calling convention as inb. + */ inb_next: - mov DINDEX,SINDEX # save SINDEX - - mvi STCNT+0,1 # xfer one byte - mov NONE,SCSIDATL # dummy read from latch to ACK -inb_next1: - test SSTAT0,0x4 jz inb_next1 # SDONE -inb_next2: - test SSTAT0,0x2 jz inb_next2 # SPIORDY - wait for next byte - mov DINDIR,SCSIBUSL ret # read byte directly from bus - + or CLRSINT0, CLRSPIORDY + mov NONE,SCSIDATL /*dummy read from latch to ACK*/ +inb_next_wait: + test SSTAT1,PHASEMIS jnz mesgin_phasemis + test SSTAT0,SPIORDY jz inb_next_wait /* wait for next byte */ +inb_first: + mov DINDEX,SINDEX + mov DINDIR,SCSIBUSL ret /*read byte directly from bus*/ inb_last: - mvi STCNT+0,1 # ACK with dummy read - mov NONE,SCSIDATL -inb_last1: - test SSTAT0,0x4 jz inb_last1 # wait for completion - ret + mov NONE,SCSIDATL ret /*dummy read from latch to ACK*/ -# DMA data transfer. HADDR and HCNT must be loaded first, and -# SINDEX should contain the value to load DFCNTRL with - 0x3d for -# host->scsi, or 0x39 for scsi->host. The SCSI channel is cleared -# during initialization. -# +mesgin_phasemis: +/* + * We expected to receive another byte, but the target changed phase + */ + mvi INTSTAT, MSGIN_PHASEMIS + jmp ITloop + +/* + * DMA data transfer. HADDR and HCNT must be loaded first, and + * SINDEX should contain the value to load DFCNTRL with - 0x3d for + * host->scsi, or 0x39 for scsi->host. The SCSI channel is cleared + * during initialization. + */ dma: mov DFCNTRL,SINDEX dma1: -dma2: - test SSTAT0,0x1 jnz dma3 # DMADONE - test SSTAT1,0x10 jz dma1 # PHASEMIS, ie. underrun - -# We will be "done" DMAing when the transfer count goes to zero, or -# the target changes the phase (in light of this, it makes sense that -# the DMA circuitry doesn't ACK when PHASEMIS is active). If we are -# doing a SCSI->Host transfer, the data FIFO should be flushed auto- -# magically on STCNT=0 or a phase change, so just wait for FIFO empty -# status. -# + test SSTAT0,DMADONE jnz dma3 + test SSTAT1,PHASEMIS jz dma1 /* ie. underrun */ + +/* + * We will be "done" DMAing when the transfer count goes to zero, or + * the target changes the phase (in light of this, it makes sense that + * the DMA circuitry doesn't ACK when PHASEMIS is active). If we are + * doing a SCSI->Host transfer, the data FIFO should be flushed auto- + * magically on STCNT=0 or a phase change, so just wait for FIFO empty + * status. + */ dma3: - test SINDEX,0x4 jnz dma5 # DIRECTION + test SINDEX,DIRECTION jnz dma5 dma4: - test DFSTATUS,0x1 jz dma4 # !FIFOEMP + test DFSTATUS,FIFOEMP jz dma4 -# Now shut the DMA enables off, and copy STCNT (ie. the underrun -# amount, if any) to the SCB registers; SG_COUNT will get copied to -# the SCB's residual S/G count field after sg_advance is called. Make -# sure that the DMA enables are actually off first lest we get an ILLSADDR. -# +/* + * Now shut the DMA enables off and make sure that the DMA enables are + * actually off first lest we get an ILLSADDR. + */ dma5: - clr DFCNTRL # disable DMA + /* disable DMA, but maintain WIDEODD */ + and DFCNTRL,WIDEODD dma6: - test DFCNTRL,0x38 jnz dma6 # SCSIENACK|SDMAENACK|HDMAENACK - - mvi DINDEX,SCBARRAY+15 - mvi STCNT call bcopy_3 - - ret - -dma_finish: - test DFSTATUS,0x8 jz dma_finish # HDONE + test DFCNTRL,0x38 jnz dma6 /* SCSIENACK|SDMAENACK|HDMAENACK */ - clr DFCNTRL # disable DMA -dma_finish2: - test DFCNTRL,0x8 jnz dma_finish2 # HDMAENACK ret -# Common SCSI initialization for selection and reselection. Expects -# the target SCSI ID to be in the upper four bits of SINDEX, and A's -# contents are stomped on return. -# +/* + * Common SCSI initialization for selection and reselection. Expects + * the target SCSI ID to be in the upper four bits of SINDEX, and A's + * contents are stomped on return. + */ initialize_scsiid: - and SINDEX,0xf0 # Get target ID + and SINDEX,0xf0 /* Get target ID */ and A,0x0f,SCSIID or SINDEX,A mov SCSIID,SINDEX ret -initialize_for_target: -# Turn on Automatic PIO mode now, before we expect to see a REQ -# from the target. It shouldn't hurt anything to leave it on. Set -# CLRCHN here before the target has entered a data transfer mode - -# with synchronous SCSI, if you do it later, you blow away some -# data in the SCSI FIFO that the target has already sent to you. -# - clr SIGSTATE - - mvi SXFRCTL0,0x8a # DFON|SPIOEN|CLRCHN - -# Initialize scatter-gather pointers by setting up the working copy -# in scratch RAM. -# - call sg_scb2ram - -# Initialize SCSIRATE with the appropriate value for this target. -# - call ndx_dtr - mov SCSIRATE,SINDIR ret - -# Assert that if we've been reselected, then we've seen an IDENTIFY -# message. -# +/* + * Assert that if we've been reselected, then we've seen an IDENTIFY + * message. + */ assert: - test FLAGS,RESELECTED jz return # reselected? - test FLAGS,IDENTIFY_SEEN jnz return # seen IDENTIFY? - - mvi INTSTAT,NO_IDENT ret # no - cause a kernel panic - -# Find out if disconnection is ok from the information the BIOS has left -# us. The tcl from SCBARRAY+1 should be in SINDEX; A will -# contain either 0x40 (disconnection ok) or 0x00 (disconnection not ok) -# on exit. -# -# To allow for wide or twin busses, we check the upper bit of the target ID -# and the channel ID and look at the appropriate disconnect register. -# -disconnect: - and FUNCTION1,0x70,SINDEX # strip off extra just in case - mov A,FUNCTION1 - test SINDEX, 0x88 jz disconnect_a - - test DISC_DSB_B,A jz disconnect1 # bit nonzero if DISabled - clr A ret - -disconnect_a: - test DISC_DSB_A,A jz disconnect1 # bit nonzero if DISabled - clr A ret - -disconnect1: - mvi A,0x40 ret - -# Locate the SCB matching the target ID/channel/lun in SAVED_TCL and switch -# the SCB to it. Have the kernel print a warning message if it can't be -# found, and generate an ABORT message to the target. SINDEX should be -# cleared on call. -# + test FLAGS,RESELECTED jz return /* reselected? */ + test FLAGS,IDENTIFY_SEEN jnz return /* seen IDENTIFY? */ + + mvi INTSTAT,NO_IDENT ret /* no - cause a kernel panic */ + +/* + * Locate the SCB matching the target ID/channel/lun in SAVED_TCL, and the tag + * value in ARG_1. If ARG_1 == SCB_LIST_NULL, we're looking for a non-tagged + * SCB. Have the kernel print a warning message if it can't be found, and + * generate an ABORT/ABORT_TAG message to the target. SINDEX should be + * cleared on call. + */ findSCB: mov A,SAVED_TCL - mov SCBPTR,SINDEX # switch to new SCB - cmp SCBARRAY+1,A jne findSCB1 # target ID/channel/lun match? - test SCBARRAY+0,0x4 jz findSCB1 # should be disconnected - test SCBARRAY+0,TAG_ENB jnz get_tag - ret + mov SCBPTR,SINDEX /* switch to next SCB */ + mvi SEQCTL,0x50 /* PAUSEDIS|FASTMODE */ + cmp SCB_TCL,A jne findSCB1 /* target ID/channel/lun match? */ + test SCB_CONTROL,DISCONNECTED jz findSCB1 /*should be disconnected*/ + test SCB_CONTROL,TAG_ENB jnz findTaggedSCB + cmp ARG_1,SCB_LIST_NULL je foundSCB + jmp findSCB1 +findTaggedSCB: + mov A, ARG_1 /* Tag passed in ARG_1 */ + cmp SCB_TAG,A jne findSCB1 /* Found it? */ +foundSCB: + test FLAGS,PAGESCBS jz foundSCB_ret +/* Remove this SCB from the disconnection list */ + cmp SCB_NEXT,SCB_LIST_NULL je unlink_prev + mov SAVED_LINKPTR, SCB_PREV + mov SCBPTR, SCB_NEXT + mov SCB_PREV, SAVED_LINKPTR + mov SCBPTR, SINDEX +unlink_prev: + cmp SCB_PREV,SCB_LIST_NULL je rHead/* At the head of the list */ + mov SAVED_LINKPTR, SCB_NEXT + mov SCBPTR, SCB_PREV + mov SCB_NEXT, SAVED_LINKPTR + mov SCBPTR, SINDEX + mvi SEQCTL,0x10 ret /* !PAUSEDIS|FASTMODE */ +rHead: + mov DISCONNECTED_SCBH,SCB_NEXT +foundSCB_ret: + mvi SEQCTL,0x10 ret /* !PAUSEDIS|FASTMODE */ findSCB1: + mvi SEQCTL,0x10 /* !PAUSEDIS|FASTMODE */ inc SINDEX mov A,SCBCOUNT cmp SINDEX,A jne findSCB - mvi INTSTAT,NO_MATCH # not found - signal kernel - mvi 0x6 call mk_mesg # ABORT message - - or SINDEX,0x10,SIGSTATE # assert ATNO - call scsisig - ret + mvi INTSTAT,NO_MATCH /* not found - signal kernel */ + cmp RETURN_1,SCB_PAGEDIN je return + or SCSISIGO,ATNO /* assert ATNO */ + cmp ARG_1,SCB_LIST_NULL jne find_abort_tag + mvi MSG_ABORT call mk_mesg + jmp ITloop +find_abort_tag: + mvi MSG_ABORT_TAG call mk_mesg + jmp ITloop -# Make a working copy of the scatter-gather parameters in the SCB. -# +/* + * Make a working copy of the scatter-gather parameters from the SCB. + */ sg_scb2ram: - mov SG_COUNT,SCBARRAY+2 - - mvi DINDEX,SG_NEXT - mvi SCBARRAY+3 call bcopy_4 - - mvi SG_NOLOAD,0x80 - test SCBARRAY+0,0x10 jnz return # don't reload s/g? - clr SG_NOLOAD ret - -# Copying RAM values back to SCB, for Save Data Pointers message. -# + mov HADDR0, SCB_DATAPTR0 + mov HADDR1, SCB_DATAPTR1 + mov HADDR2, SCB_DATAPTR2 + mov HADDR3, SCB_DATAPTR3 + mov HCNT0, SCB_DATACNT0 + mov HCNT1, SCB_DATACNT1 + mov HCNT2, SCB_DATACNT2 + + mov STCNT0, HCNT0 + mov STCNT1, HCNT1 + mov STCNT2, HCNT2 + + mov SG_COUNT,SCB_SGCOUNT + + mov SG_NEXT0, SCB_SGPTR0 + mov SG_NEXT1, SCB_SGPTR1 + mov SG_NEXT2, SCB_SGPTR2 + mov SG_NEXT3, SCB_SGPTR3 ret + +/* + * Copying RAM values back to SCB, for Save Data Pointers message, but + * only if we've actually been into a data phase to change them. This + * protects against bogus data in scratch ram and the residual counts + * since they are only initialized when we go into data_in or data_out. + */ sg_ram2scb: - mov SCBARRAY+2,SG_COUNT + test FLAGS, DPHASE jz return + mov SCB_SGCOUNT,SG_COUNT - mvi DINDEX,SCBARRAY+3 - mvi SG_NEXT call bcopy_4 - - and SCBARRAY+0,0xef,SCBARRAY+0 - test SG_NOLOAD,0x80 jz return # reload s/g? - or SCBARRAY+0,SG_LOAD ret - -# Load a struct scatter if needed and set up the data address and -# length. If the working value of the SG count is nonzero, then -# we need to load a new set of values. -# -# This, like the above DMA, assumes a little-endian host data storage. -# -sg_load: - test SG_COUNT,0xff jz return # SG being used? - test SG_NOLOAD,0x80 jnz return # don't reload s/g? - - clr HCNT+2 - clr HCNT+1 - mvi HCNT+0,SG_SIZEOF - - mvi DINDEX,HADDR - mvi SG_NEXT call bcopy_4 - - mvi DFCNTRL,0xd # HDMAEN|DIRECTION|FIFORESET - -# Wait for DMA from host memory to data FIFO to complete, then disable -# DMA and wait for it to acknowledge that it's off. -# - - call dma_finish - -# Copy data from FIFO into SCB data pointer and data count. This assumes -# that the struct scatterlist has this structure (this and sizeof(struct -# scatterlist) == 12 are asserted in aic7xxx.c): -# -# struct scatterlist { -# char *address; /* four bytes, little-endian order */ -# ... /* four bytes, ignored */ -# unsigned short length; /* two bytes, little-endian order */ -# } -# - -# Not in FreeBSD. the scatter list entry is only 8 bytes. -# -# struct ahc_dma_seg { -# physaddr addr; /* four bytes, little-endian order */ -# long len; /* four bytes, little endian order */ -# }; -# - - mvi DINDEX, SCBARRAY+19 - call bcopy_4_dfdat - -# For Linux, we must throw away four bytes since there is a 32bit gap -# in the middle of a struct scatterlist -# mov NONE,DFDAT -# mov NONE,DFDAT -# mov NONE,DFDAT -# mov NONE,DFDAT - - call bcopy_3_dfdat #Only support 24 bit length. - ret - -# Advance the scatter-gather pointers only IF NEEDED. If SG is enabled, -# and the SCSI transfer count is zero (note that this should be called -# right after a DMA finishes), then move the working copies of the SG -# pointer/length along. If the SCSI transfer count is not zero, then -# presumably the target is disconnecting - do not reload the SG values -# next time. -# -sg_advance: - test SG_COUNT,0xff jz return # s/g enabled? - - test STCNT+0,0xff jnz sg_advance1 # SCSI transfer count nonzero? - test STCNT+1,0xff jnz sg_advance1 - test STCNT+2,0xff jnz sg_advance1 - - clr SG_NOLOAD # reload s/g next time - dec SG_COUNT # one less segment to go - - clr A # add sizeof(struct scatter) - add SG_NEXT+0,SG_SIZEOF,SG_NEXT+0 - adc SG_NEXT+1,A,SG_NEXT+1 - adc SG_NEXT+2,A,SG_NEXT+2 - adc SG_NEXT+3,A,SG_NEXT+3 ret - -sg_advance1: - mvi SG_NOLOAD,0x80 ret # don't reload s/g next time - -# Add the array base SYNCNEG to the target offset (the target address -# is in SCSIID), and return the result in SINDEX. The accumulator -# contains the 3->8 decoding of the target ID on return. -# + mov SCB_SGPTR0,SG_NEXT0 + mov SCB_SGPTR1,SG_NEXT1 + mov SCB_SGPTR2,SG_NEXT2 + mov SCB_SGPTR3,SG_NEXT3 + + mov SCB_DATAPTR0,SHADDR0 + mov SCB_DATAPTR1,SHADDR1 + mov SCB_DATAPTR2,SHADDR2 + mov SCB_DATAPTR3,SHADDR3 + +/* + * Use the residual number since STCNT is corrupted by any message transfer + */ + mov SCB_DATACNT0,SCB_RESID_DCNT0 + mov SCB_DATACNT1,SCB_RESID_DCNT1 + mov SCB_DATACNT2,SCB_RESID_DCNT2 ret + +/* + * Add the array base TARG_SCRATCH to the target offset (the target address + * is in SCSIID), and return the result in SINDEX. The accumulator + * contains the 3->8 decoding of the target ID on return. + */ ndx_dtr: shr A,SCSIID,4 - test SBLKCTL,0x08 jz ndx_dtr_2 - or A,0x08 # Channel B entries add 8 + test SBLKCTL,SELBUSB jz ndx_dtr_2 + or A,0x08 /* Channel B entries add 8 */ ndx_dtr_2: - add SINDEX,SYNCNEG,A - - and FUNCTION1,0x70,SCSIID # 3-bit target address decode - mov A,FUNCTION1 ret - -# If we need to negotiate transfer parameters, build the WDTR or SDTR message -# starting at the address passed in SINDEX. DINDEX is modified on return. -# The SCSI-II spec requires that Wide negotiation occur first and you can -# only negotiat one or the other at a time otherwise in the event of a message -# reject, you wouldn't be able to tell which message was the culpret. -# + add SINDEX,TARG_SCRATCH,A ret + +/* + * If we need to negotiate transfer parameters, build the WDTR or SDTR message + * starting at the address passed in SINDEX. DINDEX is modified on return. + * The SCSI-II spec requires that Wide negotiation occur first and you can + * only negotiat one or the other at a time otherwise in the event of a message + * reject, you wouldn't be able to tell which message was the culpret. + */ mk_dtr: - test SCBARRAY+0,0xc0 jz return # NEEDWDTR|NEEDSDTR - test SCBARRAY+0,NEEDWDTR jnz mk_wdtr_16bit - or FLAGS, MAX_SYNC # Force an offset of 15 + test SCB_CONTROL,NEEDWDTR jnz mk_wdtr_16bit + mvi ARG_1, MAXOFFSET /* Force an offset of 15 or 8 if WIDE */ mk_sdtr: - mvi DINDIR,1 # extended message - mvi DINDIR,3 # extended message length = 3 - mvi DINDIR,1 # SDTR code + mvi DINDIR,1 /* extended message */ + mvi DINDIR,3 /* extended message length = 3 */ + mvi DINDIR,1 /* SDTR code */ call sdtr_to_rate - mov DINDIR,RETURN_1 # REQ/ACK transfer period - test FLAGS, MAX_SYNC jnz mk_sdtr_max_sync - and DINDIR,0xf,SINDIR # Sync Offset + mov DINDIR,RETURN_1 /* REQ/ACK transfer period */ + cmp ARG_1, MAXOFFSET je mk_sdtr_max_offset + and DINDIR,0x0f,SINDIR /* Sync Offset */ mk_sdtr_done: - add MSG_LEN,-MSG_START+0,DINDEX ret # update message length + add MSG_LEN,COMP_MSG0,DINDEX ret /* update message length */ + +mk_sdtr_max_offset: +/* + * We're initiating sync negotiation, so request the max offset we can (15 or 8) + */ + /* Talking to a WIDE device? */ + test SCSIRATE, WIDEXFER jnz wmax_offset + mvi DINDIR, MAX_OFFSET_8BIT + jmp mk_sdtr_done -mk_sdtr_max_sync: -# We're initiating sync negotiation, so request the max offset we can (15) - mvi DINDIR, 0x0f - xor FLAGS, MAX_SYNC +wmax_offset: + mvi DINDIR, MAX_OFFSET_16BIT jmp mk_sdtr_done mk_wdtr_16bit: mvi ARG_1,BUS_16_BIT mk_wdtr: - mvi DINDIR,1 # extended message - mvi DINDIR,2 # extended message length = 2 - mvi DINDIR,3 # WDTR code - mov DINDIR,ARG_1 # bus width + mvi DINDIR,1 /* extended message */ + mvi DINDIR,2 /* extended message length = 2 */ + mvi DINDIR,3 /* WDTR code */ + mov DINDIR,ARG_1 /* bus width */ - add MSG_LEN,-MSG_START+0,DINDEX ret # update message length + add MSG_LEN,COMP_MSG0,DINDEX ret /* update message length */ -# Set SCSI bus control signal state. This also saves the last-written -# value into a location where the higher-level driver can read it - if -# it has to send an ABORT or RESET message, then it needs to know this -# so it can assert ATN without upsetting SCSISIGO. The new value is -# expected in SINDEX. Change the actual state last to avoid contention -# from the driver. -# -scsisig: - mov SIGSTATE,SINDEX - mov SCSISIGO,SINDEX ret - sdtr_to_rate: - call ndx_dtr # index scratch space for target + call ndx_dtr /* index scratch space for target */ shr A,SINDIR,0x4 - dec SINDEX #Preserve SINDEX + dec SINDEX /* Preserve SINDEX */ and A,0x7 clr RETURN_1 sdtr_to_rate_loop: test A,0x0f jz sdtr_to_rate_done - add RETURN_1,0x18 + add RETURN_1,0x19 dec A jmp sdtr_to_rate_loop sdtr_to_rate_done: shr RETURN_1,0x2 - add RETURN_1,0x18 ret - + add RETURN_1,0x19 + test SXFRCTL0,ULTRAEN jz return + shr RETURN_1,0x1 return: ret diff --git a/sys/dev/microcode/aic7xxx/aic7xxx_asm.c b/sys/dev/microcode/aic7xxx/aic7xxx_asm.c index d03c1e9797b..698fa4e08b3 100644 --- a/sys/dev/microcode/aic7xxx/aic7xxx_asm.c +++ b/sys/dev/microcode/aic7xxx/aic7xxx_asm.c @@ -43,12 +43,13 @@ * are token separators. * *-M*************************************************************************/ -static char id[] = "$Id: aic7xxx_asm.c,v 1.1 1995/10/18 08:52:39 deraadt Exp $"; +static char id[] = "$Id: aic7xxx_asm.c,v 1.2 1996/05/05 12:42:38 deraadt Exp $"; #include <ctype.h> #include <stdio.h> #include <string.h> #include <stdlib.h> #include <unistd.h> +#include <fcntl.h> #define MEMORY 448 #define MAXLINE 1024 @@ -67,10 +68,9 @@ static char id[] = "$Id: aic7xxx_asm.c,v 1.1 1995/10/18 08:52:39 deraadt Exp $"; int debug; int lineno, LC; char *filename; -FILE *ifp, *ofp; unsigned char M[MEMORY][4]; -void +void error(char *s) { fprintf(stderr, "%s: %s at line %d\n", filename, s, lineno); @@ -107,7 +107,7 @@ typedef struct sym_t { struct sym_t *next; /* MUST BE FIRST */ char *name; int value; - int npatch; + int npatch; int *patch; } sym_t; @@ -151,7 +151,7 @@ lookup(char *name) return(NULL); } -void +void patch(sym_t *p, int location) { p->npatch += 1; @@ -223,7 +223,7 @@ getl(int *n) i = 0; - while (fgets(buf, sizeof(buf), ifp)) { + while (fgets(buf, sizeof(buf), stdin)) { lineno += 1; @@ -244,7 +244,7 @@ rescan: else error("too many tokens"); if (quote) { - quote++; + quote++; p = strchr(quote, '\"'); if (!p) error("unterminated string constant"); @@ -256,7 +256,7 @@ rescan: else error("too many tokens"); goto rescan; - } + } if (i) { *n = i; return(a); @@ -336,7 +336,7 @@ struct { { 0, 0, 0, 0, 0, 0, 0, 0 } }; -int +int eval_operand(char **a, int spec) { int i; @@ -536,7 +536,7 @@ crack(char **a, int n) #undef A void -assemble(void) +assemble(FILE *ofile) { int n; char **a; @@ -559,7 +559,7 @@ assemble(void) continue; if (n == 3 && !strcmp("VERSION", *a)) - fprintf(ofp, "#define %s \"%s\"\n", a[1], a[2]); + fprintf(ofile, "#define %s \"%s\"\n", a[1], a[2]); else { if (n == 3 && !strcmp("=", a[1])) define(*a, strtol(a[2], NULL, 0)); @@ -569,7 +569,7 @@ assemble(void) } backpatch(); - output(ofp); + output(ofile); if (debug) output(stderr); @@ -577,12 +577,15 @@ assemble(void) int main(int argc, char **argv) -{ int my_version_print_flag; +{ int c; + int pid; + int ifile; + FILE *ofile; + int fd[2]; - my_version_print_flag=0; - - while ((c = getopt(argc, argv, "dho:vD")) != EOF) { + ofile = NULL; + while ((c = getopt(argc, argv, "dho:vD:")) != EOF) { switch (c) { case 'd': debug = !0; @@ -599,23 +602,20 @@ main(int argc, char **argv) break; } case 'o': - ofp = fopen(optarg, "w"); - if (!ofp) { + + if ((ofile = fopen(optarg, "w")) == NULL) { perror(optarg); exit(EXIT_FAILURE); } break; case 'h': - printf("usage: %s [-d] [-Dname] [-ooutput] input\n", + printf("usage: %s [-d] [-Dname] [-ooutput] input\n", *argv); exit(EXIT_SUCCESS); break; case 'v': - if (!my_version_print_flag) - { printf("%s\n",id); - - my_version_print_flag=1; - } + printf("%s\n", id); + exit(EXIT_SUCCESS); break; default: exit(EXIT_FAILURE); @@ -624,28 +624,62 @@ main(int argc, char **argv) } if (argc - optind != 1) { - if (my_version_print_flag) - { exit(EXIT_SUCCESS); - } fprintf(stderr, "%s: must have one input file\n", *argv); exit(EXIT_FAILURE); } filename = argv[optind]; - ifp = fopen(filename, "r"); - if (!ifp) { + + if ((ifile = open(filename, O_RDONLY)) < 0) { perror(filename); exit(EXIT_FAILURE); } - if (!ofp) { - ofp = fopen(ADOTOUT, "w"); - if (!ofp) { + if (!ofile) { + if ((ofile = fopen(ADOTOUT, "w")) == NULL) { perror(ADOTOUT); exit(EXIT_FAILURE); } } - assemble(); - exit(EXIT_SUCCESS); + if (pipe(fd) < 0) { + perror("pipe failed"); + exit(1); + } + + if ((pid = fork()) < 0 ) { + perror("fork failed"); + exit(1); + } + else if (pid > 0) { /* Parent */ + close(fd[1]); /* Close write end */ + if (fd[0] != STDIN_FILENO) { + if (dup2(fd[0], STDIN_FILENO) != STDIN_FILENO) { + perror("dup2 error on stdin"); + exit(EXIT_FAILURE); + } + close(fd[0]); + } + assemble(ofile); + exit(EXIT_SUCCESS); + } + else { /* Child */ + close(fd[0]); /* Close Read end */ + if (fd[1] != STDOUT_FILENO) { + if (dup2(fd[1], STDOUT_FILENO) != STDOUT_FILENO) { + perror("dup2 error on stdout"); + exit(EXIT_FAILURE); + } + close(fd[1]); + } + if (ifile != STDIN_FILENO) { + if (dup2(ifile, STDIN_FILENO) != STDIN_FILENO) { + perror("dup2 error on stdin"); + exit(EXIT_FAILURE); + } + close(ifile); + } + execl("/usr/bin/cpp", "/usr/bin/cpp", "-P", "-", "-", NULL); + } + return(EXIT_SUCCESS); } diff --git a/sys/dev/microcode/aic7xxx/aic7xxx_reg.h b/sys/dev/microcode/aic7xxx/aic7xxx_reg.h new file mode 100644 index 00000000000..9fee01d8527 --- /dev/null +++ b/sys/dev/microcode/aic7xxx/aic7xxx_reg.h @@ -0,0 +1,773 @@ +/* + * Aic7xxx register and scratch ram definitions. + * + * Copyright (c) 1994, 1995, 1996 Justin T. Gibbs. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice immediately at the beginning of the file, without modification, + * this list of conditions, and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $Id: aic7xxx_reg.h,v 1.1 1996/05/05 12:42:39 deraadt Exp $ + */ + +/* + * This header is shared by the sequencer code and the kernel level driver. + * + * All page numbers refer to the Adaptec AIC-7770 Data Book availible from + * Adaptec's Technical Documents Department 1-800-934-2766 + */ + +/* + * SCSI Sequence Control (p. 3-11). + * Each bit, when set starts a specific SCSI sequence on the bus + */ +#define SCSISEQ 0x000 +#define TEMODEO 0x80 +#define ENSELO 0x40 +#define ENSELI 0x20 +#define ENRSELI 0x10 +#define ENAUTOATNO 0x08 +#define ENAUTOATNI 0x04 +#define ENAUTOATNP 0x02 +#define SCSIRSTO 0x01 + +/* + * SCSI Transfer Control 0 Register (pp. 3-13). + * Controls the SCSI module data path. + */ +#define SXFRCTL0 0x001 +#define DFON 0x80 +#define DFPEXP 0x40 +#define ULTRAEN 0x20 +#define CLRSTCNT 0x10 +#define SPIOEN 0x08 +#define SCAMEN 0x04 +#define CLRCHN 0x02 +/* UNUSED 0x01 */ + +/* + * SCSI Transfer Control 1 Register (pp. 3-14,15). + * Controls the SCSI module data path. + */ +#define SXFRCTL1 0x002 +#define BITBUCKET 0x80 +#define SWRAPEN 0x40 +#define ENSPCHK 0x20 +#define STIMESEL 0x18 +#define ENSTIMER 0x04 +#define ACTNEGEN 0x02 +#define STPWEN 0x01 /* Powered Termination */ + +/* + * SCSI Control Signal Read Register (p. 3-15). + * Reads the actual state of the SCSI bus pins + */ +#define SCSISIGI 0x003 +#define CDI 0x80 +#define IOI 0x40 +#define MSGI 0x20 +#define ATNI 0x10 +#define SELI 0x08 +#define BSYI 0x04 +#define REQI 0x02 +#define ACKI 0x01 + +/* + * Possible phases in SCSISIGI + */ +#define PHASE_MASK 0xe0 +#define P_DATAOUT 0x00 +#define P_DATAIN 0x40 +#define P_COMMAND 0x80 +#define P_MESGOUT 0xa0 +#define P_STATUS 0xc0 +#define P_MESGIN 0xe0 +/* + * SCSI Contol Signal Write Register (p. 3-16). + * Writing to this register modifies the control signals on the bus. Only + * those signals that are allowed in the current mode (Initiator/Target) are + * asserted. + */ +#define SCSISIGO 0x003 +#define CDO 0x80 +#define IOO 0x40 +#define MSGO 0x20 +#define ATNO 0x10 +#define SELO 0x08 +#define BSYO 0x04 +#define REQO 0x02 +#define ACKO 0x01 + +/* + * SCSI Rate Control (p. 3-17). + * Contents of this register determine the Synchronous SCSI data transfer + * rate and the maximum synchronous Req/Ack offset. An offset of 0 in the + * SOFS (3:0) bits disables synchronous data transfers. Any offset value + * greater than 0 enables synchronous transfers. + */ +#define SCSIRATE 0x004 +#define WIDEXFER 0x80 /* Wide transfer control */ +#define SXFR 0x70 /* Sync transfer rate */ +#define SOFS 0x0f /* Sync offset */ + +/* + * SCSI ID (p. 3-18). + * Contains the ID of the board and the current target on the + * selected channel. + */ +#define SCSIID 0x005 +#define TID 0xf0 /* Target ID mask */ +#define OID 0x0f /* Our ID mask */ + +/* + * SCSI Latched Data (p. 3-19). + * Read/Write latchs used to transfer data on the SCSI bus during + * Automatic or Manual PIO mode. SCSIDATH can be used for the + * upper byte of a 16bit wide asyncronouse data phase transfer. + */ +#define SCSIDATL 0x006 +#define SCSIDATH 0x007 + +/* + * SCSI Transfer Count (pp. 3-19,20) + * These registers count down the number of bytes transfered + * across the SCSI bus. The counter is decremented only once + * the data has been safely transfered. SDONE in SSTAT0 is + * set when STCNT goes to 0 + */ +#define STCNT 0x008 +#define STCNT0 0x008 +#define STCNT1 0x009 +#define STCNT2 0x00a + +/* + * Clear SCSI Interrupt 0 (p. 3-20) + * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT0. + */ +#define CLRSINT0 0x00b +#define CLRSELDO 0x40 +#define CLRSELDI 0x20 +#define CLRSELINGO 0x10 +#define CLRSWRAP 0x08 +/* UNUSED 0x04 */ +#define CLRSPIORDY 0x02 +/* UNUSED 0x01 */ + +/* + * SCSI Status 0 (p. 3-21) + * Contains one set of SCSI Interrupt codes + * These are most likely of interest to the sequencer + */ +#define SSTAT0 0x00b +#define TARGET 0x80 /* Board acting as target */ +#define SELDO 0x40 /* Selection Done */ +#define SELDI 0x20 /* Board has been selected */ +#define SELINGO 0x10 /* Selection In Progress */ +#define SWRAP 0x08 /* 24bit counter wrap */ +#define SDONE 0x04 /* STCNT = 0x000000 */ +#define SPIORDY 0x02 /* SCSI PIO Ready */ +#define DMADONE 0x01 /* DMA transfer completed */ + +/* + * Clear SCSI Interrupt 1 (p. 3-23) + * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1. + */ +#define CLRSINT1 0x00c +#define CLRSELTIMEO 0x80 +#define CLRATNO 0x40 +#define CLRSCSIRSTI 0x20 +/* UNUSED 0x10 */ +#define CLRBUSFREE 0x08 +#define CLRSCSIPERR 0x04 +#define CLRPHASECHG 0x02 +#define CLRREQINIT 0x01 + +/* + * SCSI Status 1 (p. 3-24) + */ +#define SSTAT1 0x00c +#define SELTO 0x80 +#define ATNTARG 0x40 +#define SCSIRSTI 0x20 +#define PHASEMIS 0x10 +#define BUSFREE 0x08 +#define SCSIPERR 0x04 +#define PHASECHG 0x02 +#define REQINIT 0x01 + +/* + * SCSI Interrupt Mode 1 (pp. 3-28,29) + * Setting any bit will enable the corresponding function + * in SIMODE1 to interrupt via the IRQ pin. + */ +#define SIMODE1 0x011 +#define ENSELTIMO 0x80 +#define ENATNTARG 0x40 +#define ENSCSIRST 0x20 +#define ENPHASEMIS 0x10 +#define ENBUSFREE 0x08 +#define ENSCSIPERR 0x04 +#define ENPHASECHG 0x02 +#define ENREQINIT 0x01 + +/* + * SCSI Data Bus (High) (p. 3-29) + * This register reads data on the SCSI Data bus directly. + */ +#define SCSIBUSL 0x012 +#define SCSIBUSH 0x013 + +/* + * SCSI/Host Address (p. 3-30) + * These registers hold the host address for the byte about to be + * transfered on the SCSI bus. They are counted up in the same + * manner as STCNT is counted down. SHADDR should always be used + * to determine the address of the last byte transfered since HADDR + * can be squewed by write ahead. + */ +#define SHADDR 0x014 +#define SHADDR0 0x014 +#define SHADDR1 0x015 +#define SHADDR2 0x016 +#define SHADDR3 0x017 + +/* + * Selection/Reselection ID (p. 3-31) + * Upper four bits are the device id. The ONEBIT is set when the re/selecting + * device did not set its own ID. + */ +#define SELID 0x019 +#define SELID_MASK 0xf0 +#define ONEBIT 0x08 +/* UNUSED 0x07 */ + +/* + * SCSI Block Control (p. 3-32) + * Controls Bus type and channel selection. In a twin channel configuration + * addresses 0x00-0x1e are gated to the appropriate channel based on this + * register. SELWIDE allows for the coexistence of 8bit and 16bit devices + * on a wide bus. + */ +#define SBLKCTL 0x01f +#define DIAGLEDEN 0x80 /* Aic78X0 only */ +#define DIAGLEDON 0x40 /* Aic78X0 only */ +#define AUTOFLUSHDIS 0x20 +/* UNUSED 0x10 */ +#define SELBUS_MASK 0x0a +#define SELBUSB 0x08 +/* UNUSED 0x04 */ +#define SELWIDE 0x02 +/* UNUSED 0x01 */ +#define SELNARROW 0x00 + +/* + * Sequencer Control (p. 3-33) + * Error detection mode and speed configuration + */ +#define SEQCTL 0x060 +#define PERRORDIS 0x80 +#define PAUSEDIS 0x40 +#define FAILDIS 0x20 +#define FASTMODE 0x10 +#define BRKADRINTEN 0x08 +#define STEP 0x04 +#define SEQRESET 0x02 +#define LOADRAM 0x01 + +/* + * Sequencer RAM Data (p. 3-34) + * Single byte window into the Scratch Ram area starting at the address + * specified by SEQADDR0 and SEQADDR1. To write a full word, simply write + * four bytes in sucessesion. The SEQADDRs will increment after the most + * significant byte is written + */ +#define SEQRAM 0x061 + +/* + * Sequencer Address Registers (p. 3-35) + * Only the first bit of SEQADDR1 holds addressing information + */ +#define SEQADDR0 0x062 +#define SEQADDR1 0x063 +#define SEQADDR1_MASK 0x01 + +/* + * Accumulator + * We cheat by passing arguments in the Accumulator up to the kernel driver + */ +#define ACCUM 0x064 + +#define SINDEX 0x065 +#define DINDEX 0x066 +#define ALLZEROS 0x06a +#define NONE 0x06a +#define SINDIR 0x06c +#define DINDIR 0x06d +#define FUNCTION1 0x06e + +/* + * Host Address (p. 3-48) + * This register contains the address of the byte about + * to be transfered across the host bus. + */ +#define HADDR 0x088 +#define HADDR0 0x088 +#define HADDR1 0x089 +#define HADDR2 0x08a +#define HADDR3 0x08b + +#define HCNT 0x08c +#define HCNT0 0x08c +#define HCNT1 0x08d +#define HCNT2 0x08e +/* + * SCB Pointer (p. 3-49) + * Gate one of the four SCBs into the SCBARRAY window. + */ +#define SCBPTR 0x090 + +/* + * Board Control (p. 3-43) + */ +#define BCTL 0x084 +/* RSVD 0xf0 */ +#define ACE 0x08 /* Support for external processors */ +/* RSVD 0x06 */ +#define ENABLE 0x01 + +/* + * On the aic78X0 chips, Board Control is replaced by the DSCommand + * register (p. 4-64) + */ +#define DSCOMMAND 0x084 +#define CACHETHEN 0x80 /* Cache Threshold enable */ +#define DPARCKEN 0x40 /* Data Parity Check Enable */ +#define MPARCKEN 0x20 /* Memory Parity Check Enable */ +#define EXTREQLCK 0x10 /* External Request Lock */ + +/* + * Bus On/Off Time (p. 3-44) + */ +#define BUSTIME 0x085 +#define BOFF 0xf0 +#define BON 0x0f +#define BOFF_60BCLKS 0xf0 + +/* + * Bus Speed (p. 3-45) + */ +#define BUSSPD 0x086 +#define DFTHRSH 0xc0 +#define STBOFF 0x38 +#define STBON 0x07 +#define DFTHRSH_100 0xc0 + +/* + * Host Control (p. 3-47) R/W + * Overal host control of the device. + */ +#define HCNTRL 0x087 +/* UNUSED 0x80 */ +#define POWRDN 0x40 +/* UNUSED 0x20 */ +#define SWINT 0x10 +#define IRQMS 0x08 +#define PAUSE 0x04 +#define INTEN 0x02 +#define CHIPRST 0x01 + +/* + * Interrupt Status (p. 3-50) + * Status for system interrupts + */ +#define INTSTAT 0x091 +#define SEQINT_MASK 0xf1 /* SEQINT Status Codes */ +#define BAD_PHASE 0x01 /* unknown scsi bus phase */ +#define SEND_REJECT 0x11 /* sending a message reject */ +#define NO_IDENT 0x21 /* no IDENTIFY after reconnect*/ +#define NO_MATCH 0x31 /* no cmd match for reconnect */ +#define SDTR_MSG 0x41 /* SDTR message received */ +#define WDTR_MSG 0x51 /* WDTR message received */ +#define REJECT_MSG 0x61 /* Reject message received */ +#define BAD_STATUS 0x71 /* Bad status from target */ +#define RESIDUAL 0x81 /* Residual byte count != 0 */ +#define ABORT_TAG 0x91 /* Sent an ABORT_TAG message */ +#define AWAITING_MSG 0xa1 /* + * Kernel requested to specify + * a message to this target + * (command was null), so tell + * it that it can fill the + * message buffer. + */ +#define IMMEDDONE 0xb1 /* + * An immediate command has + * completed + */ +#define MSG_BUFFER_BUSY 0xc1 /* + * Sequencer wants to use the + * message buffer, but it + * already contains a message + */ +#define MSGIN_PHASEMIS 0xd1 /* + * Target changed phase on us + * when we were expecting + * another msgin byte. + */ +#define BRKADRINT 0x08 +#define SCSIINT 0x04 +#define CMDCMPLT 0x02 +#define SEQINT 0x01 +#define INT_PEND (BRKADRINT | SEQINT | SCSIINT | CMDCMPLT) + +/* + * Hard Error (p. 3-53) + * Reporting of catastrophic errors. You usually cannot recover from + * these without a full board reset. + */ +#define ERROR 0x092 +/* UNUSED 0xf0 */ +#define PARERR 0x08 +#define ILLOPCODE 0x04 +#define ILLSADDR 0x02 +#define ILLHADDR 0x01 + +/* + * Clear Interrupt Status (p. 3-52) + */ +#define CLRINT 0x092 +#define CLRBRKADRINT 0x08 +#define CLRSCSIINT 0x04 +#define CLRCMDINT 0x02 +#define CLRSEQINT 0x01 + +#define DFCNTRL 0x093 +#define WIDEODD 0x40 +#define SCSIEN 0x20 +#define SDMAEN 0x10 +#define SDMAENACK 0x10 +#define HDMAEN 0x08 +#define HDMAENACK 0x08 +#define DIRECTION 0x04 +#define FIFOFLUSH 0x02 +#define FIFORESET 0x01 + +#define DFSTATUS 0x094 +#define HDONE 0x08 +#define FIFOEMP 0x01 + +#define DFDAT 0x099 + +/* + * SCB Auto Increment (p. 3-59) + * Byte offset into the SCB Array and an optional bit to allow auto + * incrementing of the address during download and upload operations + */ +#define SCBCNT 0x09a +#define SCBAUTO 0x80 +#define SCBCNT_MASK 0x1f + +/* + * Queue In FIFO (p. 3-60) + * Input queue for queued SCBs (commands that the seqencer has yet to start) + */ +#define QINFIFO 0x09b + +/* + * Queue In Count (p. 3-60) + * Number of queued SCBs + */ +#define QINCNT 0x09c + +/* + * Queue Out FIFO (p. 3-61) + * Queue of SCBs that have completed and await the host + */ +#define QOUTFIFO 0x09d + +/* + * Queue Out Count (p. 3-61) + * Number of queued SCBs in the Out FIFO + */ +#define QOUTCNT 0x09e + +/* + * SCB Definition (p. 5-4) + * The two reserved bytes at SCBARRAY+1[23] are expected to be set to + * zero. Bit 3 in SCBARRAY+0 is used as an internal flag to indicate + * whether or not to DMA an SCB from host ram. This flag prevents the + * "re-fetching" of transactions that are requed because the target is + * busy with another command. We also use bits 6 & 7 to indicate whether + * or not to initiate SDTR or WDTR repectively when starting this command. + */ +#define SCBARRAY 0x0a0 +#define SCB_CONTROL 0x0a0 +#define NEEDWDTR 0x80 +#define DISCENB 0x40 +#define TAG_ENB 0x20 +#define NEEDSDTR 0x10 +#define DISCONNECTED 0x04 +#define SCB_TAG_TYPE 0x03 +#define SCB_TCL 0x0a1 +#define SCB_TARGET_STATUS 0x0a2 +#define SCB_SGCOUNT 0x0a3 +#define SCB_SGPTR 0x0a4 +#define SCB_SGPTR0 0x0a4 +#define SCB_SGPTR1 0x0a5 +#define SCB_SGPTR2 0x0a6 +#define SCB_SGPTR3 0x0a7 +#define SCB_RESID_SGCNT 0x0a8 +#define SCB_RESID_DCNT 0x0a9 +#define SCB_RESID_DCNT0 0x0a9 +#define SCB_RESID_DCNT1 0x0aa +#define SCB_RESID_DCNT2 0x0ab +#define SCB_DATAPTR 0x0ac +#define SCB_DATAPTR0 0x0ac +#define SCB_DATAPTR1 0x0ad +#define SCB_DATAPTR2 0x0ae +#define SCB_DATAPTR3 0x0af +#define SCB_DATACNT 0x0b0 +#define SCB_DATACNT0 0x0b0 +#define SCB_DATACNT1 0x0b1 +#define SCB_DATACNT2 0x0b2 +/* UNUSED - QUAD PADDING 0x0b3 */ +#define SCB_CMDPTR 0x0b4 +#define SCB_CMDPTR0 0x0b4 +#define SCB_CMDPTR1 0x0b5 +#define SCB_CMDPTR2 0x0b6 +#define SCB_CMDPTR3 0x0b7 +#define SCB_CMDLEN 0x0b8 +#define SCB_TAG 0x0b9 +#define SCB_NEXT 0x0ba +#define SCB_PREV 0x0bb + +#ifdef linux +#define SG_SIZEOF 0x0c /* sizeof(struct scatterlist) */ +#else +#define SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */ +#endif + +/* --------------------- AHA-2840-only definitions -------------------- */ + +#define SEECTL_2840 0x0c0 +/* UNUSED 0xf8 */ +#define CS_2840 0x04 +#define CK_2840 0x02 +#define DO_2840 0x01 + +#define STATUS_2840 0x0c1 +#define EEPROM_TF 0x80 +#define BIOS_SEL 0x60 +#define ADSEL 0x1e +#define DI_2840 0x01 + +/* --------------------- AIC-7870-only definitions -------------------- */ + +#define DSPCISTATUS 0x086 + +/* + * Serial EEPROM Control (p. 4-92 in 7870 Databook) + * Controls the reading and writing of an external serial 1-bit + * EEPROM Device. In order to access the serial EEPROM, you must + * first set the SEEMS bit that generates a request to the memory + * port for access to the serial EEPROM device. When the memory + * port is not busy servicing another request, it reconfigures + * to allow access to the serial EEPROM. When this happens, SEERDY + * gets set high to verify that the memory port access has been + * granted. + * + * After successful arbitration for the memory port, the SEECS bit of + * the SEECTL register is connected to the chip select. The SEECK, + * SEEDO, and SEEDI are connected to the clock, data out, and data in + * lines respectively. The SEERDY bit of SEECTL is useful in that it + * gives us an 800 nsec timer. After a write to the SEECTL register, + * the SEERDY goes high 800 nsec later. The one exception to this is + * when we first request access to the memory port. The SEERDY goes + * high to signify that access has been granted and, for this case, has + * no implied timing. + * + * See 93cx6.c for detailed information on the protocol necessary to + * read the serial EEPROM. + */ +#define SEECTL 0x01e +#define EXTARBACK 0x80 +#define EXTARBREQ 0x40 +#define SEEMS 0x20 +#define SEERDY 0x10 +#define SEECS 0x08 +#define SEECK 0x04 +#define SEEDO 0x02 +#define SEEDI 0x01 + +/* ---------------------- Scratch RAM Offsets ------------------------- */ +/* These offsets are either to values that are initialized by the board's + * BIOS or are specified by the sequencer code. + * + * The host adapter card (at least the BIOS) uses 20-2f for SCSI + * device information, 32-33 and 5a-5f as well. As it turns out, the + * BIOS trashes 20-2f, writing the synchronous negotiation results + * on top of the BIOS values, so we re-use those for our per-target + * scratchspace (actually a value that can be copied directly into + * SCSIRATE). The kernel driver will enable synchronous negotiation + * for all targets that have a value other than 0 in the lower four + * bits of the target scratch space. This should work regardless of + * whether the bios has been installed. + */ + +/* + * 1 byte per target starting at this address for configuration values + */ +#define TARG_SCRATCH 0x020 + +/* + * The sequencer will stick the frist byte of any rejected message here so + * we can see what is getting thrown away. Extended messages put the + * extended message type in REJBYTE_EXT. + */ +#define REJBYTE 0x030 +#define REJBYTE_EXT 0x031 + +/* + * Bit vector of targets that have disconnection disabled. + */ +#define DISC_DSB 0x032 +#define DISC_DSB_A 0x032 +#define DISC_DSB_B 0x033 + +/* + * Length of pending message + */ +#define MSG_LEN 0x034 + +/* We reserve 8bytes to store outgoing messages */ +#define MSG0 0x035 +#define COMP_MSG0 0xcb /* 2's complement of MSG0 */ +#define MSG1 0x036 +#define MSG2 0x037 +#define MSG3 0x038 +#define MSG4 0x039 +#define MSG5 0x03a +#define MSG6 0x03b +#define MSG7 0x03c + +/* + * These are offsets into the card's scratch ram. Some of the values are + * specified in the AHA2742 technical reference manual and are initialized + * by the BIOS at boot time. + */ +#define LASTPHASE 0x03d +#define ARG_1 0x03e +#define MAXOFFSET 0x01 +#define RETURN_1 0x03f +#define SEND_WDTR 0x80 +#define SEND_SDTR 0x60 +#define SEND_SENSE 0x40 +#define SEND_REJ 0x20 +#define SCB_PAGEDIN 0x10 + +#define SIGSTATE 0x040 + +#define DMAPARAMS 0x041 /* Parameters for DMA Logic */ + +#define SG_COUNT 0x042 +#define SG_NEXT 0x043 /* working value of SG pointer */ +#define SG_NEXT0 0x043 +#define SG_NEXT1 0x044 +#define SG_NEXT2 0x045 +#define SG_NEXT3 0x046 + +#define SCBCOUNT 0x047 /* + * Number of SCBs supported by + * this card. + */ +#define COMP_SCBCOUNT 0x048 /* + * Two's compliment of SCBCOUNT + */ +#define QCNTMASK 0x049 /* + * Mask of bits to test against + * when looking at the Queue Count + * registers. Works around a bug + * on aic7850 chips. + */ +#define FLAGS 0x04a +#define SINGLE_BUS 0x00 +#define TWIN_BUS 0x01 +#define WIDE_BUS 0x02 +#define PAGESCBS 0x04 +#define DPHASE 0x10 +#define SELECTED 0x20 +#define IDENTIFY_SEEN 0x40 +#define RESELECTED 0x80 + +#define SAVED_TCL 0x04b /* + * Temporary storage for the + * target/channel/lun of a + * reconnecting target + */ +#define ACTIVE_A 0x04c +#define ACTIVE_B 0x04d +#define WAITING_SCBH 0x04e /* + * head of list of SCBs awaiting + * selection + */ +#define DISCONNECTED_SCBH 0x04f /* + * head of list of SCBs that are + * disconnected. Used for SCB + * paging. + */ +#define SCB_LIST_NULL 0xff + +#define SAVED_LINKPTR 0x050 +#define SAVED_SCBPTR 0x051 + +#define SCSICONF 0x05a +#define HOSTCONF 0x05d + +#define HA_274_BIOSCTRL 0x05f +#define BIOSMODE 0x30 +#define BIOSDISABLED 0x30 + +/* Message codes */ +#define MSG_EXTENDED 0x01 +#define MSG_SDTR 0x01 +#define MSG_WDTR 0x03 +#define MSG_SDPTRS 0x02 +#define MSG_RDPTRS 0x03 +#define MSG_DISCONNECT 0x04 +#define MSG_INITIATOR_DET_ERROR 0x05 +#define MSG_ABORT 0x06 +#define MSG_REJECT 0x07 +#define MSG_NOP 0x08 +#define MSG_MSG_PARITY_ERROR 0x09 +#define MSG_BUS_DEVICE_RESET 0x0c +#define MSG_ABORT_TAG 0x0d +#define MSG_SIMPLE_TAG 0x20 +#define MSG_IDENTIFY 0x80 + +/* WDTR Message values */ +#define BUS_8_BIT 0x00 +#define BUS_16_BIT 0x01 +#define BUS_32_BIT 0x02 + +#define MAX_OFFSET_8BIT 0x0f +#define MAX_OFFSET_16BIT 0x08 |