diff options
Diffstat (limited to 'sys/dev/mii/rgephy.c')
| -rw-r--r-- | sys/dev/mii/rgephy.c | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/sys/dev/mii/rgephy.c b/sys/dev/mii/rgephy.c index cd612d65143..a829e35b23d 100644 --- a/sys/dev/mii/rgephy.c +++ b/sys/dev/mii/rgephy.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rgephy.c,v 1.11 2005/07/22 11:48:10 brad Exp $ */ +/* $OpenBSD: rgephy.c,v 1.12 2006/06/27 05:36:58 brad Exp $ */ /* * Copyright (c) 2003 * Bill Paul <wpaul@windriver.com>. All rights reserved. @@ -131,8 +131,6 @@ rgephyattach(struct device *parent, struct device *self, void *aux) sc->mii_flags |= MIIF_NOISOLATE; - PHY_RESET(sc); - sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; if (sc->mii_capabilities & BMSR_EXTSTAT) @@ -140,6 +138,8 @@ rgephyattach(struct device *parent, struct device *self, void *aux) if ((sc->mii_capabilities & BMSR_MEDIAMASK) || (sc->mii_extcapabilities & EXTSR_MEDIAMASK)) mii_phy_add_media(sc); + + PHY_RESET(sc); } int @@ -327,12 +327,12 @@ rgephy_status(struct mii_softc *sc) } bmsr = PHY_READ(sc, RL_GMEDIASTAT); - if (bmsr & RL_GMEDIASTAT_10MBPS) - mii->mii_media_active |= IFM_10_T; - if (bmsr & RL_GMEDIASTAT_100MBPS) - mii->mii_media_active |= IFM_100_TX; if (bmsr & RL_GMEDIASTAT_1000MBPS) mii->mii_media_active |= IFM_1000_T; + else if (bmsr & RL_GMEDIASTAT_100MBPS) + mii->mii_media_active |= IFM_100_TX; + else if (bmsr & RL_GMEDIASTAT_10MBPS) + mii->mii_media_active |= IFM_10_T; if (bmsr & RL_GMEDIASTAT_FDX) mii->mii_media_active |= IFM_FDX; } @@ -347,7 +347,8 @@ rgephy_mii_phy_auto(struct mii_softc *sc) PHY_WRITE(sc, RGEPHY_MII_ANAR, BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA); DELAY(1000); - PHY_WRITE(sc, RGEPHY_MII_1000CTL, RGEPHY_1000CTL_AFD); + PHY_WRITE(sc, RGEPHY_MII_1000CTL, + RGEPHY_1000CTL_AHD | RGEPHY_1000CTL_AFD); DELAY(1000); PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_AUTOEN | RGEPHY_BMCR_STARTNEG); @@ -367,12 +368,8 @@ rgephy_loop(struct mii_softc *sc) for (i = 0; i < 15000; i++) { bmsr = PHY_READ(sc, RGEPHY_MII_BMSR); - if (!(bmsr & RGEPHY_BMSR_LINK)) { -#if 0 - device_printf(sc->mii_dev, "looped %d\n", i); -#endif + if (!(bmsr & RGEPHY_BMSR_LINK)) break; - } DELAY(10); } } @@ -385,13 +382,19 @@ rgephy_loop(struct mii_softc *sc) /* * Initialize RealTek PHY per the datasheet. The DSP in the PHYs of * existing revisions of the 8169S/8110S chips need to be tuned in - * order to reliably negotiate a 1000Mbps link. Later revs of the - * chips may not require this software tuning. + * order to reliably negotiate a 1000Mbps link. This is only needed + * for rev 0 and rev 1 of the PHY. Later versions work without + * any fixups. */ void rgephy_load_dspcode(struct mii_softc *sc) { int val; + u_int16_t id2; + + id2 = PHY_READ(sc, MII_PHYIDR2); + if (MII_REV(id2) > 1) + return; PHY_WRITE(sc, 31, 0x0001); PHY_WRITE(sc, 21, 0x1000); |