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-rw-r--r--sys/dev/pci/bktr/bktr_audio.c4
-rw-r--r--sys/dev/pci/bktr/bktr_core.c4
-rw-r--r--sys/dev/pci/bktr/bktr_tuner.c12
-rw-r--r--sys/dev/pci/if_bge.c6
-rw-r--r--sys/dev/pci/if_em_hw.h2
-rw-r--r--sys/dev/pci/if_lmc_media.c8
-rw-r--r--sys/dev/pci/if_skreg.h4
-rw-r--r--sys/dev/pci/ncr.c14
-rw-r--r--sys/dev/pci/noctreg.h4
-rw-r--r--sys/dev/pci/pucdata.c6
-rw-r--r--sys/dev/pci/sv.c4
11 files changed, 34 insertions, 34 deletions
diff --git a/sys/dev/pci/bktr/bktr_audio.c b/sys/dev/pci/bktr/bktr_audio.c
index ecb4912e49e..02a8fc61439 100644
--- a/sys/dev/pci/bktr/bktr_audio.c
+++ b/sys/dev/pci/bktr/bktr_audio.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: bktr_audio.c,v 1.2 2003/01/04 22:36:12 deraadt Exp $ */
+/* $OpenBSD: bktr_audio.c,v 1.3 2003/02/11 19:20:28 mickey Exp $ */
/* $FreeBSD: src/sys/dev/bktr/bktr_audio.c,v 1.8 2000/10/31 13:09:56 roger Exp $ */
/*
* This is part of the Driver for Video Capture Cards (Frame grabbers)
@@ -596,7 +596,7 @@ void msp_autodetect( bktr_ptr_t bktr ) {
}
- /* uncomment the following line to enable the MSP34xx 1Khz Tone Generator */
+ /* uncomment the following line to enable the MSP34xx 1KHz Tone Generator */
/* turn your speaker volume down low before trying this */
/* msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0014, 0x7f40); */
}
diff --git a/sys/dev/pci/bktr/bktr_core.c b/sys/dev/pci/bktr/bktr_core.c
index 1c6607ea9d3..c4ceede3427 100644
--- a/sys/dev/pci/bktr/bktr_core.c
+++ b/sys/dev/pci/bktr/bktr_core.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: bktr_core.c,v 1.9 2003/01/21 19:55:13 mickey Exp $ */
+/* $OpenBSD: bktr_core.c,v 1.10 2003/02/11 19:20:28 mickey Exp $ */
/* $FreeBSD: src/sys/dev/bktr/bktr_core.c,v 1.114 2000/10/31 13:09:56 roger Exp $ */
/*
@@ -1005,7 +1005,7 @@ video_open( bktr_ptr_t bktr )
OUTB(bktr, BKTR_BDELAY, format_params[bktr->format_params].bdelay);
frame_rate = format_params[bktr->format_params].frame_rate;
- /* enable PLL mode using 28Mhz crystal for PAL/SECAM users */
+ /* enable PLL mode using 28MHz crystal for PAL/SECAM users */
if (bktr->xtal_pll_mode == BT848_USE_PLL) {
OUTB(bktr, BKTR_TGCTRL, 0);
OUTB(bktr, BKTR_PLL_F_LO, 0xf9);
diff --git a/sys/dev/pci/bktr/bktr_tuner.c b/sys/dev/pci/bktr/bktr_tuner.c
index 5d9b657f960..31b93309f34 100644
--- a/sys/dev/pci/bktr/bktr_tuner.c
+++ b/sys/dev/pci/bktr/bktr_tuner.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: bktr_tuner.c,v 1.2 2002/04/30 23:18:38 mickey Exp $ */
+/* $OpenBSD: bktr_tuner.c,v 1.3 2003/02/11 19:20:28 mickey Exp $ */
/* $FreeBSD: src/sys/dev/bktr/bktr_tuner.c,v 1.9 2000/10/19 07:33:28 roger Exp $ */
/*
@@ -718,17 +718,17 @@ void select_tuner( bktr_ptr_t bktr, int tuner_type ) {
* Tuner Notes:
* Programming the tuner properly is quite complicated.
* Here are some notes, based on a FM1246 data sheet for a PAL-I tuner.
- * The tuner (front end) covers 45.75 Mhz - 855.25 Mhz and an FM band of
- * 87.5 Mhz to 108.0 Mhz.
+ * The tuner (front end) covers 45.75 MHz - 855.25 MHz and an FM band of
+ * 87.5 MHz to 108.0 MHz.
*
* RF and IF. RF = radio frequencies, it is the transmitted signal.
* IF is the Intermediate Frequency (the offset from the base
* signal where the video, color, audio and NICAM signals are.
*
- * Eg, Picture at 38.9 Mhz, Colour at 34.47 MHz, sound at 32.9 MHz
- * NICAM at 32.348 Mhz.
+ * Eg, Picture at 38.9 MHz, Colour at 34.47 MHz, sound at 32.9 MHz
+ * NICAM at 32.348 MHz.
* Strangely enough, there is an IF (intermediate frequency) for
- * FM Radio which is 10.7 Mhz.
+ * FM Radio which is 10.7 MHz.
*
* The tuner also works in Bands. Philips bands are
* FM radio band 87.50 to 108.00 MHz
diff --git a/sys/dev/pci/if_bge.c b/sys/dev/pci/if_bge.c
index 5bf51d3bcc4..320091ed349 100644
--- a/sys/dev/pci/if_bge.c
+++ b/sys/dev/pci/if_bge.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_bge.c,v 1.18 2003/01/15 06:31:24 art Exp $ */
+/* $OpenBSD: if_bge.c,v 1.19 2003/02/11 19:20:27 mickey Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2001
@@ -55,7 +55,7 @@
* into the driver.
*
* The BCM5700 supports the PCI v2.2 and PCI-X v1.0 standards, and will
- * function in a 32-bit/64-bit 33/66Mhz bus, or a 64-bit/133Mhz bus.
+ * function in a 32-bit/64-bit 33/66MHz bus, or a 64-bit/133MHz bus.
*
* The BCM5701 is a single-chip solution incorporating both the BCM5700
* MAC and a BCM5401 10/100/1000 PHY. Unlike the BCM5700, the BCM5701
@@ -1035,7 +1035,7 @@ bge_chipinit(sc)
BGE_PCI_READ_BNDRY_1024);
#endif
- /* Set the timer prescaler (always 66Mhz) */
+ /* Set the timer prescaler (always 66MHz) */
CSR_WRITE_4(sc, BGE_MISC_CFG, 65 << 1/*BGE_32BITTIME_66MHZ*/);
return(0);
diff --git a/sys/dev/pci/if_em_hw.h b/sys/dev/pci/if_em_hw.h
index f4b498dc7a8..b5dc3cd5520 100644
--- a/sys/dev/pci/if_em_hw.h
+++ b/sys/dev/pci/if_em_hw.h
@@ -951,7 +951,7 @@ struct em_hw {
#define E1000_STATUS_SPEED_1000 0x00000080 /* Speed 1000Mb/s */
#define E1000_STATUS_ASDV 0x00000300 /* Auto speed detect value */
#define E1000_STATUS_MTXCKOK 0x00000400 /* MTX clock running OK */
-#define E1000_STATUS_PCI66 0x00000800 /* In 66Mhz slot */
+#define E1000_STATUS_PCI66 0x00000800 /* In 66MHz slot */
#define E1000_STATUS_BUS64 0x00001000 /* In 64 bit slot */
#define E1000_STATUS_PCIX_MODE 0x00002000 /* PCI-X mode */
#define E1000_STATUS_PCIX_SPEED 0x0000C000 /* PCI-X bus speed */
diff --git a/sys/dev/pci/if_lmc_media.c b/sys/dev/pci/if_lmc_media.c
index fef70e20ed8..dfff7eb775b 100644
--- a/sys/dev/pci/if_lmc_media.c
+++ b/sys/dev/pci/if_lmc_media.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: if_lmc_media.c,v 1.12 2001/11/06 19:53:19 miod Exp $ */
-/* $Id: if_lmc_media.c,v 1.12 2001/11/06 19:53:19 miod Exp $ */
+/* $OpenBSD: if_lmc_media.c,v 1.13 2003/02/11 19:20:27 mickey Exp $ */
+/* $Id: if_lmc_media.c,v 1.13 2003/02/11 19:20:27 mickey Exp $ */
/*-
* Copyright (c) 1997-1999 LAN Media Corporation (LMC)
@@ -661,10 +661,10 @@ lmc_ssi_set_speed(lmc_softc_t * const sc, lmc_ctl_t *ctl)
lmc_av9110_t *av;
/* original settings for clock rate of:
- * 100 Khz (8,25,0,0,2) were incorrect
+ * 100 KHz (8,25,0,0,2) were incorrect
* they should have been 80,125,1,3,3
* There are 17 param combinations to produce this freq.
- * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations)
+ * For 1.5 MHz use 120,100,1,1,2 (226 param. combinations)
*/
if (ctl == NULL) {
av = &ictl->cardspec.ssi;
diff --git a/sys/dev/pci/if_skreg.h b/sys/dev/pci/if_skreg.h
index d3e98c70935..cbb331207a3 100644
--- a/sys/dev/pci/if_skreg.h
+++ b/sys/dev/pci/if_skreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_skreg.h,v 1.6 2001/06/23 22:03:12 fgsch Exp $ */
+/* $OpenBSD: if_skreg.h,v 1.7 2003/02/11 19:20:27 mickey Exp $ */
/*
* Copyright (c) 1997, 1998, 1999, 2000
@@ -151,7 +151,7 @@
#define SK_CSR_SW_IRQ_CLEAR 0x0040
#define SK_CSR_SW_IRQ_SET 0x0080
#define SK_CSR_SLOTSIZE 0x0100 /* 1 == 64 bits, 0 == 32 */
-#define SK_CSR_BUSCLOCK 0x0200 /* 1 == 33/66 Mhz, = 33 */
+#define SK_CSR_BUSCLOCK 0x0200 /* 1 == 33/66 MHz, = 33 */
/* SK_LED register */
#define SK_LED_GREEN_OFF 0x01
diff --git a/sys/dev/pci/ncr.c b/sys/dev/pci/ncr.c
index 74f23f8e552..d3912d16865 100644
--- a/sys/dev/pci/ncr.c
+++ b/sys/dev/pci/ncr.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ncr.c,v 1.65 2003/01/05 22:41:35 deraadt Exp $ */
+/* $OpenBSD: ncr.c,v 1.66 2003/02/11 19:20:27 mickey Exp $ */
/* $NetBSD: ncr.c,v 1.63 1997/09/23 02:39:15 perry Exp $ */
/**************************************************************************
@@ -1466,7 +1466,7 @@ static void ncr_attach (pcici_t tag, int unit);
#if 0
static char ident[] =
- "\n$OpenBSD: ncr.c,v 1.65 2003/01/05 22:41:35 deraadt Exp $\n";
+ "\n$OpenBSD: ncr.c,v 1.66 2003/02/11 19:20:27 mickey Exp $\n";
#endif
static const u_long ncr_version = NCR_VERSION * 11
@@ -7818,13 +7818,13 @@ static u_long ncr_lookup(char * id)
** Note: we have to return the correct value.
** THERE IS NO SAVE DEFAULT VALUE.
**
-** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
+** Most NCR/SYMBIOS boards are delivered with a 40 MHz clock.
** 53C860 and 53C875 rev. 1 support fast20 transfers but
** do not have a clock doubler and so are provided with a
** 80 MHz clock. All other fast20 boards incorporate a doubler
** and so should be delivered with a 40 MHz clock.
-** The future fast40 chips (895/895) use a 40 Mhz base clock
-** and provide a clock quadrupler (160 Mhz). The code below
+** The future fast40 chips (895/895) use a 40 MHz base clock
+** and provide a clock quadrupler (160 MHz). The code below
** tries to deal as cleverly as possible with all this stuff.
**
**----------------------------------------------------------
@@ -7931,9 +7931,9 @@ static void ncr_getclock (ncb_p np, u_char multiplier)
printf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2);
if (f1 > f2) f1 = f2; /* trust lower result */
if (f1 > 45000) {
- scntl3 = 5; /* >45Mhz: assume 80MHz */
+ scntl3 = 5; /* >45MHz: assume 80MHz */
} else {
- scntl3 = 3; /* <45Mhz: assume 40MHz */
+ scntl3 = 3; /* <45MHz: assume 40MHz */
}
}
else if ((scntl3 & 7) == 5)
diff --git a/sys/dev/pci/noctreg.h b/sys/dev/pci/noctreg.h
index cc38ef0194a..4570ae1c411 100644
--- a/sys/dev/pci/noctreg.h
+++ b/sys/dev/pci/noctreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: noctreg.h,v 1.6 2002/07/16 22:44:31 jason Exp $ */
+/* $OpenBSD: noctreg.h,v 1.7 2003/02/11 19:20:28 mickey Exp $ */
/*
* Copyright (c) 2002 Jason L. Wright (jason@thought.net)
@@ -311,7 +311,7 @@ union noct_pkh_cmd {
/* NOCT_EA_SDRAM_CFG */
#define EASDRC_8KREFRESH 0x00000080 /* 8K refreshes/64ms */
-#define EASDRC_FREQ 0x0000003f /* in Mhz */
+#define EASDRC_FREQ 0x0000003f /* in MHz */
/* NOCT_RNG_CTL */
#define RNGCTL_RNG_ENA 0x80000000 /* rng enable */
diff --git a/sys/dev/pci/pucdata.c b/sys/dev/pci/pucdata.c
index f85ae39ddaa..7e99d38bca1 100644
--- a/sys/dev/pci/pucdata.c
+++ b/sys/dev/pci/pucdata.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pucdata.c,v 1.24 2002/11/30 01:11:46 fgsch Exp $ */
+/* $OpenBSD: pucdata.c,v 1.25 2003/02/11 19:20:28 mickey Exp $ */
/* $NetBSD: pucdata.c,v 1.6 1999/07/03 05:55:23 cgd Exp $ */
/*
@@ -589,8 +589,8 @@ const struct puc_device_description puc_devices[] = {
* VScom PCI 400H and 800H. Uses 4/8 16950 UART, behind a PCI chips
* that offers 4 com port on PCI device 0 (both 400H and 800H)
* and 4 on PCI device 1 (800H only). PCI device 0 has
- * device ID 3 and PCI device 1 device ID 4. Uses a 14.7456 Mhz crystal
- * instead of the standart 1.8432Mhz.
+ * device ID 3 and PCI device 1 device ID 4. Uses a 14.7456 MHz crystal
+ * instead of the standart 1.8432MHz.
* There's a version with a jumper for selecting the crystal frequency,
* defaults to 8x as used here. The jumperless version uses 8x, too.
*/
diff --git a/sys/dev/pci/sv.c b/sys/dev/pci/sv.c
index 787f0b49059..0b092dc7084 100644
--- a/sys/dev/pci/sv.c
+++ b/sys/dev/pci/sv.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: sv.c,v 1.14 2002/06/11 06:04:17 nordin Exp $ */
+/* $OpenBSD: sv.c,v 1.15 2003/02/11 19:20:28 mickey Exp $ */
/*
* Copyright (c) 1998 Constantine Paul Sapuntzakis
@@ -761,7 +761,7 @@ sv_set_params(addr, setmode, usemode, p, r)
with the constraint that:
- 80 MhZ < (m + 2) / (n + 2) * f_ref <= 150Mhz
+ 80 MhZ < (m + 2) / (n + 2) * f_ref <= 150MHz
and n, m >= 1
*/
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-14 15:06:48 +0000