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Diffstat (limited to 'sys/dev/sbus/qe.c')
-rw-r--r--sys/dev/sbus/qe.c91
1 files changed, 43 insertions, 48 deletions
diff --git a/sys/dev/sbus/qe.c b/sys/dev/sbus/qe.c
index e85f6d82091..336730075cd 100644
--- a/sys/dev/sbus/qe.c
+++ b/sys/dev/sbus/qe.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: qe.c,v 1.5 2001/11/28 05:42:24 jason Exp $ */
+/* $OpenBSD: qe.c,v 1.6 2001/11/28 19:47:54 jason Exp $ */
/* $NetBSD: qe.c,v 1.16 2001/03/30 17:30:18 christos Exp $ */
/*-
@@ -214,24 +214,24 @@ qeattach(parent, self, aux)
if (sa->sa_nreg < 2) {
printf("%s: only %d register sets\n",
- self->dv_xname, sa->sa_nreg);
+ self->dv_xname, sa->sa_nreg);
return;
}
if (bus_space_map2(sa->sa_bustag,
- (bus_type_t)sa->sa_reg[0].sbr_slot,
- (bus_addr_t)sa->sa_reg[0].sbr_offset,
- (bus_size_t)sa->sa_reg[0].sbr_size,
- BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cr) != 0) {
+ (bus_type_t)sa->sa_reg[0].sbr_slot,
+ (bus_addr_t)sa->sa_reg[0].sbr_offset,
+ (bus_size_t)sa->sa_reg[0].sbr_size,
+ BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cr) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
if (bus_space_map2(sa->sa_bustag,
- (bus_type_t)sa->sa_reg[1].sbr_slot,
- (bus_addr_t)sa->sa_reg[1].sbr_offset,
- (bus_size_t)sa->sa_reg[1].sbr_size,
- BUS_SPACE_MAP_LINEAR, 0, &sc->sc_mr) != 0) {
+ (bus_type_t)sa->sa_reg[1].sbr_slot,
+ (bus_addr_t)sa->sa_reg[1].sbr_offset,
+ (bus_size_t)sa->sa_reg[1].sbr_size,
+ BUS_SPACE_MAP_LINEAR, 0, &sc->sc_mr) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
@@ -264,21 +264,22 @@ qeattach(parent, self, aux)
sc->sc_rb.rb_ntbuf = QEC_XD_RING_MAXSIZE;
sc->sc_rb.rb_nrbuf = QEC_XD_RING_MAXSIZE;
- size = QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) +
- QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) +
- sc->sc_rb.rb_ntbuf * QE_PKT_BUF_SZ +
- sc->sc_rb.rb_nrbuf * QE_PKT_BUF_SZ;
+ size =
+ QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) +
+ QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) +
+ sc->sc_rb.rb_ntbuf * QE_PKT_BUF_SZ +
+ sc->sc_rb.rb_nrbuf * QE_PKT_BUF_SZ;
/* Get a DMA handle */
if ((error = bus_dmamap_create(dmatag, size, 1, size, 0,
- BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
+ BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
printf("%s: DMA map create error %d\n", self->dv_xname, error);
return;
}
/* Allocate DMA buffer */
if ((error = bus_dmamem_alloc(dmatag, size, 0, 0,
- &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
+ &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
printf("%s: DMA buffer alloc error %d\n",
self->dv_xname, error);
return;
@@ -287,18 +288,17 @@ qeattach(parent, self, aux)
/* Map DMA buffer in CPU addressable space */
if ((error = bus_dmamem_map(dmatag, &seg, rseg, size,
- &sc->sc_rb.rb_membase,
- BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
+ &sc->sc_rb.rb_membase,
+ BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
printf("%s: DMA buffer map error %d\n",
- self->dv_xname, error);
+ self->dv_xname, error);
bus_dmamem_free(dmatag, &seg, rseg);
return;
}
/* Load the buffer */
if ((error = bus_dmamap_load(dmatag, sc->sc_dmamap,
- sc->sc_rb.rb_membase, size, NULL,
- BUS_DMA_NOWAIT)) != 0) {
+ sc->sc_rb.rb_membase, size, NULL, BUS_DMA_NOWAIT)) != 0) {
printf("%s: DMA buffer map load error %d\n",
self->dv_xname, error);
bus_dmamem_unmap(dmatag, sc->sc_rb.rb_membase, size);
@@ -309,14 +309,11 @@ qeattach(parent, self, aux)
/* Initialize media properties */
ifmedia_init(&sc->sc_ifmedia, 0, qe_ifmedia_upd, qe_ifmedia_sts);
ifmedia_add(&sc->sc_ifmedia,
- IFM_MAKEWORD(IFM_ETHER,IFM_10_T,0,0),
- 0, NULL);
+ IFM_MAKEWORD(IFM_ETHER,IFM_10_T,0,0), 0, NULL);
ifmedia_add(&sc->sc_ifmedia,
- IFM_MAKEWORD(IFM_ETHER,IFM_10_5,0,0),
- 0, NULL);
+ IFM_MAKEWORD(IFM_ETHER,IFM_10_5,0,0), 0, NULL);
ifmedia_add(&sc->sc_ifmedia,
- IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,0),
- 0, NULL);
+ IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,0), 0, NULL);
ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
@@ -435,7 +432,7 @@ qe_read(sc, idx, len)
len > ETHERMTU + sizeof(struct ether_header)) {
printf("%s: invalid packet size %d; dropping\n",
- ifp->if_xname, len);
+ ifp->if_xname, len);
ifp->if_ierrors++;
return;
@@ -510,9 +507,9 @@ qestart(ifp)
* Initialize transmit registers and start transmission
*/
txd[bix].xd_flags = QEC_XD_OWN | QEC_XD_SOP | QEC_XD_EOP |
- (len & QEC_XD_LENGTH);
+ (len & QEC_XD_LENGTH);
bus_space_write_4(sc->sc_bustag, sc->sc_cr, QE_CRI_CTRL,
- QE_CR_CTRL_TWAKEUP);
+ QE_CR_CTRL_TWAKEUP);
if (++bix == QEC_XD_RING_MAXSIZE)
bix = 0;
@@ -542,7 +539,7 @@ qestop(sc)
bus_space_write_1(t, mr, QE_MRI_BIUCC, QE_MR_BIUCC_SWRST);
for (n = 200; n > 0; n--) {
if ((bus_space_read_1(t, mr, QE_MRI_BIUCC) &
- QE_MR_BIUCC_SWRST) == 0)
+ QE_MR_BIUCC_SWRST) == 0)
break;
DELAY(20);
}
@@ -551,7 +548,7 @@ qestop(sc)
bus_space_write_4(t, cr, QE_CRI_CTRL, QE_CR_CTRL_RESET);
for (n = 200; n > 0; n--) {
if ((bus_space_read_4(t, cr, QE_CRI_CTRL) &
- QE_CR_CTRL_RESET) == 0)
+ QE_CR_CTRL_RESET) == 0)
break;
DELAY(20);
}
@@ -726,7 +723,7 @@ qe_rint(sc)
/* ... */
xd[(bix+nrbuf) % QEC_XD_RING_MAXSIZE].xd_flags =
- QEC_XD_OWN | (QE_PKT_BUF_SZ & QEC_XD_LENGTH);
+ QEC_XD_OWN | (QE_PKT_BUF_SZ & QEC_XD_LENGTH);
if (++bix == QEC_XD_RING_MAXSIZE)
bix = 0;
@@ -734,7 +731,7 @@ qe_rint(sc)
#ifdef QEDEBUG
if (npackets == 0 && sc->sc_debug)
printf("%s: rint: no packets; rb index %d; status 0x%x\n",
- sc->sc_dev.dv_xname, bix, len);
+ sc->sc_dev.dv_xname, bix, len);
#endif
sc->sc_rb.rb_rdtail = bix;
@@ -951,10 +948,10 @@ qeioctl(ifp, cmd, data)
if (ns_nullhost(*ina))
ina->x_host =
- *(union ns_host *)LLADDR(ifp->if_sadl);
+ *(union ns_host *)LLADDR(ifp->if_sadl);
else
bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
- sizeof(sc->sc_arpcom.ac_enaddr));
+ sizeof(sc->sc_arpcom.ac_enaddr));
/* Set new address. */
qeinit(sc);
break;
@@ -975,7 +972,6 @@ qeioctl(ifp, cmd, data)
*/
qestop(sc);
ifp->if_flags &= ~IFF_RUNNING;
-
} else if ((ifp->if_flags & IFF_UP) != 0 &&
(ifp->if_flags & IFF_RUNNING) == 0) {
/*
@@ -983,7 +979,6 @@ qeioctl(ifp, cmd, data)
* start it.
*/
qeinit(sc);
-
} else {
/*
* Reset the interface to pick up changes in any other
@@ -1087,14 +1082,14 @@ qeinit(sc)
* by the QEC after DMA completes.
*/
bus_space_write_1(t, mr, QE_MRI_IMR,
- QE_MR_IMR_CERRM | QE_MR_IMR_RCVINTM);
+ QE_MR_IMR_CERRM | QE_MR_IMR_RCVINTM);
bus_space_write_1(t, mr, QE_MRI_BIUCC,
- QE_MR_BIUCC_BSWAP | QE_MR_BIUCC_64TS);
+ QE_MR_BIUCC_BSWAP | QE_MR_BIUCC_64TS);
bus_space_write_1(t, mr, QE_MRI_FIFOFC,
- QE_MR_FIFOCC_TXF16 | QE_MR_FIFOCC_RXF32 |
- QE_MR_FIFOCC_RFWU | QE_MR_FIFOCC_TFWU);
+ QE_MR_FIFOCC_TXF16 | QE_MR_FIFOCC_RXF32 |
+ QE_MR_FIFOCC_RFWU | QE_MR_FIFOCC_TFWU);
bus_space_write_1(t, mr, QE_MRI_PLSCC, QE_MR_PLSCC_TP);
@@ -1103,7 +1098,7 @@ qeinit(sc)
*/
ea = sc->sc_arpcom.ac_enaddr;
bus_space_write_1(t, mr, QE_MRI_IAC,
- QE_MR_IAC_ADDRCHG | QE_MR_IAC_PHYADDR);
+ QE_MR_IAC_ADDRCHG | QE_MR_IAC_PHYADDR);
bus_space_write_multi_1(t, mr, QE_MRI_PADR, ea, 6);
/* Apply media settings */
@@ -1113,7 +1108,7 @@ qeinit(sc)
* Clear Logical address filter
*/
bus_space_write_1(t, mr, QE_MRI_IAC,
- QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
+ QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
bus_space_set_multi_1(t, mr, QE_MRI_LADRF, 0, 8);
bus_space_write_1(t, mr, QE_MRI_IAC, 0);
@@ -1166,7 +1161,7 @@ qe_mcreset(sc)
if (ifp->if_flags & IFF_ALLMULTI) {
bus_space_write_1(t, mr, QE_MRI_IAC,
- QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
+ QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
bus_space_set_multi_1(t, mr, QE_MRI_LADRF, 0xff, 8);
bus_space_write_1(t, mr, QE_MRI_IAC, 0);
bus_space_write_1(t, mr, QE_MRI_MACCC, maccc);
@@ -1178,7 +1173,7 @@ qe_mcreset(sc)
ETHER_FIRST_MULTI(step, ac, enm);
while (enm != NULL) {
if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
- ETHER_ADDR_LEN) != 0) {
+ ETHER_ADDR_LEN) != 0) {
/*
* We must listen to a range of multicast
* addresses. For now, just accept all
@@ -1190,7 +1185,7 @@ qe_mcreset(sc)
* all bits set.)
*/
bus_space_write_1(t, mr, QE_MRI_IAC,
- QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
+ QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
bus_space_set_multi_1(t, mr, QE_MRI_LADRF, 0xff, 8);
bus_space_write_1(t, mr, QE_MRI_IAC, 0);
ifp->if_flags |= IFF_ALLMULTI;
@@ -1219,7 +1214,7 @@ qe_mcreset(sc)
}
bus_space_write_1(t, mr, QE_MRI_IAC,
- QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
+ QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
bus_space_write_multi_1(t, mr, QE_MRI_LADRF, ladrp, 8);
bus_space_write_1(t, mr, QE_MRI_IAC, 0);
bus_space_write_1(t, mr, QE_MRI_MACCC, maccc);
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-15 00:56:39 +0000