diff options
Diffstat (limited to 'sys/dev/sbus')
| -rw-r--r-- | sys/dev/sbus/be.c | 127 | ||||
| -rw-r--r-- | sys/dev/sbus/qe.c | 91 |
2 files changed, 103 insertions, 115 deletions
diff --git a/sys/dev/sbus/be.c b/sys/dev/sbus/be.c index 8bff57d6f88..17f54955ab5 100644 --- a/sys/dev/sbus/be.c +++ b/sys/dev/sbus/be.c @@ -1,4 +1,4 @@ -/* $OpenBSD: be.c,v 1.6 2001/11/28 16:52:44 jason Exp $ */ +/* $OpenBSD: be.c,v 1.7 2001/11/28 19:47:54 jason Exp $ */ /* $NetBSD: be.c,v 1.26 2001/03/20 15:39:20 pk Exp $ */ /*- @@ -247,33 +247,33 @@ beattach(parent, self, aux) if (sa->sa_nreg < 3) { printf("%s: only %d register sets\n", - self->dv_xname, sa->sa_nreg); + self->dv_xname, sa->sa_nreg); return; } if (bus_space_map2(sa->sa_bustag, - (bus_type_t)sa->sa_reg[0].sbr_slot, - (bus_addr_t)sa->sa_reg[0].sbr_offset, - (bus_size_t)sa->sa_reg[0].sbr_size, - BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cr) != 0) { + (bus_type_t)sa->sa_reg[0].sbr_slot, + (bus_addr_t)sa->sa_reg[0].sbr_offset, + (bus_size_t)sa->sa_reg[0].sbr_size, + BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cr) != 0) { printf("beattach: cannot map registers\n"); return; } if (bus_space_map2(sa->sa_bustag, - (bus_type_t)sa->sa_reg[1].sbr_slot, - (bus_addr_t)sa->sa_reg[1].sbr_offset, - (bus_size_t)sa->sa_reg[1].sbr_size, - BUS_SPACE_MAP_LINEAR, 0, &sc->sc_br) != 0) { + (bus_type_t)sa->sa_reg[1].sbr_slot, + (bus_addr_t)sa->sa_reg[1].sbr_offset, + (bus_size_t)sa->sa_reg[1].sbr_size, + BUS_SPACE_MAP_LINEAR, 0, &sc->sc_br) != 0) { printf("beattach: cannot map registers\n"); return; } if (bus_space_map2(sa->sa_bustag, - (bus_type_t)sa->sa_reg[2].sbr_slot, - (bus_addr_t)sa->sa_reg[2].sbr_offset, - (bus_size_t)sa->sa_reg[2].sbr_size, - BUS_SPACE_MAP_LINEAR, 0, &sc->sc_tr) != 0) { + (bus_type_t)sa->sa_reg[2].sbr_slot, + (bus_addr_t)sa->sa_reg[2].sbr_offset, + (bus_size_t)sa->sa_reg[2].sbr_size, + BUS_SPACE_MAP_LINEAR, 0, &sc->sc_tr) != 0) { printf("beattach: cannot map registers\n"); return; } @@ -322,14 +322,14 @@ beattach(parent, self, aux) /* Get a DMA handle */ if ((error = bus_dmamap_create(dmatag, size, 1, size, 0, - BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { + BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { printf("%s: DMA map create error %d\n", self->dv_xname, error); return; } /* Allocate DMA buffer */ if ((error = bus_dmamem_alloc(sa->sa_dmatag, size, 0, 0, - &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { + &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { printf("%s: DMA buffer alloc error %d\n", self->dv_xname, error); return; @@ -337,8 +337,7 @@ beattach(parent, self, aux) /* Map DMA memory in CPU addressable space */ if ((error = bus_dmamem_map(sa->sa_dmatag, &seg, rseg, size, - &sc->sc_rb.rb_membase, - BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { + &sc->sc_rb.rb_membase, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { printf("%s: DMA buffer map error %d\n", self->dv_xname, error); bus_dmamem_free(sa->sa_dmatag, &seg, rseg); @@ -347,10 +346,9 @@ beattach(parent, self, aux) /* Load the buffer */ if ((error = bus_dmamap_load(dmatag, sc->sc_dmamap, - sc->sc_rb.rb_membase, size, NULL, - BUS_DMA_NOWAIT)) != 0) { + sc->sc_rb.rb_membase, size, NULL, BUS_DMA_NOWAIT)) != 0) { printf("%s: DMA buffer map load error %d\n", - self->dv_xname, error); + self->dv_xname, error); bus_dmamem_unmap(dmatag, sc->sc_rb.rb_membase, size); bus_dmamem_free(dmatag, &seg, rseg); return; @@ -386,10 +384,10 @@ beattach(parent, self, aux) if (child == NULL) { /* No PHY attached */ ifmedia_add(&sc->sc_media, - IFM_MAKEWORD(IFM_ETHER,IFM_NONE,0,instance), - 0, NULL); + IFM_MAKEWORD(IFM_ETHER,IFM_NONE,0,instance), + 0, NULL); ifmedia_set(&sc->sc_media, - IFM_MAKEWORD(IFM_ETHER,IFM_NONE,0,instance)); + IFM_MAKEWORD(IFM_ETHER,IFM_NONE,0,instance)); } else { /* * Note: we support just one PHY on the external @@ -398,17 +396,17 @@ beattach(parent, self, aux) #ifdef DIAGNOSTIC if (LIST_NEXT(child, mii_list) != NULL) { printf("%s: spurious MII device %s attached\n", - sc->sc_dev.dv_xname, - child->mii_dev.dv_xname); + sc->sc_dev.dv_xname, + child->mii_dev.dv_xname); } #endif if (child->mii_phy != BE_PHY_EXTERNAL || child->mii_inst > 0) { printf("%s: cannot accomodate MII device %s" - " at phy %d, instance %d\n", - sc->sc_dev.dv_xname, - child->mii_dev.dv_xname, - child->mii_phy, child->mii_inst); + " at phy %d, instance %d\n", + sc->sc_dev.dv_xname, + child->mii_dev.dv_xname, + child->mii_phy, child->mii_inst); } else { sc->sc_phys[instance] = child->mii_phy; } @@ -418,7 +416,7 @@ beattach(parent, self, aux) * phy indeed has the auto negotiation capability!! */ ifmedia_set(&sc->sc_media, - IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance)); + IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance)); /* Mark our current media setting */ be_pal_gate(sc, BE_PHY_EXTERNAL); @@ -440,27 +438,25 @@ beattach(parent, self, aux) /* Use `ifm_data' to store BMCR bits */ ifmedia_add(&sc->sc_media, - IFM_MAKEWORD(IFM_ETHER,IFM_10_T,0,instance), - 0, NULL); + IFM_MAKEWORD(IFM_ETHER,IFM_10_T,0,instance), 0, NULL); ifmedia_add(&sc->sc_media, - IFM_MAKEWORD(IFM_ETHER,IFM_100_TX,0,instance), - BMCR_S100, NULL); + IFM_MAKEWORD(IFM_ETHER,IFM_100_TX,0,instance), + BMCR_S100, NULL); ifmedia_add(&sc->sc_media, - IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance), - 0, NULL); + IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance), 0, NULL); printf("on-board transceiver at %s: 10baseT, 100baseTX, auto\n", - self->dv_xname); + self->dv_xname); be_mii_reset(sc, BE_PHY_INTERNAL); /* Only set default medium here if there's no external PHY */ if (instance == 0) { be_pal_gate(sc, BE_PHY_INTERNAL); ifmedia_set(&sc->sc_media, - IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance)); + IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance)); } else be_mii_writereg((void *)sc, - BE_PHY_INTERNAL, MII_BMCR, BMCR_ISO); + BE_PHY_INTERNAL, MII_BMCR, BMCR_ISO); } bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); @@ -469,7 +465,7 @@ beattach(parent, self, aux) ifp->if_ioctl = beioctl; ifp->if_watchdog = bewatchdog; ifp->if_flags = - IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; + IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; IFQ_SET_READY(&ifp->if_snd); /* Attach the interface. */ @@ -579,7 +575,7 @@ be_read(sc, idx, len) len > ETHERMTU + sizeof(struct ether_header)) { printf("%s: invalid packet size %d; dropping\n", - ifp->if_xname, len); + ifp->if_xname, len); ifp->if_ierrors++; return; @@ -725,7 +721,6 @@ bewatchdog(ifp) log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); ++sc->sc_arpcom.ac_if.if_oerrors; - bereset(sc); } @@ -1008,10 +1003,10 @@ beioctl(ifp, cmd, data) if (ns_nullhost(*ina)) ina->x_host = - *(union ns_host *)LLADDR(ifp->if_sadl); + *(union ns_host *)LLADDR(ifp->if_sadl); else bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), - sizeof(sc->sc_arpcom.ac_enaddr)); + sizeof(sc->sc_arpcom.ac_enaddr)); /* Set new address. */ beinit(sc); break; @@ -1275,12 +1270,11 @@ be_mii_sync(sc) while (n--) { bus_space_write_4(t, tr, BE_TRI_MGMTPAL, - MGMT_PAL_INT_MDIO | MGMT_PAL_EXT_MDIO | - MGMT_PAL_OENAB); + MGMT_PAL_INT_MDIO | MGMT_PAL_EXT_MDIO | MGMT_PAL_OENAB); (void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL); bus_space_write_4(t, tr, BE_TRI_MGMTPAL, - MGMT_PAL_INT_MDIO | MGMT_PAL_EXT_MDIO | - MGMT_PAL_OENAB | MGMT_PAL_DCLOCK); + MGMT_PAL_INT_MDIO | MGMT_PAL_EXT_MDIO | + MGMT_PAL_OENAB | MGMT_PAL_DCLOCK); (void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL); } } @@ -1317,7 +1311,7 @@ be_tcvr_read_bit(sc, phy) bus_space_write_4(t, tr, BE_TRI_MGMTPAL, MGMT_PAL_EXT_MDIO); (void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL); bus_space_write_4(t, tr, BE_TRI_MGMTPAL, - MGMT_PAL_EXT_MDIO | MGMT_PAL_DCLOCK); + MGMT_PAL_EXT_MDIO | MGMT_PAL_DCLOCK); (void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL); ret = (bus_space_read_4(t, tr, BE_TRI_MGMTPAL) & MGMT_PAL_INT_MDIO) >> MGMT_PAL_INT_MDIO_SHIFT; @@ -1325,9 +1319,9 @@ be_tcvr_read_bit(sc, phy) bus_space_write_4(t, tr, BE_TRI_MGMTPAL, MGMT_PAL_INT_MDIO); (void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL); ret = (bus_space_read_4(t, tr, BE_TRI_MGMTPAL) & - MGMT_PAL_EXT_MDIO) >> MGMT_PAL_EXT_MDIO_SHIFT; + MGMT_PAL_EXT_MDIO) >> MGMT_PAL_EXT_MDIO_SHIFT; bus_space_write_4(t, tr, BE_TRI_MGMTPAL, - MGMT_PAL_INT_MDIO | MGMT_PAL_DCLOCK); + MGMT_PAL_INT_MDIO | MGMT_PAL_DCLOCK); (void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL); } @@ -1346,10 +1340,10 @@ be_tcvr_write_bit(sc, phy, bit) if (phy == BE_PHY_INTERNAL) { v = ((bit & 1) << MGMT_PAL_INT_MDIO_SHIFT) | - MGMT_PAL_OENAB | MGMT_PAL_EXT_MDIO; + MGMT_PAL_OENAB | MGMT_PAL_EXT_MDIO; } else { v = ((bit & 1) << MGMT_PAL_EXT_MDIO_SHIFT) - | MGMT_PAL_OENAB | MGMT_PAL_INT_MDIO; + | MGMT_PAL_OENAB | MGMT_PAL_INT_MDIO; } bus_space_write_4(t, tr, BE_TRI_MGMTPAL, v); (void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL); @@ -1366,9 +1360,8 @@ be_mii_sendbits(sc, phy, data, nbits) { int i; - for (i = 1 << (nbits - 1); i != 0; i >>= 1) { + for (i = 1 << (nbits - 1); i != 0; i >>= 1) be_tcvr_write_bit(sc, phy, (data & i) != 0); - } } static int @@ -1433,7 +1426,7 @@ be_mii_reset(sc, phy) int n; be_mii_writereg((struct device *)sc, phy, MII_BMCR, - BMCR_LOOP | BMCR_PDOWN | BMCR_ISO); + BMCR_LOOP | BMCR_PDOWN | BMCR_ISO); be_mii_writereg((struct device *)sc, phy, MII_BMCR, BMCR_RESET); for (n = 16; n >= 0; n--) { @@ -1460,8 +1453,8 @@ be_tick(arg) mii_tick(&sc->sc_mii); (void)be_intphy_service(sc, &sc->sc_mii, MII_TICK); - splx(s); timeout_add(&sc->sc_tick_ch, hz); + splx(s); } void @@ -1557,9 +1550,9 @@ be_intphy_service(sc, mii, cmd) */ if (IFM_INST(ife->ifm_media) != sc->sc_mii_inst) { bmcr = be_mii_readreg((void *)sc, - BE_PHY_INTERNAL, MII_BMCR); + BE_PHY_INTERNAL, MII_BMCR); be_mii_writereg((void *)sc, - BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO); + BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO); sc->sc_mii_flags &= ~MIIF_HAVELINK; sc->sc_intphy_curspeed = 0; return (0); @@ -1620,16 +1613,16 @@ be_intphy_service(sc, mii, cmd) /* Read twice in case the register is latched */ bmsr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMSR) | - be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMSR); + be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMSR); if ((bmsr & BMSR_LINK) != 0) { /* We have a carrier */ bmcr = be_mii_readreg((void *)sc, - BE_PHY_INTERNAL, MII_BMCR); + BE_PHY_INTERNAL, MII_BMCR); if ((sc->sc_mii_flags & MIIF_DOINGAUTO) != 0) { bmcr = be_mii_readreg((void *)sc, - BE_PHY_INTERNAL, MII_BMCR); + BE_PHY_INTERNAL, MII_BMCR); sc->sc_mii_flags |= MIIF_HAVELINK; sc->sc_intphy_curspeed = (bmcr & BMCR_S100); @@ -1637,11 +1630,11 @@ be_intphy_service(sc, mii, cmd) bmcr &= ~BMCR_ISO; be_mii_writereg((void *)sc, - BE_PHY_INTERNAL, MII_BMCR, bmcr); + BE_PHY_INTERNAL, MII_BMCR, bmcr); printf("%s: link up at %s Mbps\n", - sc->sc_dev.dv_xname, - (bmcr & BMCR_S100) ? "100" : "10"); + sc->sc_dev.dv_xname, + (bmcr & BMCR_S100) ? "100" : "10"); } return (0); } @@ -1669,7 +1662,7 @@ be_intphy_service(sc, mii, cmd) /* Isolate this phy */ bmcr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMCR); be_mii_writereg((void *)sc, - BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO); + BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO); return (0); } diff --git a/sys/dev/sbus/qe.c b/sys/dev/sbus/qe.c index e85f6d82091..336730075cd 100644 --- a/sys/dev/sbus/qe.c +++ b/sys/dev/sbus/qe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: qe.c,v 1.5 2001/11/28 05:42:24 jason Exp $ */ +/* $OpenBSD: qe.c,v 1.6 2001/11/28 19:47:54 jason Exp $ */ /* $NetBSD: qe.c,v 1.16 2001/03/30 17:30:18 christos Exp $ */ /*- @@ -214,24 +214,24 @@ qeattach(parent, self, aux) if (sa->sa_nreg < 2) { printf("%s: only %d register sets\n", - self->dv_xname, sa->sa_nreg); + self->dv_xname, sa->sa_nreg); return; } if (bus_space_map2(sa->sa_bustag, - (bus_type_t)sa->sa_reg[0].sbr_slot, - (bus_addr_t)sa->sa_reg[0].sbr_offset, - (bus_size_t)sa->sa_reg[0].sbr_size, - BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cr) != 0) { + (bus_type_t)sa->sa_reg[0].sbr_slot, + (bus_addr_t)sa->sa_reg[0].sbr_offset, + (bus_size_t)sa->sa_reg[0].sbr_size, + BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cr) != 0) { printf("%s: cannot map registers\n", self->dv_xname); return; } if (bus_space_map2(sa->sa_bustag, - (bus_type_t)sa->sa_reg[1].sbr_slot, - (bus_addr_t)sa->sa_reg[1].sbr_offset, - (bus_size_t)sa->sa_reg[1].sbr_size, - BUS_SPACE_MAP_LINEAR, 0, &sc->sc_mr) != 0) { + (bus_type_t)sa->sa_reg[1].sbr_slot, + (bus_addr_t)sa->sa_reg[1].sbr_offset, + (bus_size_t)sa->sa_reg[1].sbr_size, + BUS_SPACE_MAP_LINEAR, 0, &sc->sc_mr) != 0) { printf("%s: cannot map registers\n", self->dv_xname); return; } @@ -264,21 +264,22 @@ qeattach(parent, self, aux) sc->sc_rb.rb_ntbuf = QEC_XD_RING_MAXSIZE; sc->sc_rb.rb_nrbuf = QEC_XD_RING_MAXSIZE; - size = QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) + - QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) + - sc->sc_rb.rb_ntbuf * QE_PKT_BUF_SZ + - sc->sc_rb.rb_nrbuf * QE_PKT_BUF_SZ; + size = + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) + + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) + + sc->sc_rb.rb_ntbuf * QE_PKT_BUF_SZ + + sc->sc_rb.rb_nrbuf * QE_PKT_BUF_SZ; /* Get a DMA handle */ if ((error = bus_dmamap_create(dmatag, size, 1, size, 0, - BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { + BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { printf("%s: DMA map create error %d\n", self->dv_xname, error); return; } /* Allocate DMA buffer */ if ((error = bus_dmamem_alloc(dmatag, size, 0, 0, - &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { + &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { printf("%s: DMA buffer alloc error %d\n", self->dv_xname, error); return; @@ -287,18 +288,17 @@ qeattach(parent, self, aux) /* Map DMA buffer in CPU addressable space */ if ((error = bus_dmamem_map(dmatag, &seg, rseg, size, - &sc->sc_rb.rb_membase, - BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { + &sc->sc_rb.rb_membase, + BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { printf("%s: DMA buffer map error %d\n", - self->dv_xname, error); + self->dv_xname, error); bus_dmamem_free(dmatag, &seg, rseg); return; } /* Load the buffer */ if ((error = bus_dmamap_load(dmatag, sc->sc_dmamap, - sc->sc_rb.rb_membase, size, NULL, - BUS_DMA_NOWAIT)) != 0) { + sc->sc_rb.rb_membase, size, NULL, BUS_DMA_NOWAIT)) != 0) { printf("%s: DMA buffer map load error %d\n", self->dv_xname, error); bus_dmamem_unmap(dmatag, sc->sc_rb.rb_membase, size); @@ -309,14 +309,11 @@ qeattach(parent, self, aux) /* Initialize media properties */ ifmedia_init(&sc->sc_ifmedia, 0, qe_ifmedia_upd, qe_ifmedia_sts); ifmedia_add(&sc->sc_ifmedia, - IFM_MAKEWORD(IFM_ETHER,IFM_10_T,0,0), - 0, NULL); + IFM_MAKEWORD(IFM_ETHER,IFM_10_T,0,0), 0, NULL); ifmedia_add(&sc->sc_ifmedia, - IFM_MAKEWORD(IFM_ETHER,IFM_10_5,0,0), - 0, NULL); + IFM_MAKEWORD(IFM_ETHER,IFM_10_5,0,0), 0, NULL); ifmedia_add(&sc->sc_ifmedia, - IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,0), - 0, NULL); + IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,0), 0, NULL); ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO); bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); @@ -435,7 +432,7 @@ qe_read(sc, idx, len) len > ETHERMTU + sizeof(struct ether_header)) { printf("%s: invalid packet size %d; dropping\n", - ifp->if_xname, len); + ifp->if_xname, len); ifp->if_ierrors++; return; @@ -510,9 +507,9 @@ qestart(ifp) * Initialize transmit registers and start transmission */ txd[bix].xd_flags = QEC_XD_OWN | QEC_XD_SOP | QEC_XD_EOP | - (len & QEC_XD_LENGTH); + (len & QEC_XD_LENGTH); bus_space_write_4(sc->sc_bustag, sc->sc_cr, QE_CRI_CTRL, - QE_CR_CTRL_TWAKEUP); + QE_CR_CTRL_TWAKEUP); if (++bix == QEC_XD_RING_MAXSIZE) bix = 0; @@ -542,7 +539,7 @@ qestop(sc) bus_space_write_1(t, mr, QE_MRI_BIUCC, QE_MR_BIUCC_SWRST); for (n = 200; n > 0; n--) { if ((bus_space_read_1(t, mr, QE_MRI_BIUCC) & - QE_MR_BIUCC_SWRST) == 0) + QE_MR_BIUCC_SWRST) == 0) break; DELAY(20); } @@ -551,7 +548,7 @@ qestop(sc) bus_space_write_4(t, cr, QE_CRI_CTRL, QE_CR_CTRL_RESET); for (n = 200; n > 0; n--) { if ((bus_space_read_4(t, cr, QE_CRI_CTRL) & - QE_CR_CTRL_RESET) == 0) + QE_CR_CTRL_RESET) == 0) break; DELAY(20); } @@ -726,7 +723,7 @@ qe_rint(sc) /* ... */ xd[(bix+nrbuf) % QEC_XD_RING_MAXSIZE].xd_flags = - QEC_XD_OWN | (QE_PKT_BUF_SZ & QEC_XD_LENGTH); + QEC_XD_OWN | (QE_PKT_BUF_SZ & QEC_XD_LENGTH); if (++bix == QEC_XD_RING_MAXSIZE) bix = 0; @@ -734,7 +731,7 @@ qe_rint(sc) #ifdef QEDEBUG if (npackets == 0 && sc->sc_debug) printf("%s: rint: no packets; rb index %d; status 0x%x\n", - sc->sc_dev.dv_xname, bix, len); + sc->sc_dev.dv_xname, bix, len); #endif sc->sc_rb.rb_rdtail = bix; @@ -951,10 +948,10 @@ qeioctl(ifp, cmd, data) if (ns_nullhost(*ina)) ina->x_host = - *(union ns_host *)LLADDR(ifp->if_sadl); + *(union ns_host *)LLADDR(ifp->if_sadl); else bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), - sizeof(sc->sc_arpcom.ac_enaddr)); + sizeof(sc->sc_arpcom.ac_enaddr)); /* Set new address. */ qeinit(sc); break; @@ -975,7 +972,6 @@ qeioctl(ifp, cmd, data) */ qestop(sc); ifp->if_flags &= ~IFF_RUNNING; - } else if ((ifp->if_flags & IFF_UP) != 0 && (ifp->if_flags & IFF_RUNNING) == 0) { /* @@ -983,7 +979,6 @@ qeioctl(ifp, cmd, data) * start it. */ qeinit(sc); - } else { /* * Reset the interface to pick up changes in any other @@ -1087,14 +1082,14 @@ qeinit(sc) * by the QEC after DMA completes. */ bus_space_write_1(t, mr, QE_MRI_IMR, - QE_MR_IMR_CERRM | QE_MR_IMR_RCVINTM); + QE_MR_IMR_CERRM | QE_MR_IMR_RCVINTM); bus_space_write_1(t, mr, QE_MRI_BIUCC, - QE_MR_BIUCC_BSWAP | QE_MR_BIUCC_64TS); + QE_MR_BIUCC_BSWAP | QE_MR_BIUCC_64TS); bus_space_write_1(t, mr, QE_MRI_FIFOFC, - QE_MR_FIFOCC_TXF16 | QE_MR_FIFOCC_RXF32 | - QE_MR_FIFOCC_RFWU | QE_MR_FIFOCC_TFWU); + QE_MR_FIFOCC_TXF16 | QE_MR_FIFOCC_RXF32 | + QE_MR_FIFOCC_RFWU | QE_MR_FIFOCC_TFWU); bus_space_write_1(t, mr, QE_MRI_PLSCC, QE_MR_PLSCC_TP); @@ -1103,7 +1098,7 @@ qeinit(sc) */ ea = sc->sc_arpcom.ac_enaddr; bus_space_write_1(t, mr, QE_MRI_IAC, - QE_MR_IAC_ADDRCHG | QE_MR_IAC_PHYADDR); + QE_MR_IAC_ADDRCHG | QE_MR_IAC_PHYADDR); bus_space_write_multi_1(t, mr, QE_MRI_PADR, ea, 6); /* Apply media settings */ @@ -1113,7 +1108,7 @@ qeinit(sc) * Clear Logical address filter */ bus_space_write_1(t, mr, QE_MRI_IAC, - QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR); + QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR); bus_space_set_multi_1(t, mr, QE_MRI_LADRF, 0, 8); bus_space_write_1(t, mr, QE_MRI_IAC, 0); @@ -1166,7 +1161,7 @@ qe_mcreset(sc) if (ifp->if_flags & IFF_ALLMULTI) { bus_space_write_1(t, mr, QE_MRI_IAC, - QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR); + QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR); bus_space_set_multi_1(t, mr, QE_MRI_LADRF, 0xff, 8); bus_space_write_1(t, mr, QE_MRI_IAC, 0); bus_space_write_1(t, mr, QE_MRI_MACCC, maccc); @@ -1178,7 +1173,7 @@ qe_mcreset(sc) ETHER_FIRST_MULTI(step, ac, enm); while (enm != NULL) { if (bcmp(enm->enm_addrlo, enm->enm_addrhi, - ETHER_ADDR_LEN) != 0) { + ETHER_ADDR_LEN) != 0) { /* * We must listen to a range of multicast * addresses. For now, just accept all @@ -1190,7 +1185,7 @@ qe_mcreset(sc) * all bits set.) */ bus_space_write_1(t, mr, QE_MRI_IAC, - QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR); + QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR); bus_space_set_multi_1(t, mr, QE_MRI_LADRF, 0xff, 8); bus_space_write_1(t, mr, QE_MRI_IAC, 0); ifp->if_flags |= IFF_ALLMULTI; @@ -1219,7 +1214,7 @@ qe_mcreset(sc) } bus_space_write_1(t, mr, QE_MRI_IAC, - QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR); + QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR); bus_space_write_multi_1(t, mr, QE_MRI_LADRF, ladrp, 8); bus_space_write_1(t, mr, QE_MRI_IAC, 0); bus_space_write_1(t, mr, QE_MRI_MACCC, maccc); |