diff options
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/mii/eephy.c | 17 | ||||
| -rw-r--r-- | sys/dev/mii/eephyreg.h | 9 | ||||
| -rw-r--r-- | sys/dev/mii/miivar.h | 3 |
3 files changed, 26 insertions, 3 deletions
diff --git a/sys/dev/mii/eephy.c b/sys/dev/mii/eephy.c index 36582dbb555..16ac2fe18d5 100644 --- a/sys/dev/mii/eephy.c +++ b/sys/dev/mii/eephy.c @@ -1,4 +1,4 @@ -/* $OpenBSD: eephy.c,v 1.57 2019/09/24 14:37:03 visa Exp $ */ +/* $OpenBSD: eephy.c,v 1.58 2020/11/03 21:49:41 patrick Exp $ */ /* * Principal Author: Parag Patel * Copyright (c) 2001 @@ -99,6 +99,8 @@ static const struct mii_phydesc eephys[] = { MII_STR_MARVELL_E1118 }, { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1149, MII_STR_MARVELL_E1149 }, + { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1512, + MII_STR_MARVELL_E1512 }, { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1545, MII_STR_MARVELL_E1545 }, { MII_OUI_MARVELL, MII_MODEL_MARVELL_E3016, @@ -186,6 +188,19 @@ eephy_attach(struct device *parent, struct device *self, void *aux) PHY_WRITE(sc, E1000_EADR, page); } + /* Switch to SGMII-to-copper mode if necessary. */ + if (sc->mii_model == MII_MODEL_MARVELL_E1512 && + sc->mii_flags & MIIF_SGMII) { + page = PHY_READ(sc, E1000_EADR); + PHY_WRITE(sc, E1000_EADR, 18); + reg = PHY_READ(sc, E1000_GCR1); + reg &= ~E1000_GCR1_MODE_MASK; + reg |= E1000_GCR1_MODE_SGMII; + reg |= E1000_GCR1_RESET; + PHY_WRITE(sc, E1000_GCR1, reg); + PHY_WRITE(sc, E1000_EADR, page); + } + PHY_RESET(sc); sc->mii_capabilities = PHY_READ(sc, E1000_SR) & ma->mii_capmask; diff --git a/sys/dev/mii/eephyreg.h b/sys/dev/mii/eephyreg.h index 3da5d30f9f2..287ac513498 100644 --- a/sys/dev/mii/eephyreg.h +++ b/sys/dev/mii/eephyreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: eephyreg.h,v 1.7 2009/06/04 05:19:38 kettenis Exp $ */ +/* $OpenBSD: eephyreg.h,v 1.8 2020/11/03 21:49:42 patrick Exp $ */ /* * Principal Author: Parag Patel * Copyright (c) 2001 @@ -324,3 +324,10 @@ #define E1000_ESSR_TBI_COPPER 0x000d #define E1000_ESSR_TBI_FIBER 0x0005 #define E1000_ESSR_RGMII_COPPER 0x000b + +/* The following register is found only on the 88E151x Alaska PHY */ +/* Page 18 */ +#define E1000_GCR1 0x14 /* General Control Register 1 */ +#define E1000_GCR1_RESET 0x8000 +#define E1000_GCR1_MODE_MASK 0x0007 +#define E1000_GCR1_MODE_SGMII 0x0001 diff --git a/sys/dev/mii/miivar.h b/sys/dev/mii/miivar.h index f3fcac7dddc..3d55c3c58e2 100644 --- a/sys/dev/mii/miivar.h +++ b/sys/dev/mii/miivar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: miivar.h,v 1.35 2020/04/14 20:59:53 kettenis Exp $ */ +/* $OpenBSD: miivar.h,v 1.36 2020/11/03 21:49:42 patrick Exp $ */ /* $NetBSD: miivar.h,v 1.17 2000/03/06 20:56:57 thorpej Exp $ */ /*- @@ -154,6 +154,7 @@ typedef struct mii_softc mii_softc_t; #define MIIF_FORCEANEG 0x0400 /* force autonegotiation */ #define MIIF_RXID 0x0800 /* add Rx delay */ #define MIIF_TXID 0x1000 /* add Tx delay */ +#define MIIF_SGMII 0x2000 /* MAC to PHY interface is SGMII */ #define MIIF_INHERIT_MASK (MIIF_NOISOLATE|MIIF_NOLOOP|MIIF_AUTOTSLEEP) |