diff options
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/mii/bmtphy.c | 90 | ||||
| -rw-r--r-- | sys/dev/mii/bmtphyreg.h | 97 | ||||
| -rw-r--r-- | sys/dev/mii/exphy.c | 22 |
3 files changed, 116 insertions, 93 deletions
diff --git a/sys/dev/mii/bmtphy.c b/sys/dev/mii/bmtphy.c index e22621768aa..838f58a5152 100644 --- a/sys/dev/mii/bmtphy.c +++ b/sys/dev/mii/bmtphy.c @@ -1,5 +1,5 @@ -/* $OpenBSD: bmtphy.c,v 1.11 2005/01/28 18:27:55 brad Exp $ */ -/* $NetBSD: nsphy.c,v 1.25 2000/02/02 23:34:57 thorpej Exp $ */ +/* $OpenBSD: bmtphy.c,v 1.12 2005/02/04 23:23:56 brad Exp $ */ +/* $NetBSD: bmtphy.c,v 1.17 2005/01/17 13:17:45 scw Exp $ */ /*- * Copyright (c) 2001 Theo de Raadt @@ -27,8 +27,9 @@ */ /* - * driver for Broadcom BCM5201/5202 Mini-Theta ethernet 10/100 PHY - * Data Sheet available from Broadcom + * Driver for Broadcom BCM5201/BCM5202 "Mini-Theta" PHYs. This also + * drives the PHY on the 3Com 3c905C. The 3c905C's PHY is described in + * the 3c905C data sheet. */ #include <sys/param.h> @@ -61,10 +62,29 @@ struct cfdriver bmtphy_cd = { int bmtphy_service(struct mii_softc *, struct mii_data *, int); void bmtphy_status(struct mii_softc *); -void bmtphy_reset(struct mii_softc *); const struct mii_phy_funcs bmtphy_funcs = { - bmtphy_service, bmtphy_status, bmtphy_reset, + bmtphy_service, bmtphy_status, mii_phy_reset, +}; + +static const struct mii_phydesc bmtphys[] = { + { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_3C905B, + MII_STR_BROADCOM_3C905B }, + { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_3C905C, + MII_STR_BROADCOM_3C905C }, + { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM4401, + MII_STR_BROADCOM_BCM4401 }, + { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5201, + MII_STR_BROADCOM_BCM5201 }, + { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5214, + MII_STR_BROADCOM_BCM5214 }, + { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5221, + MII_STR_BROADCOM_BCM5221 }, + { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5222, + MII_STR_BROADCOM_BCM5222 }, + + { 0, 0, + NULL }, }; int @@ -72,20 +92,7 @@ bmtphymatch(struct device *parent, void *match, void *aux) { struct mii_attach_args *ma = aux; - if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_BROADCOM && - MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM4401) - return (10); - if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_BROADCOM && - MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM5201) - return (10); - if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_BROADCOM && - MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM5214) - return (10); - if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_BROADCOM && - MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM5221) - return (10); - if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_BROADCOM && - MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM5222) + if (mii_phy_match(ma, bmtphys) != NULL) return (10); return (0); @@ -97,20 +104,10 @@ bmtphyattach(struct device *parent, struct device *self, void *aux) struct mii_softc *sc = (struct mii_softc *)self; struct mii_attach_args *ma = aux; struct mii_data *mii = ma->mii_data; - char *model; - - if (MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM4401) - model = MII_STR_BROADCOM_BCM4401; - else if (MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM5201) - model = MII_STR_BROADCOM_BCM5201; - else if (MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM5214) - model = MII_STR_BROADCOM_BCM5214; - else if (MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM5221) - model = MII_STR_BROADCOM_BCM5221; - else if (MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_BCM5222) - model = MII_STR_BROADCOM_BCM5222; + const struct mii_phydesc *mpd; - printf(": %s, rev. %d\n", model, MII_REV(ma->mii_id2)); + mpd = mii_phy_match(ma, bmtphys); + printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); sc->mii_inst = mii->mii_instance; sc->mii_phy = ma->mii_phyno; @@ -198,13 +195,12 @@ bmtphy_status(struct mii_softc *sc) { struct mii_data *mii = sc->mii_pdata; struct ifmedia_entry *ife = mii->mii_media.ifm_cur; - int bmsr, bmcr, auxc; + int bmsr, bmcr, aux_csr; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; - bmsr = PHY_READ(sc, MII_BMSR) | - PHY_READ(sc, MII_BMSR); + bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); if (bmsr & BMSR_LINK) mii->mii_media_status |= IFM_ACTIVE; @@ -229,30 +225,14 @@ bmtphy_status(struct mii_softc *sc) return; } - auxc = PHY_READ(sc, MII_BMTPHY_AUXC); - if (auxc & AUXC_SP100) + aux_csr = PHY_READ(sc, MII_BMTPHY_AUX_CSR); + if (aux_csr & AUX_CSR_SPEED) mii->mii_media_active |= IFM_100_TX; else mii->mii_media_active |= IFM_10_T; - if (auxc & AUXC_FDX) + if (aux_csr & AUX_CSR_FDX) mii->mii_media_active |= IFM_FDX; } else mii->mii_media_active = ife->ifm_media; } - -void -bmtphy_reset(struct mii_softc *sc) -{ - int anar; - - mii_phy_reset(sc); - - anar = PHY_READ(sc, MII_ANAR); - anar |= BMSR_MEDIA_TO_ANAR(PHY_READ(sc, MII_BMSR)); - PHY_WRITE(sc, MII_ANAR, anar); - - /* Chip resets with FDX bit not set */ - PHY_WRITE(sc, MII_BMCR, PHY_READ(sc, MII_BMCR) | - BMCR_S100|BMCR_AUTOEN|BMCR_STARTNEG|BMCR_FDX); -} diff --git a/sys/dev/mii/bmtphyreg.h b/sys/dev/mii/bmtphyreg.h index bcec01ce60a..f1519be1cf1 100644 --- a/sys/dev/mii/bmtphyreg.h +++ b/sys/dev/mii/bmtphyreg.h @@ -1,5 +1,5 @@ -/* $OpenBSD: bmtphyreg.h,v 1.2 2001/06/18 06:31:59 deraadt Exp $ */ -/* $NetBSD: bmtphyreg.h,v 1.1 1998/08/10 23:58:39 thorpej Exp $ */ +/* $OpenBSD: bmtphyreg.h,v 1.3 2005/02/04 23:23:56 brad Exp $ */ +/* $NetBSD: bmtphyreg.h,v 1.1 2001/06/02 21:42:10 thorpej Exp $ */ /*- * Copyright (c) 2001 Theo de Raadt @@ -29,30 +29,91 @@ #ifndef _DEV_MII_BMTPHYREG_H_ #define _DEV_MII_BMTPHYREG_H_ -#define MII_BMTPHY_100RCVERR 0x12 /* 100base-X rcv error counter */ +/* + * BCM5201/BCM5202 registers. + */ + +#define MII_BMTPHY_AUX_CTL 0x10 /* auxiliary control */ +#define AUX_CTL_TXDIS 0x2000 /* transmitter disable */ +#define AUX_CTL_4B5B_BYPASS 0x0400 /* bypass 4b5b encoder */ +#define AUX_CTL_SCR_BYPASS 0x0200 /* bypass scrambler */ +#define AUX_CTL_NRZI_BYPASS 0x0100 /* bypass NRZI encoder */ +#define AUX_CTL_RXALIGN_BYPASS 0x0080 /* bypass rx symbol alignment */ +#define AUX_CTL_BASEWANDER_DIS 0x0040 /* disable baseline wander correction */ +#define AUX_CTL_FEF_EN 0x0020 /* far-end fault enable */ -#define MII_BMTPHY_FCSCR 0x13 /* 100base-X false carrier counter */ +#define MII_BMTPHY_AUX_STS 0x11 /* auxiliary status */ +#define AUX_STS_FX_MODE 0x0400 /* 100base-FX mode (strap pin) */ +#define AUX_STS_LOCKED 0x0200 /* descrambler locked */ +#define AUX_STS_100BASE_LINK 0x0100 /* 1 = 100base link */ +#define AUX_STS_REMFAULT 0x0080 /* remote fault */ +#define AUX_STS_DISCON_STATE 0x0040 /* disconnect state */ +#define AUX_STS_FCARDET 0x0020 /* false carrier detected */ +#define AUX_STS_BAD_ESD 0x0010 /* bad ESD detected */ +#define AUX_STS_RXERROR 0x0008 /* Rx error detected */ +#define AUX_STS_TXERROR 0x0004 /* Tx error detected */ +#define AUX_STS_LOCKERROR 0x0002 /* lock error detected */ +#define AUX_STS_MLT3ERROR 0x0001 /* MLT3 code error detected */ -#define MII_BMTPHY_100DISC 0x14 /* 100base-X rcv error counter */ +#define MII_BMTPHY_RXERROR_CTR 0x12 /* 100base-X Rx error counter */ +#define RXERROR_CTR_MASK 0x00ff -#define MII_BMTPHY_TXEQUAL 0x15 /* TX equalizer coefficient */ +#define MII_BMTPHY_FCS_CTR 0x13 /* 100base-X false carrier counter */ +#define FCS_CTR_MASK 0x00ff -#define MII_BMTPHY_TXEQCTRL 0x16 /* TX equalizer control */ +#define MII_BMTPHY_DIS_CTR 0x14 /* 100base-X disconnect counter */ +#define DIS_CTR_MASK 0x00ff #define MII_BMTPHY_PTEST 0x17 /* PTEST */ -#define MII_BMTPHY_AUXC 0x18 /* Aux control/status */ -#define AUXC_FORCELINK 0x4000 /* */ -#define AUXC_AUTONEG 0x0010 /* */ -#define AUXC_FORCE100 0x0004 /* Force 100 indicator */ -#define AUXC_SP100 0x0002 /* SP100 indicator */ -#define AUXC_FDX 0x0001 /* Full duplex indicator */ +#define MII_BMTPHY_AUX_CSR 0x18 /* auxiliary control/status */ +#define AUX_CSR_JABBER_DIS 0x8000 /* jabber disable */ +#define AUX_CSR_FLINK 0x4000 /* force 10baseT link pass */ +#define AUX_CSR_HSQ 0x0080 /* SQ high */ +#define AUX_CSR_LSQ 0x0040 /* SQ low */ +#define AUX_CSR_ER1 0x0020 /* edge rate 1 */ +#define AUX_CSR_ER0 0x0010 /* edge rate 0 */ +#define AUX_CSR_ANEG 0x0008 /* auto-negotiation activated */ +#define AUX_CSR_F100 0x0004 /* force 100base */ +#define AUX_CSR_SPEED 0x0002 /* 1 = 100, 0 = 10 */ +#define AUX_CSR_FDX 0x0001 /* full-duplex */ + +#define MII_BMTPHY_AUX_SS 0x19 /* auxiliary status summary */ +#define AUX_SS_ACOMP 0x8000 /* auto-negotiation complete */ +#define AUX_SS_ACOMP_ACK 0x4000 /* auto-negotiation compl. ack */ +#define AUX_SS_AACK_DET 0x2000 /* auto-neg. ack detected */ +#define AUX_SS_ANLPAD 0x1000 /* auto-neg. link part. ability det */ +#define AUX_SS_ANEG_PAUSE 0x0800 /* pause operation bit */ +#define AUX_SS_HCD 0x0700 /* highest common denominator */ +#define AUX_SS_HCD_NONE 0x0000 /* none */ +#define AUX_SS_HCD_10T 0x0100 /* 10baseT */ +#define AUX_SS_HCD_10T_FDX 0x0200 /* 10baseT-FDX */ +#define AUX_SS_HCD_100TX 0x0300 /* 100baseTX-FDX */ +#define AUX_SS_HCD_100T4 0x0400 /* 100baseT4 */ +#define AUX_SS_HCD_100TX_FDX 0x0500 /* 100baseTX-FDX */ +#define AUX_SS_PDF 0x0080 /* parallel detection fault */ +#define AUX_SS_LPRF 0x0040 /* link partner remote fault */ +#define AUX_SS_LPPR 0x0020 /* link partner page received */ +#define AUX_SS_LPANA 0x0010 /* link partner auto-neg able */ +#define AUX_SS_SPEED 0x0008 /* 1 = 100, 0 = 10 */ +#define AUX_SS_LINK 0x0004 /* link pass */ +#define AUX_SS_ANEN 0x0002 /* auto-neg. enabled */ +#define AUX_SS_JABBER 0x0001 /* jabber detected */ -#define MII_BMTPHY_AUXS 0x19 /* Aux status summary */ -#define AUXS_SP100 0x0008 /* */ -#define AUXS_LINKSTATUS 0x0004 /* */ +#define MII_BMTPHY_INTR 0x1a /* interrupt register */ +#define INTR_FDX_LED 0x8000 /* full-duplex led enable */ +#define INTR_INTR_EN 0x4000 /* interrupt enable */ +#define INTR_FDX_MASK 0x0800 /* full-dupled intr mask */ +#define INTR_SPD_MASK 0x0400 /* speed intr mask */ +#define INTR_LINK_MASK 0x0200 /* link intr mask */ +#define INTR_INTR_MASK 0x0100 /* master interrupt mask */ +#define INTR_FDX_CHANGE 0x0008 /* full-duplex change */ +#define INTR_SPD_CHANGE 0x0004 /* speed change */ +#define INTR_LINK_CHANGE 0x0002 /* link change */ +#define INTR_INTR_STATUS 0x0001 /* interrupt status */ -#define MII_BMTPHY_AUX2 0x1b /* aux mode 2 */ -#define AUX2_TWOLNKLED 0x0004 /* Two link led mode */ +#define MII_BMTPHY_AUX2 0x1b /* auliliary mode 2 */ +#define AUX2_BLOCK_RXDV 0x0200 /* block RXDV mode enabled */ +#define AUX2_ANPDQ 0x0100 /* auto-neg parallel detection Q mode */ #endif /* _DEV_MII_BMTPHYREG_H_ */ diff --git a/sys/dev/mii/exphy.c b/sys/dev/mii/exphy.c index c641b207b65..43eceeec73a 100644 --- a/sys/dev/mii/exphy.c +++ b/sys/dev/mii/exphy.c @@ -1,4 +1,4 @@ -/* $OpenBSD: exphy.c,v 1.17 2005/01/28 18:27:55 brad Exp $ */ +/* $OpenBSD: exphy.c,v 1.18 2005/02/04 23:23:56 brad Exp $ */ /* $NetBSD: exphy.c,v 1.23 2000/02/02 23:34:56 thorpej Exp $ */ /*- @@ -108,11 +108,6 @@ exphymatch(struct device *parent, void *match, void *aux) { struct mii_attach_args *ma = aux; - if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_BROADCOM && - (MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_3C905B || - MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_3C905C)) - return (10); - /* * Since 3com's PHY for some xl adapters is braindead and doesn't * report the proper OUI/MODEL information, we have this stupid @@ -135,20 +130,7 @@ exphyattach(struct device *parent, struct device *self, void *aux) struct mii_attach_args *ma = aux; struct mii_data *mii = ma->mii_data; - if ((MII_OUI(ma->mii_id1, ma->mii_id2) == 0 || - MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_3COM) && - MII_MODEL(ma->mii_id2) == 0) - printf(": 3Com internal media interface\n"); - else if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_BROADCOM && - MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_3C905B) - printf(": %s, rev. %d\n", MII_STR_BROADCOM_3C905B, - MII_REV(ma->mii_id2)); - else if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_BROADCOM && - MII_MODEL(ma->mii_id2) == MII_MODEL_BROADCOM_3C905C) - printf(": %s, rev. %d\n", MII_STR_BROADCOM_3C905C, - MII_REV(ma->mii_id2)); - else - printf(": unknown phy\n"); + printf(": 3Com internal media interface\n"); sc->mii_inst = mii->mii_instance; sc->mii_phy = ma->mii_phyno; |