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-rw-r--r--sys/dev/ic/osiopreg.h4
-rw-r--r--sys/dev/pci/cs4281.c4
-rw-r--r--sys/dev/pci/plx9060reg.h4
3 files changed, 6 insertions, 6 deletions
diff --git a/sys/dev/ic/osiopreg.h b/sys/dev/ic/osiopreg.h
index e8a1a103c54..f0f5ab4a551 100644
--- a/sys/dev/ic/osiopreg.h
+++ b/sys/dev/ic/osiopreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: osiopreg.h,v 1.4 2003/10/21 18:58:49 jmc Exp $ */
+/* $OpenBSD: osiopreg.h,v 1.5 2005/11/21 21:52:47 miod Exp $ */
/* $NetBSD: osiopreg.h,v 1.1 2001/04/30 04:47:51 tsutsui Exp $ */
/*
@@ -306,7 +306,7 @@
#define OSIOP_CTEST7_CDIS 0x80 /* Cache burst disable */
#define OSIOP_CTEST7_SC1 0x40 /* Snoop control 1 */
-#define OSIOP_CTEST7_SC0 0x20 /* Snoop contorl 0 */
+#define OSIOP_CTEST7_SC0 0x20 /* Snoop control 0 */
#define OSIOP_CTEST7_STD 0x10 /* Selection timeout disable */
#define OSIOP_CTEST7_DFP 0x08 /* DMA FIFO parity bit */
#define OSIOP_CTEST7_EVP 0x04 /* Even parity (to host bus) */
diff --git a/sys/dev/pci/cs4281.c b/sys/dev/pci/cs4281.c
index 8b0d64ba1f9..c6f22b1255e 100644
--- a/sys/dev/pci/cs4281.c
+++ b/sys/dev/pci/cs4281.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cs4281.c,v 1.17 2005/08/09 04:10:10 mickey Exp $ */
+/* $OpenBSD: cs4281.c,v 1.18 2005/11/21 21:52:47 miod Exp $ */
/* $Tera: cs4281.c,v 1.18 2000/12/27 14:24:45 tacha Exp $ */
/*
@@ -1127,7 +1127,7 @@ cs4281_init(sc)
BA0WRITE4(sc, CS4281_DCR0, dat32);
BA0WRITE4(sc, CS4281_DCR1, dat32);
- /* Set Auto-Initialize Contorl enable */
+ /* Set Auto-Initialize Control enable */
BA0WRITE4(sc, CS4281_DMR0,
DMRn_DMA | DMRn_AUTO | DMRn_TR_READ);
BA0WRITE4(sc, CS4281_DMR1,
diff --git a/sys/dev/pci/plx9060reg.h b/sys/dev/pci/plx9060reg.h
index 031893a42de..820cb379c14 100644
--- a/sys/dev/pci/plx9060reg.h
+++ b/sys/dev/pci/plx9060reg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: plx9060reg.h,v 1.1 2001/06/21 13:21:50 nate Exp $ */
+/* $OpenBSD: plx9060reg.h,v 1.2 2005/11/21 21:52:47 miod Exp $ */
/* $NetBSD$ */
/*-
@@ -170,7 +170,7 @@
#define CONTROL_PCIMRC 0x00000f00
#define CONTROL_PCIMRC_SHIFT 8
#define CONTROL_PCIMWC 0x0000f000
-#define CONTORL_PCIMWC_SHIFT 12
+#define CONTROL_PCIMWC_SHIFT 12
#define CONTROL_GPO 0x00010000
#define CONTROL_GPI 0x00020000
#define CONTROL_EESK 0x01000000